ASoC: SOF: imx: drop usage of the imx8_*_clocks API
Currently, the driver has to keep track of all the clocks it uses via an array of "struct clk_bulk_data", which doesn't scale well and is unnecessary. As such, replace the usage of the imx8_*_clocks with "devm_clk_bulk_get_all()" and friends. Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Link: https://msgid.link/r/20240328221201.24722-2-laurentiumihalcea111@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Laurentiu Mihalcea
Mark Brown
parent
5faf65b5d1
commit
a358f67d16
@ -41,13 +41,6 @@
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#define MBOX_OFFSET 0x800000
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#define MBOX_SIZE 0x1000
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/* DSP clocks */
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static struct clk_bulk_data imx8_dsp_clks[] = {
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{ .id = "ipg" },
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{ .id = "ocram" },
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{ .id = "core" },
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};
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struct imx8_priv {
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struct device *dev;
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struct snd_sof_dev *sdev;
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@ -64,7 +57,8 @@ struct imx8_priv {
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struct device **pd_dev;
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struct device_link **link;
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struct imx_clocks *clks;
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struct clk_bulk_data *clks;
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int clk_num;
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};
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static int imx8_get_mailbox_offset(struct snd_sof_dev *sdev)
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@ -196,10 +190,6 @@ static int imx8_probe(struct snd_sof_dev *sdev)
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if (!priv)
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return -ENOMEM;
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priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
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if (!priv->clks)
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return -ENOMEM;
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sdev->num_cores = 1;
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sdev->pdata->hw_pdata = priv;
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priv->dev = sdev->dev;
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@ -313,17 +303,18 @@ static int imx8_probe(struct snd_sof_dev *sdev)
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/* set default mailbox offset for FW ready message */
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sdev->dsp_box.offset = MBOX_OFFSET;
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/* init clocks info */
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priv->clks->dsp_clks = imx8_dsp_clks;
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priv->clks->num_dsp_clks = ARRAY_SIZE(imx8_dsp_clks);
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ret = imx8_parse_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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priv->clk_num = ret;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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return 0;
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@ -343,7 +334,7 @@ static void imx8_remove(struct snd_sof_dev *sdev)
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struct imx8_priv *priv = sdev->pdata->hw_pdata;
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int i;
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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platform_device_unregister(priv->ipc_dev);
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for (i = 0; i < priv->num_domains; i++) {
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@ -373,7 +364,7 @@ static void imx8_suspend(struct snd_sof_dev *sdev)
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_free_channel(priv->dsp_ipc, i);
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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}
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static int imx8_resume(struct snd_sof_dev *sdev)
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@ -382,9 +373,11 @@ static int imx8_resume(struct snd_sof_dev *sdev)
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int ret;
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int i;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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return ret;
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}
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_request_channel(priv->dsp_ipc, i);
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@ -26,12 +26,6 @@
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#define MBOX_OFFSET 0x800000
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#define MBOX_SIZE 0x1000
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static struct clk_bulk_data imx8m_dsp_clks[] = {
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{ .id = "ipg" },
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{ .id = "ocram" },
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{ .id = "core" },
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};
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/* DAP registers */
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#define IMX8M_DAP_DEBUG 0x28800000
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#define IMX8M_DAP_DEBUG_SIZE (64 * 1024)
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@ -54,7 +48,8 @@ struct imx8m_priv {
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struct imx_dsp_ipc *dsp_ipc;
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struct platform_device *ipc_dev;
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struct imx_clocks *clks;
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struct clk_bulk_data *clks;
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int clk_num;
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void __iomem *dap;
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struct regmap *regmap;
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@ -163,10 +158,6 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
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if (!priv)
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return -ENOMEM;
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priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
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if (!priv->clks)
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return -ENOMEM;
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sdev->num_cores = 1;
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sdev->pdata->hw_pdata = priv;
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priv->dev = sdev->dev;
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@ -250,17 +241,18 @@ static int imx8m_probe(struct snd_sof_dev *sdev)
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goto exit_pdev_unregister;
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}
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/* init clocks info */
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priv->clks->dsp_clks = imx8m_dsp_clks;
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priv->clks->num_dsp_clks = ARRAY_SIZE(imx8m_dsp_clks);
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ret = imx8_parse_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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priv->clk_num = ret;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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return 0;
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@ -273,7 +265,7 @@ static void imx8m_remove(struct snd_sof_dev *sdev)
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{
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struct imx8m_priv *priv = sdev->pdata->hw_pdata;
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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platform_device_unregister(priv->ipc_dev);
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}
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@ -336,9 +328,11 @@ static int imx8m_resume(struct snd_sof_dev *sdev)
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int ret;
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int i;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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return ret;
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}
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_request_channel(priv->dsp_ipc, i);
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@ -354,7 +348,7 @@ static void imx8m_suspend(struct snd_sof_dev *sdev)
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_free_channel(priv->dsp_ipc, i);
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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}
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static int imx8m_dsp_runtime_resume(struct snd_sof_dev *sdev)
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@ -40,13 +40,6 @@
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#define MBOX_OFFSET 0x800000
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#define MBOX_SIZE 0x1000
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static struct clk_bulk_data imx8ulp_dsp_clks[] = {
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{ .id = "core" },
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{ .id = "ipg" },
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{ .id = "ocram" },
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{ .id = "mu" },
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};
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struct imx8ulp_priv {
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struct device *dev;
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struct snd_sof_dev *sdev;
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@ -56,7 +49,8 @@ struct imx8ulp_priv {
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struct platform_device *ipc_dev;
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struct regmap *regmap;
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struct imx_clocks *clks;
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struct clk_bulk_data *clks;
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int clk_num;
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};
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static void imx8ulp_sim_lpav_start(struct imx8ulp_priv *priv)
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@ -175,10 +169,6 @@ static int imx8ulp_probe(struct snd_sof_dev *sdev)
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if (!priv)
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return -ENOMEM;
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priv->clks = devm_kzalloc(&pdev->dev, sizeof(*priv->clks), GFP_KERNEL);
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if (!priv->clks)
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return -ENOMEM;
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sdev->num_cores = 1;
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sdev->pdata->hw_pdata = priv;
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priv->dev = sdev->dev;
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@ -259,16 +249,18 @@ static int imx8ulp_probe(struct snd_sof_dev *sdev)
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goto exit_pdev_unregister;
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}
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priv->clks->dsp_clks = imx8ulp_dsp_clks;
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priv->clks->num_dsp_clks = ARRAY_SIZE(imx8ulp_dsp_clks);
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ret = imx8_parse_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = devm_clk_bulk_get_all(sdev->dev, &priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to fetch clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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priv->clk_num = ret;
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ret = imx8_enable_clocks(sdev, priv->clks);
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if (ret < 0)
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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goto exit_pdev_unregister;
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}
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return 0;
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@ -282,7 +274,7 @@ static void imx8ulp_remove(struct snd_sof_dev *sdev)
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{
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struct imx8ulp_priv *priv = sdev->pdata->hw_pdata;
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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platform_device_unregister(priv->ipc_dev);
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}
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@ -303,7 +295,7 @@ static int imx8ulp_suspend(struct snd_sof_dev *sdev)
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_free_channel(priv->dsp_ipc, i);
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imx8_disable_clocks(sdev, priv->clks);
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clk_bulk_disable_unprepare(priv->clk_num, priv->clks);
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return 0;
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}
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@ -311,9 +303,13 @@ static int imx8ulp_suspend(struct snd_sof_dev *sdev)
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static int imx8ulp_resume(struct snd_sof_dev *sdev)
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{
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struct imx8ulp_priv *priv = (struct imx8ulp_priv *)sdev->pdata->hw_pdata;
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int i;
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int i, ret;
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imx8_enable_clocks(sdev, priv->clks);
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ret = clk_bulk_prepare_enable(priv->clk_num, priv->clks);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to enable clocks: %d\n", ret);
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return ret;
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}
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for (i = 0; i < DSP_MU_CHAN_NUM; i++)
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imx_dsp_request_channel(priv->dsp_ipc, i);
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