iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

arm64: dts: ls1028a: fix memory node

Browse Source 
[ Upstream commit dabea675fa ]

While enabling EDAC support for the LS1028A it was discovered that the
memory node has a wrong endianness setting as well as a wrong interrupt
assignment. Fix both.

This was tested on a sl28 board. To force ECC errors, you can use the
error injection supported by the controller in hardware (with
CONFIG_EDAC_DEBUG enabled):

 # enable error injection
 $ echo 0x100 > /sys/devices/system/edac/mc/mc0/inject_ctrl
 # flip lowest bit of the data
 $ echo 0x1 > /sys/devices/system/edac/mc/mc0/inject_data_lo

Fixes: 8897f3255c ("arm64: dts: Add support for NXP LS1028A SoC")
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Michael Walle
2021-04-08 13:02:18 +02:00
committed by Greg Kroah-Hartman
parent d551b8e857
commit a3716c1933
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
View File

@ -192,8 +192,8 @@
ddr: memory-controller@1080000 { ddr: memory-controller@1080000 {
compatible = "fsl,qoriq-memory-controller"; compatible = "fsl,qoriq-memory-controller";
reg = <0x0 0x1080000 0x0 0x1000>; reg = <0x0 0x1080000 0x0 0x1000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
big-endian; little-endian;
}; };
dcfg: syscon@1e00000 { dcfg: syscon@1e00000 {