arm64: dts: mediatek: mt7981: fix code alignment for PWM clocks

[ Upstream commit f80cfe9616b7448eca709a3e87ca57201cd5787c ]

Align "clocks" array entries to start at the same column.

Fixes: cf29427573cc ("arm64: dts: mediatek: Add initial MT7981B and Xiaomi AX3000T")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20240405105030.24559-1-zajec5@gmail.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Rafał Miłecki 2024-04-05 12:50:30 +02:00 committed by Greg Kroah-Hartman
parent a07456e3c3
commit a3c80f9326

View File

@ -78,10 +78,10 @@
compatible = "mediatek,mt7981-pwm";
reg = <0 0x10048000 0 0x1000>;
clocks = <&infracfg CLK_INFRA_PWM_STA>,
<&infracfg CLK_INFRA_PWM_HCK>,
<&infracfg CLK_INFRA_PWM1_CK>,
<&infracfg CLK_INFRA_PWM2_CK>,
<&infracfg CLK_INFRA_PWM3_CK>;
<&infracfg CLK_INFRA_PWM_HCK>,
<&infracfg CLK_INFRA_PWM1_CK>,
<&infracfg CLK_INFRA_PWM2_CK>,
<&infracfg CLK_INFRA_PWM3_CK>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
#pwm-cells = <2>;
};