Linux 6.5-rc6
-----BEGIN PGP SIGNATURE----- iQFSBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmTZISMeHHRvcnZhbGRz QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGP+kH/RJWesO8dQ1b2jRh v1dexbytGUykROpmHBnJKDznwsSBnhDlI9Tu62dumWKRrCzwZto8Hag1QC2jYrra x7f3W087HdTSh3j5B92kGK/ZXgm4NwjVI078ujSv/e+qJMB3behpdL7uUkFUeeVV OaDhlSL4ILlyVOYPX3sHMiPutmZcXxe8/25o4aylpBrzlClKen7OODRz6gIwyVOR Nufgi/H5bkB4rDLOVI87HrxQMSpCtyGJtjTB78e/aRvIwYhJq16iuq+uBqOxQqgr anlg1nJ3r6/LphiT9H63xNFwIJDxtL7I1V8CQ9Jyvf/O4MNGSaM7sHw2l8ujTxU9 hf4GYyY= =loC2 -----END PGP SIGNATURE----- Merge tag 'v6.5-rc6' into icc-next The fixes that got merged into v6.5-rc6 are needed here. Signed-off-by: Georgi Djakov <djakov@kernel.org>
This commit is contained in:
Georgi Djakov
commit
a3dd14c0d0
101
.mailmap
101
.mailmap
@ -13,7 +13,9 @@
|
||||
Aaron Durbin <adurbin@google.com>
|
||||
Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
|
||||
Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
|
||||
Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
|
||||
Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
|
||||
Ahmad Masri <quic_amasri@quicinc.com> <amasri@codeaurora.org>
|
||||
Adam Oldham <oldhamca@gmail.com>
|
||||
Adam Radford <aradford@gmail.com>
|
||||
Adriana Reus <adi.reus@gmail.com> <adriana.reus@intel.com>
|
||||
@ -30,6 +32,7 @@ Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo
|
||||
Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
|
||||
Alexandre Belloni <alexandre.belloni@bootlin.com> <alexandre.belloni@free-electrons.com>
|
||||
Alexandre Ghiti <alex@ghiti.fr> <alexandre.ghiti@canonical.com>
|
||||
Alexei Avshalom Lazar <quic_ailizaro@quicinc.com> <ailizaro@codeaurora.org>
|
||||
Alexei Starovoitov <ast@kernel.org> <alexei.starovoitov@gmail.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@fb.com>
|
||||
Alexei Starovoitov <ast@kernel.org> <ast@plumgrid.com>
|
||||
@ -37,8 +40,11 @@ Alex Hung <alexhung@gmail.com> <alex.hung@canonical.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@intel.com>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linaro.org>
|
||||
Alex Shi <alexs@kernel.org> <alex.shi@linux.alibaba.com>
|
||||
Aloka Dixit <quic_alokad@quicinc.com> <alokad@codeaurora.org>
|
||||
Al Viro <viro@ftp.linux.org.uk>
|
||||
Al Viro <viro@zenIV.linux.org.uk>
|
||||
Amit Blay <quic_ablay@quicinc.com> <ablay@codeaurora.org>
|
||||
Amit Nischal <quic_anischal@quicinc.com> <anischal@codeaurora.org>
|
||||
Andi Kleen <ak@linux.intel.com> <ak@suse.de>
|
||||
Andi Shyti <andi@etezian.org> <andi.shyti@samsung.com>
|
||||
Andreas Herrmann <aherrman@de.ibm.com>
|
||||
@ -54,6 +60,8 @@ Andrey Ryabinin <ryabinin.a.a@gmail.com> <aryabinin@virtuozzo.com>
|
||||
Andrzej Hajda <andrzej.hajda@intel.com> <a.hajda@samsung.com>
|
||||
André Almeida <andrealmeid@igalia.com> <andrealmeid@collabora.com>
|
||||
Andy Adamson <andros@citi.umich.edu>
|
||||
Anilkumar Kolli <quic_akolli@quicinc.com> <akolli@codeaurora.org>
|
||||
Anirudh Ghayal <quic_aghayal@quicinc.com> <aghayal@codeaurora.org>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@bootlin.com>
|
||||
Antoine Tenart <atenart@kernel.org> <antoine.tenart@free-electrons.com>
|
||||
Antonio Ospite <ao2@ao2.it> <ao2@amarulasolutions.com>
|
||||
@ -62,9 +70,17 @@ Archit Taneja <archit@ti.com>
|
||||
Ard Biesheuvel <ardb@kernel.org> <ard.biesheuvel@linaro.org>
|
||||
Arnaud Patard <arnaud.patard@rtp-net.org>
|
||||
Arnd Bergmann <arnd@arndb.de>
|
||||
Arun Kumar Neelakantam <quic_aneela@quicinc.com> <aneela@codeaurora.org>
|
||||
Ashok Raj Nagarajan <quic_arnagara@quicinc.com> <arnagara@codeaurora.org>
|
||||
Ashwin Chaugule <quic_ashwinc@quicinc.com> <ashwinc@codeaurora.org>
|
||||
Asutosh Das <quic_asutoshd@quicinc.com> <asutoshd@codeaurora.org>
|
||||
Atish Patra <atishp@atishpatra.org> <atish.patra@wdc.com>
|
||||
Avaneesh Kumar Dwivedi <quic_akdwived@quicinc.com> <akdwived@codeaurora.org>
|
||||
Axel Dyks <xl@xlsigned.net>
|
||||
Axel Lin <axel.lin@gmail.com>
|
||||
Balakrishna Godavarthi <quic_bgodavar@quicinc.com> <bgodavar@codeaurora.org>
|
||||
Banajit Goswami <quic_bgoswami@quicinc.com> <bgoswami@codeaurora.org>
|
||||
Baochen Qiang <quic_bqiang@quicinc.com> <bqiang@codeaurora.org>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@linaro.org>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@spreadtrum.com>
|
||||
Baolin Wang <baolin.wang@linux.alibaba.com> <baolin.wang@unisoc.com>
|
||||
@ -93,12 +109,15 @@ Brian Avery <b.avery@hp.com>
|
||||
Brian King <brking@us.ibm.com>
|
||||
Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
|
||||
Cai Huoqing <cai.huoqing@linux.dev> <caihuoqing@baidu.com>
|
||||
Can Guo <quic_cang@quicinc.com> <cang@codeaurora.org>
|
||||
Carl Huang <quic_cjhuang@quicinc.com> <cjhuang@codeaurora.org>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
|
||||
Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
|
||||
Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
|
||||
Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
|
||||
Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
|
||||
Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <borntraeger@de.ibm.com>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <cborntra@de.ibm.com>
|
||||
Christian Borntraeger <borntraeger@linux.ibm.com> <borntrae@de.ibm.com>
|
||||
@ -119,7 +138,10 @@ Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
|
||||
Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
|
||||
David Brownell <david-b@pacbell.net>
|
||||
David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
|
||||
David Woodhouse <dwmw2@shinybook.infradead.org>
|
||||
Dedy Lansky <quic_dlansky@quicinc.com> <dlansky@codeaurora.org>
|
||||
Deepak Kumar Singh <quic_deesin@quicinc.com> <deesin@codeaurora.org>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com>
|
||||
Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com>
|
||||
@ -136,6 +158,7 @@ Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com>
|
||||
Domen Puncer <domen@coderock.org>
|
||||
Douglas Gilbert <dougg@torque.net>
|
||||
Ed L. Cashin <ecashin@coraid.com>
|
||||
Elliot Berman <quic_eberman@quicinc.com> <eberman@codeaurora.org>
|
||||
Enric Balletbo i Serra <eballetbo@kernel.org> <enric.balletbo@collabora.com>
|
||||
Enric Balletbo i Serra <eballetbo@kernel.org> <eballetbo@iseebcn.com>
|
||||
Erik Kaneda <erik.kaneda@intel.com> <erik.schmauss@intel.com>
|
||||
@ -148,6 +171,7 @@ Faith Ekstrand <faith.ekstrand@collabora.com> <jason.ekstrand@collabora.com>
|
||||
Felipe W Damasio <felipewd@terra.com.br>
|
||||
Felix Kuhling <fxkuehl@gmx.de>
|
||||
Felix Moeller <felix@derklecks.de>
|
||||
Fenglin Wu <quic_fenglinw@quicinc.com> <fenglinw@codeaurora.org>
|
||||
Filipe Lautert <filipe@icewall.org>
|
||||
Finn Thain <fthain@linux-m68k.org> <fthain@telegraphics.com.au>
|
||||
Franck Bui-Huu <vagabon.xyz@gmail.com>
|
||||
@ -171,8 +195,11 @@ Greg Kurz <groug@kaod.org> <gkurz@linux.vnet.ibm.com>
|
||||
Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
|
||||
Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@linux.vnet.ibm.com>
|
||||
Guilherme G. Piccoli <kernel@gpiccoli.net> <gpiccoli@canonical.com>
|
||||
Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> <gokulsri@codeaurora.org>
|
||||
Govindaraj Saminathan <quic_gsamin@quicinc.com> <gsamin@codeaurora.org>
|
||||
Guo Ren <guoren@kernel.org> <guoren@linux.alibaba.com>
|
||||
Guo Ren <guoren@kernel.org> <ren_guo@c-sky.com>
|
||||
Guru Das Srinagesh <quic_gurus@quicinc.com> <gurus@codeaurora.org>
|
||||
Gustavo Padovan <gustavo@las.ic.unicamp.br>
|
||||
Gustavo Padovan <padovan@profusion.mobi>
|
||||
Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
|
||||
@ -190,6 +217,7 @@ Huacai Chen <chenhuacai@kernel.org> <chenhuacai@loongson.cn>
|
||||
J. Bruce Fields <bfields@fieldses.org> <bfields@redhat.com>
|
||||
J. Bruce Fields <bfields@fieldses.org> <bfields@citi.umich.edu>
|
||||
Jacob Shin <Jacob.Shin@amd.com>
|
||||
Jack Pham <quic_jackp@quicinc.com> <jackp@codeaurora.org>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@google.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk.kim@samsung.com>
|
||||
Jaegeuk Kim <jaegeuk@kernel.org> <jaegeuk@motorola.com>
|
||||
@ -217,10 +245,12 @@ Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
|
||||
<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
Jeevan Shriram <quic_jshriram@quicinc.com> <jshriram@codeaurora.org>
|
||||
Jeff Garzik <jgarzik@pretzel.yyz.us>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com>
|
||||
Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com>
|
||||
Jeffrey Hugo <quic_jhugo@quicinc.com> <jhugo@codeaurora.org>
|
||||
Jens Axboe <axboe@kernel.dk> <axboe@suse.de>
|
||||
Jens Axboe <axboe@kernel.dk> <jens.axboe@oracle.com>
|
||||
Jens Axboe <axboe@kernel.dk> <axboe@fb.com>
|
||||
@ -228,6 +258,7 @@ Jens Axboe <axboe@kernel.dk> <axboe@meta.com>
|
||||
Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
|
||||
Jernej Skrabec <jernej.skrabec@gmail.com> <jernej.skrabec@siol.net>
|
||||
Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>
|
||||
Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
|
||||
Jiri Pirko <jiri@resnulli.us> <jiri@nvidia.com>
|
||||
Jiri Pirko <jiri@resnulli.us> <jiri@mellanox.com>
|
||||
Jiri Pirko <jiri@resnulli.us> <jpirko@redhat.com>
|
||||
@ -238,14 +269,17 @@ Jiri Slaby <jirislaby@kernel.org> <jslaby@suse.cz>
|
||||
Jiri Slaby <jirislaby@kernel.org> <xslaby@fi.muni.cz>
|
||||
Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com>
|
||||
Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com>
|
||||
Jishnu Prakash <quic_jprakash@quicinc.com> <jprakash@codeaurora.org>
|
||||
Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
|
||||
Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
|
||||
John Crispin <john@phrozen.org> <blogic@openwrt.org>
|
||||
John Fastabend <john.fastabend@gmail.com> <john.r.fastabend@intel.com>
|
||||
John Keeping <john@keeping.me.uk> <john@metanate.com>
|
||||
John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
|
||||
John Stultz <johnstul@us.ibm.com>
|
||||
<jon.toppins+linux@gmail.com> <jtoppins@cumulusnetworks.com>
|
||||
<jon.toppins+linux@gmail.com> <jtoppins@redhat.com>
|
||||
Jonas Gorski <jonas.gorski@gmail.com> <jogo@openwrt.org>
|
||||
Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
||||
<josh@joshtriplett.org> <josh@freedesktop.org>
|
||||
<josh@joshtriplett.org> <josh@kernel.org>
|
||||
@ -254,6 +288,7 @@ Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
|
||||
<josh@joshtriplett.org> <josht@vnet.ibm.com>
|
||||
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@redhat.com>
|
||||
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@us.ibm.com>
|
||||
Jouni Malinen <quic_jouni@quicinc.com> <jouni@codeaurora.org>
|
||||
Juha Yrjola <at solidboot.com>
|
||||
Juha Yrjola <juha.yrjola@nokia.com>
|
||||
Juha Yrjola <juha.yrjola@solidboot.com>
|
||||
@ -261,6 +296,8 @@ Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
|
||||
Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
|
||||
Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
|
||||
Kalyan Thota <quic_kalyant@quicinc.com> <kalyan_t@codeaurora.org>
|
||||
Karthikeyan Periyasamy <quic_periyasa@quicinc.com> <periyasa@codeaurora.org>
|
||||
Kathiravan T <quic_kathirav@quicinc.com> <kathirav@codeaurora.org>
|
||||
Kay Sievers <kay.sievers@vrfy.org>
|
||||
Kees Cook <keescook@chromium.org> <kees.cook@canonical.com>
|
||||
Kees Cook <keescook@chromium.org> <keescook@google.com>
|
||||
@ -269,6 +306,8 @@ Kees Cook <keescook@chromium.org> <kees@ubuntu.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@intel.com>
|
||||
Keith Busch <kbusch@kernel.org> <keith.busch@linux.intel.com>
|
||||
Kenneth W Chen <kenneth.w.chen@intel.com>
|
||||
Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org>
|
||||
Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org>
|
||||
Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
|
||||
Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
|
||||
@ -277,6 +316,7 @@ Krishna Manikandan <quic_mkrishn@quicinc.com> <mkrishn@codeaurora.org>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski@samsung.com>
|
||||
Krzysztof Kozlowski <krzk@kernel.org> <krzysztof.kozlowski@canonical.com>
|
||||
Kshitiz Godara <quic_kgodara@quicinc.com> <kgodara@codeaurora.org>
|
||||
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
|
||||
Kuogee Hsieh <quic_khsieh@quicinc.com> <khsieh@codeaurora.org>
|
||||
Lee Jones <lee@kernel.org> <joneslee@google.com>
|
||||
@ -290,19 +330,27 @@ Leonid I Ananiev <leonid.i.ananiev@intel.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leon@leon.nu>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@mellanox.com>
|
||||
Leon Romanovsky <leon@kernel.org> <leonro@nvidia.com>
|
||||
Liam Mark <quic_lmark@quicinc.com> <lmark@codeaurora.org>
|
||||
Linas Vepstas <linas@austin.ibm.com>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
|
||||
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
|
||||
<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
|
||||
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
|
||||
Lior David <quic_liord@quicinc.com> <liord@codeaurora.org>
|
||||
Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
|
||||
Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
|
||||
Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
|
||||
Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>
|
||||
Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
|
||||
Maciej W. Rozycki <macro@orcam.me.uk> <macro@linux-mips.org>
|
||||
Maharaja Kennadyrajan <quic_mkenna@quicinc.com> <mkenna@codeaurora.org>
|
||||
Maheshwar Ajja <quic_majja@quicinc.com> <majja@codeaurora.org>
|
||||
Malathi Gottam <quic_mgottam@quicinc.com> <mgottam@codeaurora.org>
|
||||
Manikanta Pubbisetty <quic_mpubbise@quicinc.com> <mpubbise@codeaurora.org>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannanece23@gmail.com>
|
||||
Manivannan Sadhasivam <mani@kernel.org> <manivannan.sadhasivam@linaro.org>
|
||||
Manoj Basapathi <quic_manojbm@quicinc.com> <manojbm@codeaurora.org>
|
||||
Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
|
||||
Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
|
||||
Marek Behún <kabel@kernel.org> <marek.behun@nic.cz>
|
||||
@ -332,6 +380,7 @@ Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting>
|
||||
Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.com>
|
||||
Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com>
|
||||
Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com>
|
||||
Maulik Shah <quic_mkshah@quicinc.com> <mkshah@codeaurora.org>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@brturbo.com.br>
|
||||
Mauro Carvalho Chehab <mchehab@kernel.org> <mchehab@infradead.org>
|
||||
@ -344,7 +393,10 @@ Maxim Mikityanskiy <maxtram95@gmail.com> <maximmi@nvidia.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime@cerno.tech>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com>
|
||||
Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com>
|
||||
Maya Erez <quic_merez@quicinc.com> <merez@codeaurora.org>
|
||||
Mayuresh Janorkar <mayur@ti.com>
|
||||
Md Sadre Alam <quic_mdalam@quicinc.com> <mdalam@codeaurora.org>
|
||||
Miaoqing Pan <quic_miaoqing@quicinc.com> <miaoqing@codeaurora.org>
|
||||
Michael Buesch <m@bues.ch>
|
||||
Michal Simek <michal.simek@amd.com> <michal.simek@xilinx.com>
|
||||
Michel Dänzer <michel@tungstengraphics.com>
|
||||
@ -355,6 +407,7 @@ Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
|
||||
Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
|
||||
Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
|
||||
Mike Tipton <quic_mdtipton@quicinc.com> <mdtipton@codeaurora.org>
|
||||
Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
|
||||
Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
|
||||
Mitesh shah <mshah@teja.com>
|
||||
@ -363,9 +416,13 @@ Morten Welinder <terra@gnome.org>
|
||||
Morten Welinder <welinder@anemone.rentec.com>
|
||||
Morten Welinder <welinder@darter.rentec.com>
|
||||
Morten Welinder <welinder@troll.com>
|
||||
Mukesh Ojha <quic_mojha@quicinc.com> <mojha@codeaurora.org>
|
||||
Muna Sinada <quic_msinada@quicinc.com> <msinada@codeaurora.org>
|
||||
Murali Nalajala <quic_mnalajal@quicinc.com> <mnalajal@codeaurora.org>
|
||||
Mythri P K <mythripk@ti.com>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neeraj Upadhyay <quic_neeraju@quicinc.com> <neeraju@codeaurora.org>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
|
||||
@ -384,6 +441,7 @@ Nikolay Aleksandrov <razor@blackwall.org> <nikolay@redhat.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@cumulusnetworks.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@nvidia.com>
|
||||
Nikolay Aleksandrov <razor@blackwall.org> <nikolay@isovalent.com>
|
||||
Odelu Kukatla <quic_okukatla@quicinc.com> <okukatla@codeaurora.org>
|
||||
Oleksandr Natalenko <oleksandr@natalenko.name> <oleksandr@redhat.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <bug-track@fisher-privat.net>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <external.Oleksij.Rempel@de.bosch.com>
|
||||
@ -391,6 +449,7 @@ Oleksij Rempel <linux@rempel-privat.de> <fixed-term.Oleksij.Rempel@de.bosch.com>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <o.rempel@pengutronix.de>
|
||||
Oleksij Rempel <linux@rempel-privat.de> <ore@pengutronix.de>
|
||||
Oliver Upton <oliver.upton@linux.dev> <oupton@google.com>
|
||||
Oza Pawandeep <quic_poza@quicinc.com> <poza@codeaurora.org>
|
||||
Pali Rohár <pali@kernel.org> <pali.rohar@gmail.com>
|
||||
Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
|
||||
Patrick Mochel <mochel@digitalimplant.org>
|
||||
@ -402,11 +461,14 @@ Paul E. McKenney <paulmck@kernel.org> <paulmck@linux.vnet.ibm.com>
|
||||
Paul E. McKenney <paulmck@kernel.org> <paulmck@us.ibm.com>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@samba.org>
|
||||
Paul Mackerras <paulus@ozlabs.org> <paulus@au1.ibm.com>
|
||||
Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
|
||||
Peter A Jonsson <pj@ludd.ltu.se>
|
||||
Peter Oruba <peter.oruba@amd.com>
|
||||
Peter Oruba <peter@oruba.de>
|
||||
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
|
||||
Praveen BP <praveenbp@ti.com>
|
||||
Pradeep Kumar Chitrapu <quic_pradeepc@quicinc.com> <pradeepc@codeaurora.org>
|
||||
Prasad Sodagudi <quic_psodagud@quicinc.com> <psodagud@codeaurora.org>
|
||||
Punit Agrawal <punitagrawal@gmail.com> <punit.agrawal@arm.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@imgtec.com>
|
||||
Qais Yousef <qyousef@layalina.io> <qais.yousef@arm.com>
|
||||
@ -415,10 +477,16 @@ Quentin Perret <qperret@qperret.net> <quentin.perret@arm.com>
|
||||
Rafael J. Wysocki <rjw@rjwysocki.net> <rjw@sisk.pl>
|
||||
Rajeev Nandan <quic_rajeevny@quicinc.com> <rajeevny@codeaurora.org>
|
||||
Rajendra Nayak <quic_rjendra@quicinc.com> <rnayak@codeaurora.org>
|
||||
Rajeshwari Ravindra Kamble <quic_rkambl@quicinc.com> <rkambl@codeaurora.org>
|
||||
Raju P.L.S.S.S.N <quic_rplsssn@quicinc.com> <rplsssn@codeaurora.org>
|
||||
Rajesh Shah <rajesh.shah@intel.com>
|
||||
Rakesh Pillai <quic_pillair@quicinc.com> <pillair@codeaurora.org>
|
||||
Ralf Baechle <ralf@linux-mips.org>
|
||||
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
|
||||
Ram Chandra Jangir <quic_rjangir@quicinc.com> <rjangir@codeaurora.org>
|
||||
Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net>
|
||||
Ravi Kumar Bokka <quic_rbokka@quicinc.com> <rbokka@codeaurora.org>
|
||||
Ravi Kumar Siddojigari <quic_rsiddoji@quicinc.com> <rsiddoji@codeaurora.org>
|
||||
Rémi Denis-Courmont <rdenis@simphalempin.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> <ricardo@ribalda.com>
|
||||
Ricardo Ribalda <ribalda@kernel.org> Ricardo Ribalda Delgado <ribalda@kernel.org>
|
||||
@ -427,6 +495,7 @@ Richard Leitner <richard.leitner@linux.dev> <dev@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <me@g0hl1n.net>
|
||||
Richard Leitner <richard.leitner@linux.dev> <richard.leitner@skidata.com>
|
||||
Robert Foss <rfoss@kernel.org> <robert.foss@linaro.org>
|
||||
Rocky Liao <quic_rjliao@quicinc.com> <rjliao@codeaurora.org>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guro@fb.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <guroan@gmail.com>
|
||||
Roman Gushchin <roman.gushchin@linux.dev> <klamm@yandex-team.ru>
|
||||
@ -444,22 +513,35 @@ Santosh Shilimkar <santosh.shilimkar@oracle.org>
|
||||
Santosh Shilimkar <ssantosh@kernel.org>
|
||||
Sarangdhar Joshi <spjoshi@codeaurora.org>
|
||||
Sascha Hauer <s.hauer@pengutronix.de>
|
||||
Sahitya Tummala <quic_stummala@quicinc.com> <stummala@codeaurora.org>
|
||||
Sathishkumar Muruganandam <quic_murugana@quicinc.com> <murugana@codeaurora.org>
|
||||
Satya Priya <quic_c_skakit@quicinc.com> <skakit@codeaurora.org>
|
||||
S.Çağlar Onur <caglar@pardus.org.tr>
|
||||
Sayali Lokhande <quic_sayalil@quicinc.com> <sayalil@codeaurora.org>
|
||||
Sean Christopherson <seanjc@google.com> <sean.j.christopherson@intel.com>
|
||||
Sean Nyekjaer <sean@geanix.com> <sean.nyekjaer@prevas.dk>
|
||||
Sean Tranchetti <quic_stranche@quicinc.com> <stranche@codeaurora.org>
|
||||
Sebastian Reichel <sre@kernel.org> <sebastian.reichel@collabora.co.uk>
|
||||
Sebastian Reichel <sre@kernel.org> <sre@debian.org>
|
||||
Sedat Dilek <sedat.dilek@gmail.com> <sedat.dilek@credativ.de>
|
||||
Senthilkumar N L <quic_snlakshm@quicinc.com> <snlakshm@codeaurora.org>
|
||||
Seth Forshee <sforshee@kernel.org> <seth.forshee@canonical.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <snelson@pensando.io>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@intel.com>
|
||||
Shannon Nelson <shannon.nelson@amd.com> <shannon.nelson@oracle.com>
|
||||
Sharath Chandra Vurukala <quic_sharathv@quicinc.com> <sharathv@codeaurora.org>
|
||||
Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.khan@hp.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuahkh@osg.samsung.com>
|
||||
Shuah Khan <shuah@kernel.org> <shuah.kh@samsung.com>
|
||||
Sibi Sankar <quic_sibis@quicinc.com> <sibis@codeaurora.org>
|
||||
Sid Manning <quic_sidneym@quicinc.com> <sidneym@codeaurora.org>
|
||||
Simon Arlott <simon@octiron.net> <simon@fire.lp0.eu>
|
||||
Simon Kelley <simon@thekelleys.org.uk>
|
||||
Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
|
||||
Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
|
||||
Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
|
||||
Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@linux-foundation.org>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <shemminger@osdl.org>
|
||||
@ -467,22 +549,30 @@ Stephen Hemminger <stephen@networkplumber.org> <sthemmin@microsoft.com>
|
||||
Stephen Hemminger <stephen@networkplumber.org> <sthemmin@vyatta.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@chelsio.com>
|
||||
Steve Wise <larrystevenwise@gmail.com> <swise@opengridcomputing.com>
|
||||
Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
|
||||
Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> <subashab@codeaurora.org>
|
||||
Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org>
|
||||
Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>
|
||||
Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
|
||||
Sumit Semwal <sumit.semwal@ti.com>
|
||||
Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>
|
||||
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
|
||||
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
|
||||
Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
|
||||
Tejun Heo <htejun@gmail.com>
|
||||
Thomas Graf <tgraf@suug.ch>
|
||||
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
|
||||
Thomas Pedersen <twp@codeaurora.org>
|
||||
Tiezhu Yang <yangtiezhu@loongson.cn> <kernelpatch@126.com>
|
||||
Tingwei Zhang <quic_tingwei@quicinc.com> <tingwei@codeaurora.org>
|
||||
Tirupathi Reddy <quic_tirupath@quicinc.com> <tirupath@codeaurora.org>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tobias.klauser@gmail.com>
|
||||
Tobias Klauser <tklauser@distanz.ch> <klto@zhaw.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@nuerscht.ch>
|
||||
Tobias Klauser <tklauser@distanz.ch> <tklauser@xenon.tklauser.home>
|
||||
Todor Tomov <todor.too@gmail.com> <todor.tomov@linaro.org>
|
||||
Tony Luck <tony.luck@intel.com>
|
||||
Trilok Soni <quic_tsoni@quicinc.com> <tsoni@codeaurora.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <triplex@zh-kernel.org>
|
||||
TripleX Chung <xxx.phy@gmail.com> <zhongyu@18mail.cn>
|
||||
Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
|
||||
@ -495,11 +585,17 @@ Uwe Kleine-König <ukleinek@strlen.de>
|
||||
Uwe Kleine-König <ukl@pengutronix.de>
|
||||
Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
|
||||
Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
|
||||
Vara Reddy <quic_varar@quicinc.com> <varar@codeaurora.org>
|
||||
Varadarajan Narayanan <quic_varada@quicinc.com> <varada@codeaurora.org>
|
||||
Vasanthakumar Thiagarajan <quic_vthiagar@quicinc.com> <vthiagar@codeaurora.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@virtuozzo.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@openvz.org>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@parallels.com>
|
||||
Vasily Averin <vasily.averin@linux.dev> <vvs@sw.ru>
|
||||
Valentin Schneider <vschneid@redhat.com> <valentin.schneider@arm.com>
|
||||
Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org>
|
||||
Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org>
|
||||
Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org>
|
||||
Vikash Garodia <quic_vgarodia@quicinc.com> <vgarodia@codeaurora.org>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@intel.com>
|
||||
Vinod Koul <vkoul@kernel.org> <vinod.koul@linux.intel.com>
|
||||
@ -509,11 +605,14 @@ Viresh Kumar <vireshk@kernel.org> <viresh.kumar@st.com>
|
||||
Viresh Kumar <vireshk@kernel.org> <viresh.linux@gmail.com>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.org>
|
||||
Viresh Kumar <viresh.kumar@linaro.org> <viresh.kumar@linaro.com>
|
||||
Vivek Aknurwar <quic_viveka@quicinc.com> <viveka@codeaurora.org>
|
||||
Vivien Didelot <vivien.didelot@gmail.com> <vivien.didelot@savoirfairelinux.com>
|
||||
Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
|
||||
Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
|
||||
WeiXiong Liao <gmpy.liaowx@gmail.com> <liaoweixiong@allwinnertech.com>
|
||||
Wen Gong <quic_wgong@quicinc.com> <wgong@codeaurora.org>
|
||||
Wesley Cheng <quic_wcheng@quicinc.com> <wcheng@codeaurora.org>
|
||||
Will Deacon <will@kernel.org> <will.deacon@arm.com>
|
||||
Wolfram Sang <wsa@kernel.org> <w.sang@pengutronix.de>
|
||||
Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
|
||||
|
||||
@ -82,7 +82,12 @@ Description:
|
||||
whether it resides in persistent capacity, volatile capacity,
|
||||
or the LSA, is made permanently unavailable by whatever means
|
||||
is appropriate for the media type. This functionality requires
|
||||
the device to be not be actively decoding any HPA ranges.
|
||||
the device to be disabled, that is, not actively decoding any
|
||||
HPA ranges. This permits avoiding explicit global CPU cache
|
||||
management, relying instead for it to be done when a region
|
||||
transitions between software programmed and hardware committed
|
||||
states. If this file is not present, then there is no hardware
|
||||
support for the operation.
|
||||
|
||||
|
||||
What /sys/bus/cxl/devices/memX/security/erase
|
||||
@ -92,7 +97,13 @@ Contact: linux-cxl@vger.kernel.org
|
||||
Description:
|
||||
(WO) Write a boolean 'true' string value to this attribute to
|
||||
secure erase user data by changing the media encryption keys for
|
||||
all user data areas of the device.
|
||||
all user data areas of the device. This functionality requires
|
||||
the device to be disabled, that is, not actively decoding any
|
||||
HPA ranges. This permits avoiding explicit global CPU cache
|
||||
management, relying instead for it to be done when a region
|
||||
transitions between software programmed and hardware committed
|
||||
states. If this file is not present, then there is no hardware
|
||||
support for the operation.
|
||||
|
||||
|
||||
What: /sys/bus/cxl/devices/memX/firmware/
|
||||
|
||||
@ -513,17 +513,18 @@ Description: information about CPUs heterogeneity.
|
||||
cpu_capacity: capacity of cpuX.
|
||||
|
||||
What: /sys/devices/system/cpu/vulnerabilities
|
||||
/sys/devices/system/cpu/vulnerabilities/meltdown
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v1
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v2
|
||||
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
|
||||
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
|
||||
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
|
||||
/sys/devices/system/cpu/vulnerabilities/l1tf
|
||||
/sys/devices/system/cpu/vulnerabilities/mds
|
||||
/sys/devices/system/cpu/vulnerabilities/srbds
|
||||
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
|
||||
/sys/devices/system/cpu/vulnerabilities/itlb_multihit
|
||||
/sys/devices/system/cpu/vulnerabilities/meltdown
|
||||
/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
|
||||
/sys/devices/system/cpu/vulnerabilities/retbleed
|
||||
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v1
|
||||
/sys/devices/system/cpu/vulnerabilities/spectre_v2
|
||||
/sys/devices/system/cpu/vulnerabilities/srbds
|
||||
/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
|
||||
Date: January 2018
|
||||
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
|
||||
Description: Information about CPU vulnerabilities
|
||||
|
||||
@ -994,7 +994,7 @@ Description: This file shows the amount of physical memory needed
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/rpm_lvl
|
||||
What: /sys/bus/platform/devices/*.ufs/rpm_lvl
|
||||
Date: September 2014
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry could be used to set or show the UFS device
|
||||
runtime power management level. The current driver
|
||||
implementation supports 7 levels with next target states:
|
||||
@ -1021,7 +1021,7 @@ Description: This entry could be used to set or show the UFS device
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/rpm_target_dev_state
|
||||
What: /sys/bus/platform/devices/*.ufs/rpm_target_dev_state
|
||||
Date: February 2018
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry shows the target power mode of an UFS device
|
||||
for the chosen runtime power management level.
|
||||
|
||||
@ -1030,7 +1030,7 @@ Description: This entry shows the target power mode of an UFS device
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/rpm_target_link_state
|
||||
What: /sys/bus/platform/devices/*.ufs/rpm_target_link_state
|
||||
Date: February 2018
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry shows the target state of an UFS UIC link
|
||||
for the chosen runtime power management level.
|
||||
|
||||
@ -1039,7 +1039,7 @@ Description: This entry shows the target state of an UFS UIC link
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/spm_lvl
|
||||
What: /sys/bus/platform/devices/*.ufs/spm_lvl
|
||||
Date: September 2014
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry could be used to set or show the UFS device
|
||||
system power management level. The current driver
|
||||
implementation supports 7 levels with next target states:
|
||||
@ -1066,7 +1066,7 @@ Description: This entry could be used to set or show the UFS device
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/spm_target_dev_state
|
||||
What: /sys/bus/platform/devices/*.ufs/spm_target_dev_state
|
||||
Date: February 2018
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry shows the target power mode of an UFS device
|
||||
for the chosen system power management level.
|
||||
|
||||
@ -1075,7 +1075,7 @@ Description: This entry shows the target power mode of an UFS device
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/spm_target_link_state
|
||||
What: /sys/bus/platform/devices/*.ufs/spm_target_link_state
|
||||
Date: February 2018
|
||||
Contact: Subhash Jadavani <subhashj@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This entry shows the target state of an UFS UIC link
|
||||
for the chosen system power management level.
|
||||
|
||||
@ -1084,7 +1084,7 @@ Description: This entry shows the target state of an UFS UIC link
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/monitor_enable
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/monitor_enable
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the status of performance monitor enablement
|
||||
and it can be used to start/stop the monitor. When the monitor
|
||||
is stopped, the performance data collected is also cleared.
|
||||
@ -1092,7 +1092,7 @@ Description: This file shows the status of performance monitor enablement
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/monitor_chunk_size
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/monitor_chunk_size
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file tells the monitor to focus on requests transferring
|
||||
data of specific chunk size (in Bytes). 0 means any chunk size.
|
||||
It can only be changed when monitor is disabled.
|
||||
@ -1100,7 +1100,7 @@ Description: This file tells the monitor to focus on requests transferring
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_total_sectors
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_total_sectors
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how many sectors (in 512 Bytes) have been
|
||||
sent from device to host after monitor gets started.
|
||||
|
||||
@ -1109,7 +1109,7 @@ Description: This file shows how many sectors (in 512 Bytes) have been
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_total_busy
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_total_busy
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how long (in micro seconds) has been spent
|
||||
sending data from device to host after monitor gets started.
|
||||
|
||||
@ -1118,7 +1118,7 @@ Description: This file shows how long (in micro seconds) has been spent
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_nr_requests
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_nr_requests
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how many read requests have been sent after
|
||||
monitor gets started.
|
||||
|
||||
@ -1127,7 +1127,7 @@ Description: This file shows how many read requests have been sent after
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_req_latency_max
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_req_latency_max
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the maximum latency (in micro seconds) of
|
||||
read requests after monitor gets started.
|
||||
|
||||
@ -1136,7 +1136,7 @@ Description: This file shows the maximum latency (in micro seconds) of
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_req_latency_min
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_req_latency_min
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the minimum latency (in micro seconds) of
|
||||
read requests after monitor gets started.
|
||||
|
||||
@ -1145,7 +1145,7 @@ Description: This file shows the minimum latency (in micro seconds) of
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_req_latency_avg
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_req_latency_avg
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the average latency (in micro seconds) of
|
||||
read requests after monitor gets started.
|
||||
|
||||
@ -1154,7 +1154,7 @@ Description: This file shows the average latency (in micro seconds) of
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/read_req_latency_sum
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/read_req_latency_sum
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the total latency (in micro seconds) of
|
||||
read requests sent after monitor gets started.
|
||||
|
||||
@ -1163,7 +1163,7 @@ Description: This file shows the total latency (in micro seconds) of
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_total_sectors
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_total_sectors
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how many sectors (in 512 Bytes) have been sent
|
||||
from host to device after monitor gets started.
|
||||
|
||||
@ -1172,7 +1172,7 @@ Description: This file shows how many sectors (in 512 Bytes) have been sent
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_total_busy
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_total_busy
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how long (in micro seconds) has been spent
|
||||
sending data from host to device after monitor gets started.
|
||||
|
||||
@ -1181,7 +1181,7 @@ Description: This file shows how long (in micro seconds) has been spent
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_nr_requests
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_nr_requests
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows how many write requests have been sent after
|
||||
monitor gets started.
|
||||
|
||||
@ -1190,7 +1190,7 @@ Description: This file shows how many write requests have been sent after
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_req_latency_max
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_req_latency_max
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the maximum latency (in micro seconds) of write
|
||||
requests after monitor gets started.
|
||||
|
||||
@ -1199,7 +1199,7 @@ Description: This file shows the maximum latency (in micro seconds) of write
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_req_latency_min
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_req_latency_min
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the minimum latency (in micro seconds) of write
|
||||
requests after monitor gets started.
|
||||
|
||||
@ -1208,7 +1208,7 @@ Description: This file shows the minimum latency (in micro seconds) of write
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_req_latency_avg
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_req_latency_avg
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the average latency (in micro seconds) of write
|
||||
requests after monitor gets started.
|
||||
|
||||
@ -1217,7 +1217,7 @@ Description: This file shows the average latency (in micro seconds) of write
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/monitor/write_req_latency_sum
|
||||
What: /sys/bus/platform/devices/*.ufs/monitor/write_req_latency_sum
|
||||
Date: January 2021
|
||||
Contact: Can Guo <cang@codeaurora.org>
|
||||
Contact: Can Guo <quic_cang@quicinc.com>
|
||||
Description: This file shows the total latency (in micro seconds) of write
|
||||
requests after monitor gets started.
|
||||
|
||||
@ -1226,7 +1226,7 @@ Description: This file shows the total latency (in micro seconds) of write
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/wb_presv_us_en
|
||||
What: /sys/bus/platform/devices/*.ufs/device_descriptor/wb_presv_us_en
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows if preserve user-space was configured
|
||||
|
||||
The file is read only.
|
||||
@ -1234,7 +1234,7 @@ Description: This entry shows if preserve user-space was configured
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/wb_shared_alloc_units
|
||||
What: /sys/bus/platform/devices/*.ufs/device_descriptor/wb_shared_alloc_units
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the shared allocated units of WB buffer
|
||||
|
||||
The file is read only.
|
||||
@ -1242,7 +1242,7 @@ Description: This entry shows the shared allocated units of WB buffer
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/device_descriptor/wb_type
|
||||
What: /sys/bus/platform/devices/*.ufs/device_descriptor/wb_type
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the configured WB type.
|
||||
0x1 for shared buffer mode. 0x0 for dedicated buffer mode.
|
||||
|
||||
@ -1251,7 +1251,7 @@ Description: This entry shows the configured WB type.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/wb_buff_cap_adj
|
||||
What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/wb_buff_cap_adj
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the total user-space decrease in shared
|
||||
buffer mode.
|
||||
The value of this parameter is 3 for TLC NAND when SLC mode
|
||||
@ -1262,7 +1262,7 @@ Description: This entry shows the total user-space decrease in shared
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/wb_max_alloc_units
|
||||
What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/wb_max_alloc_units
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the Maximum total WriteBooster Buffer size
|
||||
which is supported by the entire device.
|
||||
|
||||
@ -1271,7 +1271,7 @@ Description: This entry shows the Maximum total WriteBooster Buffer size
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/wb_max_wb_luns
|
||||
What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/wb_max_wb_luns
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the maximum number of luns that can support
|
||||
WriteBooster.
|
||||
|
||||
@ -1280,7 +1280,7 @@ Description: This entry shows the maximum number of luns that can support
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/wb_sup_red_type
|
||||
What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/wb_sup_red_type
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: The supportability of user space reduction mode
|
||||
and preserve user space mode.
|
||||
00h: WriteBooster Buffer can be configured only in
|
||||
@ -1295,7 +1295,7 @@ Description: The supportability of user space reduction mode
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/geometry_descriptor/wb_sup_wb_type
|
||||
What: /sys/bus/platform/devices/*.ufs/geometry_descriptor/wb_sup_wb_type
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: The supportability of WriteBooster Buffer type.
|
||||
|
||||
=== ==========================================================
|
||||
@ -1310,7 +1310,7 @@ Description: The supportability of WriteBooster Buffer type.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/flags/wb_enable
|
||||
What: /sys/bus/platform/devices/*.ufs/flags/wb_enable
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the status of WriteBooster.
|
||||
|
||||
== ============================
|
||||
@ -1323,7 +1323,7 @@ Description: This entry shows the status of WriteBooster.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/flags/wb_flush_en
|
||||
What: /sys/bus/platform/devices/*.ufs/flags/wb_flush_en
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows if flush is enabled.
|
||||
|
||||
== =================================
|
||||
@ -1336,7 +1336,7 @@ Description: This entry shows if flush is enabled.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/flags/wb_flush_during_h8
|
||||
What: /sys/bus/platform/devices/*.ufs/flags/wb_flush_during_h8
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: Flush WriteBooster Buffer during hibernate state.
|
||||
|
||||
== =================================================
|
||||
@ -1351,7 +1351,7 @@ Description: Flush WriteBooster Buffer during hibernate state.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_avail_buf
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/wb_avail_buf
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the amount of unused WriteBooster buffer
|
||||
available.
|
||||
|
||||
@ -1360,7 +1360,7 @@ Description: This entry shows the amount of unused WriteBooster buffer
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_cur_buf
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/wb_cur_buf
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the amount of unused current buffer.
|
||||
|
||||
The file is read only.
|
||||
@ -1368,7 +1368,7 @@ Description: This entry shows the amount of unused current buffer.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_flush_status
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/wb_flush_status
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the flush operation status.
|
||||
|
||||
|
||||
@ -1385,7 +1385,7 @@ Description: This entry shows the flush operation status.
|
||||
What: /sys/bus/platform/drivers/ufshcd/*/attributes/wb_life_time_est
|
||||
What: /sys/bus/platform/devices/*.ufs/attributes/wb_life_time_est
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows an indication of the WriteBooster Buffer
|
||||
lifetime based on the amount of performed program/erase cycles
|
||||
|
||||
@ -1399,7 +1399,7 @@ Description: This entry shows an indication of the WriteBooster Buffer
|
||||
|
||||
What: /sys/class/scsi_device/*/device/unit_descriptor/wb_buf_alloc_units
|
||||
Date: June 2020
|
||||
Contact: Asutosh Das <asutoshd@codeaurora.org>
|
||||
Contact: Asutosh Das <quic_asutoshd@quicinc.com>
|
||||
Description: This entry shows the configured size of WriteBooster buffer.
|
||||
0400h corresponds to 4GB.
|
||||
|
||||
|
||||
@ -60,3 +60,14 @@ Description: Module taint flags:
|
||||
C staging driver module
|
||||
E unsigned module
|
||||
== =====================
|
||||
|
||||
What: /sys/module/grant_table/parameters/free_per_iteration
|
||||
Date: July 2023
|
||||
KernelVersion: 6.5 but backported to all supported stable branches
|
||||
Contact: Xen developer discussion <xen-devel@lists.xenproject.org>
|
||||
Description: Read and write number of grant entries to attempt to free per iteration.
|
||||
|
||||
Note: Future versions of Xen and Linux may provide a better
|
||||
interface for controlling the rate of deferred grant reclaim
|
||||
or may not need it at all.
|
||||
Users: Qubes OS (https://www.qubes-os.org)
|
||||
|
||||
@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-*/chid
|
||||
/sys/devices/platform/QCOM8061:*/chid
|
||||
Date: Dec 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains the ID of the channel within the HIDMA instance.
|
||||
It is used to associate a given HIDMA channel with the
|
||||
|
||||
@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
|
||||
/sys/devices/platform/QCOM8060:*/chanops/chan*/priority
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains either 0 or 1 and indicates if the DMA channel is a
|
||||
low priority (0) or high priority (1) channel.
|
||||
@ -11,7 +11,7 @@ What: /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
|
||||
/sys/devices/platform/QCOM8060:*/chanops/chan*/weight
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains 0..15 and indicates the weight of the channel among
|
||||
equal priority channels during round robin scheduling.
|
||||
@ -20,7 +20,7 @@ What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
|
||||
/sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains the platform specific cycle value to wait after a
|
||||
reset command is issued. If the value is chosen too short,
|
||||
@ -32,7 +32,7 @@ What: /sys/devices/platform/hidma-mgmt*/dma_channels
|
||||
/sys/devices/platform/QCOM8060:*/dma_channels
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains the number of dma channels supported by one instance
|
||||
of HIDMA hardware. The value may change from chip to chip.
|
||||
@ -41,7 +41,7 @@ What: /sys/devices/platform/hidma-mgmt*/hw_version_major
|
||||
/sys/devices/platform/QCOM8060:*/hw_version_major
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Version number major for the hardware.
|
||||
|
||||
@ -49,7 +49,7 @@ What: /sys/devices/platform/hidma-mgmt*/hw_version_minor
|
||||
/sys/devices/platform/QCOM8060:*/hw_version_minor
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Version number minor for the hardware.
|
||||
|
||||
@ -57,7 +57,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions
|
||||
/sys/devices/platform/QCOM8060:*/max_rd_xactions
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains a value between 0 and 31. Maximum number of
|
||||
read transactions that can be issued back to back.
|
||||
@ -69,7 +69,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_read_request
|
||||
/sys/devices/platform/QCOM8060:*/max_read_request
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Size of each read request. The value needs to be a power
|
||||
of two and can be between 128 and 1024.
|
||||
@ -78,7 +78,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_wr_xactions
|
||||
/sys/devices/platform/QCOM8060:*/max_wr_xactions
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Contains a value between 0 and 31. Maximum number of
|
||||
write transactions that can be issued back to back.
|
||||
@ -91,7 +91,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_write_request
|
||||
/sys/devices/platform/QCOM8060:*/max_write_request
|
||||
Date: Nov 2015
|
||||
KernelVersion: 4.4
|
||||
Contact: "Sinan Kaya <okaya@codeaurora.org>"
|
||||
Contact: "Sinan Kaya <okaya@kernel.org>"
|
||||
Description:
|
||||
Size of each write request. The value needs to be a power
|
||||
of two and can be between 128 and 1024.
|
||||
|
||||
@ -2691,7 +2691,7 @@
|
||||
45 = /dev/ttyMM1 Marvell MPSC - port 1 (obsolete unused)
|
||||
46 = /dev/ttyCPM0 PPC CPM (SCC or SMC) - port 0
|
||||
...
|
||||
47 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 5
|
||||
49 = /dev/ttyCPM5 PPC CPM (SCC or SMC) - port 3
|
||||
50 = /dev/ttyIOC0 Altix serial card
|
||||
...
|
||||
81 = /dev/ttyIOC31 Altix serial card
|
||||
|
||||
109
Documentation/admin-guide/hw-vuln/gather_data_sampling.rst
Normal file
109
Documentation/admin-guide/hw-vuln/gather_data_sampling.rst
Normal file
@ -0,0 +1,109 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
GDS - Gather Data Sampling
|
||||
==========================
|
||||
|
||||
Gather Data Sampling is a hardware vulnerability which allows unprivileged
|
||||
speculative access to data which was previously stored in vector registers.
|
||||
|
||||
Problem
|
||||
-------
|
||||
When a gather instruction performs loads from memory, different data elements
|
||||
are merged into the destination vector register. However, when a gather
|
||||
instruction that is transiently executed encounters a fault, stale data from
|
||||
architectural or internal vector registers may get transiently forwarded to the
|
||||
destination vector register instead. This will allow a malicious attacker to
|
||||
infer stale data using typical side channel techniques like cache timing
|
||||
attacks. GDS is a purely sampling-based attack.
|
||||
|
||||
The attacker uses gather instructions to infer the stale vector register data.
|
||||
The victim does not need to do anything special other than use the vector
|
||||
registers. The victim does not need to use gather instructions to be
|
||||
vulnerable.
|
||||
|
||||
Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
|
||||
are possible.
|
||||
|
||||
Attack scenarios
|
||||
----------------
|
||||
Without mitigation, GDS can infer stale data across virtually all
|
||||
permission boundaries:
|
||||
|
||||
Non-enclaves can infer SGX enclave data
|
||||
Userspace can infer kernel data
|
||||
Guests can infer data from hosts
|
||||
Guest can infer guest from other guests
|
||||
Users can infer data from other users
|
||||
|
||||
Because of this, it is important to ensure that the mitigation stays enabled in
|
||||
lower-privilege contexts like guests and when running outside SGX enclaves.
|
||||
|
||||
The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
|
||||
that guests are not allowed to disable the GDS mitigation. If a host erred and
|
||||
allowed this, a guest could theoretically disable GDS mitigation, mount an
|
||||
attack, and re-enable it.
|
||||
|
||||
Mitigation mechanism
|
||||
--------------------
|
||||
This issue is mitigated in microcode. The microcode defines the following new
|
||||
bits:
|
||||
|
||||
================================ === ============================
|
||||
IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
|
||||
and mitigation support.
|
||||
IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
|
||||
IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
|
||||
0 by default.
|
||||
IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
|
||||
to GDS_MITG_DIS are ignored
|
||||
Can't be cleared once set.
|
||||
================================ === ============================
|
||||
|
||||
GDS can also be mitigated on systems that don't have updated microcode by
|
||||
disabling AVX. This can be done by setting gather_data_sampling="force" or
|
||||
"clearcpuid=avx" on the kernel command-line.
|
||||
|
||||
If used, these options will disable AVX use by turning off XSAVE YMM support.
|
||||
However, the processor will still enumerate AVX support. Userspace that
|
||||
does not follow proper AVX enumeration to check both AVX *and* XSAVE YMM
|
||||
support will break.
|
||||
|
||||
Mitigation control on the kernel command line
|
||||
---------------------------------------------
|
||||
The mitigation can be disabled by setting "gather_data_sampling=off" or
|
||||
"mitigations=off" on the kernel command line. Not specifying either will default
|
||||
to the mitigation being enabled. Specifying "gather_data_sampling=force" will
|
||||
use the microcode mitigation when available or disable AVX on affected systems
|
||||
where the microcode hasn't been updated to include the mitigation.
|
||||
|
||||
GDS System Information
|
||||
------------------------
|
||||
The kernel provides vulnerability status information through sysfs. For
|
||||
GDS this can be accessed by the following sysfs file:
|
||||
|
||||
/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
|
||||
|
||||
The possible values contained in this file are:
|
||||
|
||||
============================== =============================================
|
||||
Not affected Processor not vulnerable.
|
||||
Vulnerable Processor vulnerable and mitigation disabled.
|
||||
Vulnerable: No microcode Processor vulnerable and microcode is missing
|
||||
mitigation.
|
||||
Mitigation: AVX disabled,
|
||||
no microcode Processor is vulnerable and microcode is missing
|
||||
mitigation. AVX disabled as mitigation.
|
||||
Mitigation: Microcode Processor is vulnerable and mitigation is in
|
||||
effect.
|
||||
Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
|
||||
effect and cannot be disabled.
|
||||
Unknown: Dependent on
|
||||
hypervisor status Running on a virtual guest processor that is
|
||||
affected but with no way to know if host
|
||||
processor is mitigated or vulnerable.
|
||||
============================== =============================================
|
||||
|
||||
GDS Default mitigation
|
||||
----------------------
|
||||
The updated microcode will enable the mitigation by default. The kernel's
|
||||
default action is to leave the mitigation enabled.
|
||||
@ -13,9 +13,11 @@ are configurable at compile, boot or run time.
|
||||
l1tf
|
||||
mds
|
||||
tsx_async_abort
|
||||
multihit.rst
|
||||
special-register-buffer-data-sampling.rst
|
||||
core-scheduling.rst
|
||||
l1d_flush.rst
|
||||
processor_mmio_stale_data.rst
|
||||
cross-thread-rsb.rst
|
||||
multihit
|
||||
special-register-buffer-data-sampling
|
||||
core-scheduling
|
||||
l1d_flush
|
||||
processor_mmio_stale_data
|
||||
cross-thread-rsb
|
||||
srso
|
||||
gather_data_sampling
|
||||
|
||||
@ -484,11 +484,14 @@ Spectre variant 2
|
||||
|
||||
Systems which support enhanced IBRS (eIBRS) enable IBRS protection once at
|
||||
boot, by setting the IBRS bit, and they're automatically protected against
|
||||
Spectre v2 variant attacks, including cross-thread branch target injections
|
||||
on SMT systems (STIBP). In other words, eIBRS enables STIBP too.
|
||||
Spectre v2 variant attacks.
|
||||
|
||||
Legacy IBRS systems clear the IBRS bit on exit to userspace and
|
||||
therefore explicitly enable STIBP for that
|
||||
On Intel's enhanced IBRS systems, this includes cross-thread branch target
|
||||
injections on SMT systems (STIBP). In other words, Intel eIBRS enables
|
||||
STIBP, too.
|
||||
|
||||
AMD Automatic IBRS does not protect userspace, and Legacy IBRS systems clear
|
||||
the IBRS bit on exit to userspace, therefore both explicitly enable STIBP.
|
||||
|
||||
The retpoline mitigation is turned on by default on vulnerable
|
||||
CPUs. It can be forced on or off by the administrator
|
||||
|
||||
150
Documentation/admin-guide/hw-vuln/srso.rst
Normal file
150
Documentation/admin-guide/hw-vuln/srso.rst
Normal file
@ -0,0 +1,150 @@
|
||||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
Speculative Return Stack Overflow (SRSO)
|
||||
========================================
|
||||
|
||||
This is a mitigation for the speculative return stack overflow (SRSO)
|
||||
vulnerability found on AMD processors. The mechanism is by now the well
|
||||
known scenario of poisoning CPU functional units - the Branch Target
|
||||
Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
|
||||
tricking the elevated privilege domain (the kernel) into leaking
|
||||
sensitive data.
|
||||
|
||||
AMD CPUs predict RET instructions using a Return Address Predictor (aka
|
||||
Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
|
||||
CALL instruction (i.e., an instruction predicted to be a CALL but is
|
||||
not actually a CALL) can create an entry in the RAP which may be used
|
||||
to predict the target of a subsequent RET instruction.
|
||||
|
||||
The specific circumstances that lead to this varies by microarchitecture
|
||||
but the concern is that an attacker can mis-train the CPU BTB to predict
|
||||
non-architectural CALL instructions in kernel space and use this to
|
||||
control the speculative target of a subsequent kernel RET, potentially
|
||||
leading to information disclosure via a speculative side-channel.
|
||||
|
||||
The issue is tracked under CVE-2023-20569.
|
||||
|
||||
Affected processors
|
||||
-------------------
|
||||
|
||||
AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
|
||||
processors have not been investigated.
|
||||
|
||||
System information and options
|
||||
------------------------------
|
||||
|
||||
First of all, it is required that the latest microcode be loaded for
|
||||
mitigations to be effective.
|
||||
|
||||
The sysfs file showing SRSO mitigation status is:
|
||||
|
||||
/sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
|
||||
|
||||
The possible values in this file are:
|
||||
|
||||
* 'Not affected':
|
||||
|
||||
The processor is not vulnerable
|
||||
|
||||
* 'Vulnerable: no microcode':
|
||||
|
||||
The processor is vulnerable, no microcode extending IBPB
|
||||
functionality to address the vulnerability has been applied.
|
||||
|
||||
* 'Mitigation: microcode':
|
||||
|
||||
Extended IBPB functionality microcode patch has been applied. It does
|
||||
not address User->Kernel and Guest->Host transitions protection but it
|
||||
does address User->User and VM->VM attack vectors.
|
||||
|
||||
Note that User->User mitigation is controlled by how the IBPB aspect in
|
||||
the Spectre v2 mitigation is selected:
|
||||
|
||||
* conditional IBPB:
|
||||
|
||||
where each process can select whether it needs an IBPB issued
|
||||
around it PR_SPEC_DISABLE/_ENABLE etc, see :doc:`spectre`
|
||||
|
||||
* strict:
|
||||
|
||||
i.e., always on - by supplying spectre_v2_user=on on the kernel
|
||||
command line
|
||||
|
||||
(spec_rstack_overflow=microcode)
|
||||
|
||||
* 'Mitigation: safe RET':
|
||||
|
||||
Software-only mitigation. It complements the extended IBPB microcode
|
||||
patch functionality by addressing User->Kernel and Guest->Host
|
||||
transitions protection.
|
||||
|
||||
Selected by default or by spec_rstack_overflow=safe-ret
|
||||
|
||||
* 'Mitigation: IBPB':
|
||||
|
||||
Similar protection as "safe RET" above but employs an IBPB barrier on
|
||||
privilege domain crossings (User->Kernel, Guest->Host).
|
||||
|
||||
(spec_rstack_overflow=ibpb)
|
||||
|
||||
* 'Mitigation: IBPB on VMEXIT':
|
||||
|
||||
Mitigation addressing the cloud provider scenario - the Guest->Host
|
||||
transitions only.
|
||||
|
||||
(spec_rstack_overflow=ibpb-vmexit)
|
||||
|
||||
|
||||
|
||||
In order to exploit vulnerability, an attacker needs to:
|
||||
|
||||
- gain local access on the machine
|
||||
|
||||
- break kASLR
|
||||
|
||||
- find gadgets in the running kernel in order to use them in the exploit
|
||||
|
||||
- potentially create and pin an additional workload on the sibling
|
||||
thread, depending on the microarchitecture (not necessary on fam 0x19)
|
||||
|
||||
- run the exploit
|
||||
|
||||
Considering the performance implications of each mitigation type, the
|
||||
default one is 'Mitigation: safe RET' which should take care of most
|
||||
attack vectors, including the local User->Kernel one.
|
||||
|
||||
As always, the user is advised to keep her/his system up-to-date by
|
||||
applying software updates regularly.
|
||||
|
||||
The default setting will be reevaluated when needed and especially when
|
||||
new attack vectors appear.
|
||||
|
||||
As one can surmise, 'Mitigation: safe RET' does come at the cost of some
|
||||
performance depending on the workload. If one trusts her/his userspace
|
||||
and does not want to suffer the performance impact, one can always
|
||||
disable the mitigation with spec_rstack_overflow=off.
|
||||
|
||||
Similarly, 'Mitigation: IBPB' is another full mitigation type employing
|
||||
an indrect branch prediction barrier after having applied the required
|
||||
microcode patch for one's system. This mitigation comes also at
|
||||
a performance cost.
|
||||
|
||||
Mitigation: safe RET
|
||||
--------------------
|
||||
|
||||
The mitigation works by ensuring all RET instructions speculate to
|
||||
a controlled location, similar to how speculation is controlled in the
|
||||
retpoline sequence. To accomplish this, the __x86_return_thunk forces
|
||||
the CPU to mispredict every function return using a 'safe return'
|
||||
sequence.
|
||||
|
||||
To ensure the safety of this mitigation, the kernel must ensure that the
|
||||
safe return sequence is itself free from attacker interference. In Zen3
|
||||
and Zen4, this is accomplished by creating a BTB alias between the
|
||||
untraining function srso_untrain_ret_alias() and the safe return
|
||||
function srso_safe_ret_alias() which results in evicting a potentially
|
||||
poisoned BTB entry and using that safe one for all function returns.
|
||||
|
||||
In older Zen1 and Zen2, this is accomplished using a reinterpretation
|
||||
technique similar to Retbleed one: srso_untrain_ret() and
|
||||
srso_safe_ret().
|
||||
@ -624,3 +624,9 @@ Used to get the correct ranges:
|
||||
* VMALLOC_START ~ VMALLOC_END : vmalloc() / ioremap() space.
|
||||
* VMEMMAP_START ~ VMEMMAP_END : vmemmap space, used for struct page array.
|
||||
* KERNEL_LINK_ADDR : start address of Kernel link and BPF
|
||||
|
||||
va_kernel_pa_offset
|
||||
-------------------
|
||||
|
||||
Indicates the offset between the kernel virtual and physical mappings.
|
||||
Used to translate virtual to physical addresses.
|
||||
|
||||
@ -1623,6 +1623,26 @@
|
||||
Format: off | on
|
||||
default: on
|
||||
|
||||
gather_data_sampling=
|
||||
[X86,INTEL] Control the Gather Data Sampling (GDS)
|
||||
mitigation.
|
||||
|
||||
Gather Data Sampling is a hardware vulnerability which
|
||||
allows unprivileged speculative access to data which was
|
||||
previously stored in vector registers.
|
||||
|
||||
This issue is mitigated by default in updated microcode.
|
||||
The mitigation may have a performance impact but can be
|
||||
disabled. On systems without the microcode mitigation
|
||||
disabling AVX serves as a mitigation.
|
||||
|
||||
force: Disable AVX to mitigate systems without
|
||||
microcode mitigation. No effect if the microcode
|
||||
mitigation is present. Known to cause crashes in
|
||||
userspace with buggy AVX enumeration.
|
||||
|
||||
off: Disable GDS mitigation.
|
||||
|
||||
gcov_persist= [GCOV] When non-zero (default), profiling data for
|
||||
kernel modules is saved and remains accessible via
|
||||
debugfs, even when the module is unloaded/reloaded.
|
||||
@ -3273,24 +3293,25 @@
|
||||
Disable all optional CPU mitigations. This
|
||||
improves system performance, but it may also
|
||||
expose users to several CPU vulnerabilities.
|
||||
Equivalent to: nopti [X86,PPC]
|
||||
if nokaslr then kpti=0 [ARM64]
|
||||
nospectre_v1 [X86,PPC]
|
||||
nobp=0 [S390]
|
||||
nospectre_v2 [X86,PPC,S390,ARM64]
|
||||
spectre_v2_user=off [X86]
|
||||
spec_store_bypass_disable=off [X86,PPC]
|
||||
ssbd=force-off [ARM64]
|
||||
nospectre_bhb [ARM64]
|
||||
Equivalent to: if nokaslr then kpti=0 [ARM64]
|
||||
gather_data_sampling=off [X86]
|
||||
kvm.nx_huge_pages=off [X86]
|
||||
l1tf=off [X86]
|
||||
mds=off [X86]
|
||||
tsx_async_abort=off [X86]
|
||||
kvm.nx_huge_pages=off [X86]
|
||||
srbds=off [X86,INTEL]
|
||||
mmio_stale_data=off [X86]
|
||||
no_entry_flush [PPC]
|
||||
no_uaccess_flush [PPC]
|
||||
mmio_stale_data=off [X86]
|
||||
nobp=0 [S390]
|
||||
nopti [X86,PPC]
|
||||
nospectre_bhb [ARM64]
|
||||
nospectre_v1 [X86,PPC]
|
||||
nospectre_v2 [X86,PPC,S390,ARM64]
|
||||
retbleed=off [X86]
|
||||
spec_store_bypass_disable=off [X86,PPC]
|
||||
spectre_v2_user=off [X86]
|
||||
srbds=off [X86,INTEL]
|
||||
ssbd=force-off [ARM64]
|
||||
tsx_async_abort=off [X86]
|
||||
|
||||
Exceptions:
|
||||
This does not have any effect on
|
||||
@ -5875,6 +5896,17 @@
|
||||
Not specifying this option is equivalent to
|
||||
spectre_v2_user=auto.
|
||||
|
||||
spec_rstack_overflow=
|
||||
[X86] Control RAS overflow mitigation on AMD Zen CPUs
|
||||
|
||||
off - Disable mitigation
|
||||
microcode - Enable microcode mitigation only
|
||||
safe-ret - Enable sw-only safe RET mitigation (default)
|
||||
ibpb - Enable mitigation by issuing IBPB on
|
||||
kernel entry
|
||||
ibpb-vmexit - Issue IBPB only on VMEXIT
|
||||
(cloud-specific mitigation)
|
||||
|
||||
spec_store_bypass_disable=
|
||||
[HW] Control Speculative Store Bypass (SSB) Disable mitigation
|
||||
(Speculative Store Bypass vulnerability)
|
||||
|
||||
@ -148,6 +148,9 @@ stable kernels.
|
||||
| ARM | MMU-700 | #2268618,2812531| N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
|
||||
|
||||
@ -105,7 +105,7 @@ properties:
|
||||
G coefficient for temperature equation.
|
||||
Default for series 5 = 60000
|
||||
Default for series 6 = 57400
|
||||
multipleOf: 1000
|
||||
multipleOf: 100
|
||||
minimum: 1000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
@ -114,7 +114,7 @@ properties:
|
||||
H coefficient for temperature equation.
|
||||
Default for series 5 = 200000
|
||||
Default for series 6 = 249400
|
||||
multipleOf: 1000
|
||||
multipleOf: 100
|
||||
minimum: 1000
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
|
||||
@ -131,7 +131,7 @@ properties:
|
||||
J coefficient for temperature equation.
|
||||
Default for series 5 = -100
|
||||
Default for series 6 = 0
|
||||
multipleOf: 1000
|
||||
multipleOf: 100
|
||||
maximum: 0
|
||||
$ref: /schemas/types.yaml#/definitions/int32
|
||||
|
||||
|
||||
@ -216,7 +216,6 @@ properties:
|
||||
description: Whether to enable burnout current for EXT1.
|
||||
|
||||
adi,ext1-burnout-current-nanoamp:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
Burnout current in nanoamps to be applied to EXT1.
|
||||
enum: [0, 50, 500, 1000, 10000]
|
||||
@ -233,7 +232,6 @@ properties:
|
||||
description: Whether to enable burnout current for EXT2.
|
||||
|
||||
adi,ext2-burnout-current-nanoamp:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Burnout current in nanoamps to be applied to EXT2.
|
||||
enum: [0, 50, 500, 1000, 10000]
|
||||
default: 0
|
||||
@ -249,7 +247,6 @@ properties:
|
||||
description: Whether to enable burnout current for VIOUT.
|
||||
|
||||
adi,viout-burnout-current-nanoamp:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Burnout current in nanoamps to be applied to VIOUT.
|
||||
enum: [0, 1000, 10000]
|
||||
default: 0
|
||||
|
||||
@ -293,7 +293,7 @@ allOf:
|
||||
patternProperties:
|
||||
"^mac@[0-1]$":
|
||||
type: object
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
allOf:
|
||||
- $ref: ethernet-controller.yaml#
|
||||
description:
|
||||
@ -305,14 +305,9 @@ patternProperties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
phy-handle: true
|
||||
|
||||
phy-mode: true
|
||||
|
||||
required:
|
||||
- reg
|
||||
- compatible
|
||||
- phy-handle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
@ -91,12 +91,18 @@ properties:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
tx_delay:
|
||||
description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
|
||||
description: Delay value for TXD timing.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 0x7F
|
||||
default: 0x30
|
||||
|
||||
rx_delay:
|
||||
description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
|
||||
description: Delay value for RXD timing.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 0x7F
|
||||
default: 0x10
|
||||
|
||||
phy-supply:
|
||||
description: PHY regulator
|
||||
|
||||
@ -16,13 +16,15 @@ properties:
|
||||
- enum:
|
||||
- atmel,at91rm9200-usart
|
||||
- atmel,at91sam9260-usart
|
||||
- microchip,sam9x60-usart
|
||||
- items:
|
||||
- const: atmel,at91rm9200-dbgu
|
||||
- const: atmel,at91rm9200-usart
|
||||
- items:
|
||||
- const: atmel,at91sam9260-dbgu
|
||||
- const: atmel,at91sam9260-usart
|
||||
- items:
|
||||
- const: microchip,sam9x60-usart
|
||||
- const: atmel,at91sam9260-usart
|
||||
- items:
|
||||
- const: microchip,sam9x60-dbgu
|
||||
- const: microchip,sam9x60-usart
|
||||
|
||||
@ -1,19 +0,0 @@
|
||||
* Universal Asynchronous Receiver/Transmitter (UART)
|
||||
|
||||
- compatible: "cavium,octeon-3860-uart"
|
||||
|
||||
Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.
|
||||
|
||||
- reg: The base address of the UART register bank.
|
||||
|
||||
- interrupts: A single interrupt specifier.
|
||||
|
||||
- current-speed: Optional, the current bit rate in bits per second.
|
||||
|
||||
Example:
|
||||
uart1: serial@1180000000c00 {
|
||||
compatible = "cavium,octeon-3860-uart","ns16550";
|
||||
reg = <0x11800 0x00000c00 0x0 0x400>;
|
||||
current-speed = <115200>;
|
||||
interrupts = <0 35>;
|
||||
};
|
||||
@ -1,28 +0,0 @@
|
||||
* NXP LPC1850 UART
|
||||
|
||||
Required properties:
|
||||
- compatible : "nxp,lpc1850-uart", "ns16550a".
|
||||
- reg : offset and length of the register set for the device.
|
||||
- interrupts : should contain uart interrupt.
|
||||
- clocks : phandle to the input clocks.
|
||||
- clock-names : required elements: "uartclk", "reg".
|
||||
|
||||
Optional properties:
|
||||
- dmas : Two or more DMA channel specifiers following the
|
||||
convention outlined in bindings/dma/dma.txt
|
||||
- dma-names : Names for the dma channels, if present. There must
|
||||
be at least one channel named "tx" for transmit
|
||||
and named "rx" for receive.
|
||||
|
||||
Since it's also possible to also use the of_serial.c driver all
|
||||
parameters from 8250.txt also apply but are optional.
|
||||
|
||||
Example:
|
||||
uart0: serial@40081000 {
|
||||
compatible = "nxp,lpc1850-uart", "ns16550a";
|
||||
reg = <0x40081000 0x1000>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <24>;
|
||||
clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>;
|
||||
clock-names = "uartclk", "reg";
|
||||
};
|
||||
@ -39,22 +39,4 @@ required:
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sound {
|
||||
compatible = "audio-graph-card2";
|
||||
|
||||
links = <&cpu_port>;
|
||||
};
|
||||
|
||||
cpu {
|
||||
compatible = "cpu-driver";
|
||||
|
||||
cpu_port: port { cpu_ep: endpoint { remote-endpoint = <&codec_ep>; }; };
|
||||
};
|
||||
|
||||
codec {
|
||||
compatible = "codec-driver";
|
||||
|
||||
port { codec_ep: endpoint { remote-endpoint = <&cpu_ep>; }; };
|
||||
};
|
||||
...
|
||||
|
||||
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: Google SC7180-Trogdor ASoC sound card driver
|
||||
|
||||
maintainers:
|
||||
- Rohit kumar <rohitkr@codeaurora.org>
|
||||
- Rohit kumar <quic_rohkumar@quicinc.com>
|
||||
- Cheng-Yi Chiang <cychiang@chromium.org>
|
||||
|
||||
description:
|
||||
|
||||
@ -8,7 +8,7 @@ title: Qualcomm Technologies Inc. LPASS CPU dai driver
|
||||
|
||||
maintainers:
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
- Rohit kumar <rohitkr@codeaurora.org>
|
||||
- Rohit kumar <quic_rohkumar@quicinc.com>
|
||||
|
||||
description: |
|
||||
Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
|
||||
|
||||
@ -0,0 +1,42 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/loongson,ls1x-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Loongson-1 Watchdog Timer
|
||||
|
||||
maintainers:
|
||||
- Keguang Zhang <keguang.zhang@gmail.com>
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- loongson,ls1b-wdt
|
||||
- loongson,ls1c-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/loongson,ls1x-clk.h>
|
||||
watchdog: watchdog@1fe5c060 {
|
||||
compatible = "loongson,ls1b-wdt";
|
||||
reg = <0x1fe5c060 0xc>;
|
||||
|
||||
clocks = <&clkc LS1X_CLKID_APB>;
|
||||
};
|
||||
@ -551,9 +551,8 @@ mutex or just to use i_size_read() instead.
|
||||
Note: this does not protect the file->f_pos against concurrent modifications
|
||||
since this is something the userspace has to take care about.
|
||||
|
||||
->iterate() is called with i_rwsem exclusive.
|
||||
|
||||
->iterate_shared() is called with i_rwsem at least shared.
|
||||
->iterate_shared() is called with i_rwsem held for reading, and with the
|
||||
file f_pos_lock held exclusively
|
||||
|
||||
->fasync() is responsible for maintaining the FASYNC bit in filp->f_flags.
|
||||
Most instances call fasync_helper(), which does that maintenance, so it's
|
||||
|
||||
@ -537,7 +537,7 @@ vfs_readdir() is gone; switch to iterate_dir() instead
|
||||
|
||||
**mandatory**
|
||||
|
||||
->readdir() is gone now; switch to ->iterate()
|
||||
->readdir() is gone now; switch to ->iterate_shared()
|
||||
|
||||
**mandatory**
|
||||
|
||||
@ -693,24 +693,19 @@ parallel now.
|
||||
|
||||
---
|
||||
|
||||
**recommended**
|
||||
**mandatory**
|
||||
|
||||
->iterate_shared() is added; it's a parallel variant of ->iterate().
|
||||
->iterate_shared() is added.
|
||||
Exclusion on struct file level is still provided (as well as that
|
||||
between it and lseek on the same struct file), but if your directory
|
||||
has been opened several times, you can get these called in parallel.
|
||||
Exclusion between that method and all directory-modifying ones is
|
||||
still provided, of course.
|
||||
|
||||
Often enough ->iterate() can serve as ->iterate_shared() without any
|
||||
changes - it is a read-only operation, after all. If you have any
|
||||
per-inode or per-dentry in-core data structures modified by ->iterate(),
|
||||
you might need something to serialize the access to them. If you
|
||||
do dcache pre-seeding, you'll need to switch to d_alloc_parallel() for
|
||||
that; look for in-tree examples.
|
||||
|
||||
Old method is only used if the new one is absent; eventually it will
|
||||
be removed. Switch while you still can; the old one won't stay.
|
||||
If you have any per-inode or per-dentry in-core data structures modified
|
||||
by ->iterate_shared(), you might need something to serialize the access
|
||||
to them. If you do dcache pre-seeding, you'll need to switch to
|
||||
d_alloc_parallel() for that; look for in-tree examples.
|
||||
|
||||
---
|
||||
|
||||
@ -930,9 +925,9 @@ should be done by looking at FMODE_LSEEK in file->f_mode.
|
||||
filldir_t (readdir callbacks) calling conventions have changed. Instead of
|
||||
returning 0 or -E... it returns bool now. false means "no more" (as -E... used
|
||||
to) and true - "keep going" (as 0 in old calling conventions). Rationale:
|
||||
callers never looked at specific -E... values anyway. ->iterate() and
|
||||
->iterate_shared() instance require no changes at all, all filldir_t ones in
|
||||
the tree converted.
|
||||
callers never looked at specific -E... values anyway. -> iterate_shared()
|
||||
instances require no changes at all, all filldir_t ones in the tree
|
||||
converted.
|
||||
|
||||
---
|
||||
|
||||
|
||||
@ -84,8 +84,6 @@ nr_inodes The maximum number of inodes for this instance. The default
|
||||
is half of the number of your physical RAM pages, or (on a
|
||||
machine with highmem) the number of lowmem RAM pages,
|
||||
whichever is the lower.
|
||||
noswap Disables swap. Remounts must respect the original settings.
|
||||
By default swap is enabled.
|
||||
========= ============================================================
|
||||
|
||||
These parameters accept a suffix k, m or g for kilo, mega and giga and
|
||||
@ -99,36 +97,31 @@ mount with such options, since it allows any user with write access to
|
||||
use up all the memory on the machine; but enhances the scalability of
|
||||
that instance in a system with many CPUs making intensive use of it.
|
||||
|
||||
tmpfs blocks may be swapped out, when there is a shortage of memory.
|
||||
tmpfs has a mount option to disable its use of swap:
|
||||
|
||||
====== ===========================================================
|
||||
noswap Disables swap. Remounts must respect the original settings.
|
||||
By default swap is enabled.
|
||||
====== ===========================================================
|
||||
|
||||
tmpfs also supports Transparent Huge Pages which requires a kernel
|
||||
configured with CONFIG_TRANSPARENT_HUGEPAGE and with huge supported for
|
||||
your system (has_transparent_hugepage(), which is architecture specific).
|
||||
The mount options for this are:
|
||||
|
||||
====== ============================================================
|
||||
huge=0 never: disables huge pages for the mount
|
||||
huge=1 always: enables huge pages for the mount
|
||||
huge=2 within_size: only allocate huge pages if the page will be
|
||||
fully within i_size, also respect fadvise()/madvise() hints.
|
||||
huge=3 advise: only allocate huge pages if requested with
|
||||
fadvise()/madvise()
|
||||
====== ============================================================
|
||||
================ ==============================================================
|
||||
huge=never Do not allocate huge pages. This is the default.
|
||||
huge=always Attempt to allocate huge page every time a new page is needed.
|
||||
huge=within_size Only allocate huge page if it will be fully within i_size.
|
||||
Also respect madvise(2) hints.
|
||||
huge=advise Only allocate huge page if requested with madvise(2).
|
||||
================ ==============================================================
|
||||
|
||||
There is a sysfs file which you can also use to control system wide THP
|
||||
configuration for all tmpfs mounts, the file is:
|
||||
|
||||
/sys/kernel/mm/transparent_hugepage/shmem_enabled
|
||||
|
||||
This sysfs file is placed on top of THP sysfs directory and so is registered
|
||||
by THP code. It is however only used to control all tmpfs mounts with one
|
||||
single knob. Since it controls all tmpfs mounts it should only be used either
|
||||
for emergency or testing purposes. The values you can set for shmem_enabled are:
|
||||
|
||||
== ============================================================
|
||||
-1 deny: disables huge on shm_mnt and all mounts, for
|
||||
emergency use
|
||||
-2 force: enables huge on shm_mnt and all mounts, w/o needing
|
||||
option, for testing
|
||||
== ============================================================
|
||||
See also Documentation/admin-guide/mm/transhuge.rst, which describes the
|
||||
sysfs file /sys/kernel/mm/transparent_hugepage/shmem_enabled: which can
|
||||
be used to deny huge pages on all tmpfs mounts in an emergency, or to
|
||||
force huge pages on all tmpfs mounts for testing.
|
||||
|
||||
tmpfs has a mount option to set the NUMA memory allocation policy for
|
||||
all files in that instance (if CONFIG_NUMA is enabled) - which can be
|
||||
|
||||
@ -65,15 +65,16 @@ argument - drivers can process completions for any number of Tx
|
||||
packets but should only process up to ``budget`` number of
|
||||
Rx packets. Rx processing is usually much more expensive.
|
||||
|
||||
In other words, it is recommended to ignore the budget argument when
|
||||
performing TX buffer reclamation to ensure that the reclamation is not
|
||||
arbitrarily bounded; however, it is required to honor the budget argument
|
||||
for RX processing.
|
||||
In other words for Rx processing the ``budget`` argument limits how many
|
||||
packets driver can process in a single poll. Rx specific APIs like page
|
||||
pool or XDP cannot be used at all when ``budget`` is 0.
|
||||
skb Tx processing should happen regardless of the ``budget``, but if
|
||||
the argument is 0 driver cannot call any XDP (or page pool) APIs.
|
||||
|
||||
.. warning::
|
||||
|
||||
The ``budget`` argument may be 0 if core tries to only process Tx completions
|
||||
and no Rx packets.
|
||||
The ``budget`` argument may be 0 if core tries to only process
|
||||
skb Tx completions and no Rx or XDP packets.
|
||||
|
||||
The poll method returns the amount of work done. If the driver still
|
||||
has outstanding work to do (e.g. ``budget`` was exhausted)
|
||||
|
||||
@ -254,7 +254,6 @@ an involved disclosed party. The current ambassadors list:
|
||||
Samsung Javier González <javier.gonz@samsung.com>
|
||||
|
||||
Microsoft James Morris <jamorris@linux.microsoft.com>
|
||||
VMware
|
||||
Xen Andrew Cooper <andrew.cooper3@citrix.com>
|
||||
|
||||
Canonical John Johansen <john.johansen@canonical.com>
|
||||
@ -263,10 +262,8 @@ an involved disclosed party. The current ambassadors list:
|
||||
Red Hat Josh Poimboeuf <jpoimboe@redhat.com>
|
||||
SUSE Jiri Kosina <jkosina@suse.cz>
|
||||
|
||||
Amazon
|
||||
Google Kees Cook <keescook@chromium.org>
|
||||
|
||||
GCC
|
||||
LLVM Nick Desaulniers <ndesaulniers@google.com>
|
||||
============= ========================================================
|
||||
|
||||
|
||||
@ -98,7 +98,7 @@ If you aren't subscribed to netdev and/or are simply unsure if
|
||||
repository link above for any new networking-related commits. You may
|
||||
also check the following website for the current status:
|
||||
|
||||
http://vger.kernel.org/~davem/net-next.html
|
||||
https://patchwork.hopto.org/net-next.html
|
||||
|
||||
The ``net`` tree continues to collect fixes for the vX.Y content, and is
|
||||
fed back to Linus at regular (~weekly) intervals. Meaning that the
|
||||
|
||||
@ -63,31 +63,28 @@ information submitted to the security list and any followup discussions
|
||||
of the report are treated confidentially even after the embargo has been
|
||||
lifted, in perpetuity.
|
||||
|
||||
Coordination
|
||||
------------
|
||||
Coordination with other groups
|
||||
------------------------------
|
||||
|
||||
Fixes for sensitive bugs, such as those that might lead to privilege
|
||||
escalations, may need to be coordinated with the private
|
||||
<linux-distros@vs.openwall.org> mailing list so that distribution vendors
|
||||
are well prepared to issue a fixed kernel upon public disclosure of the
|
||||
upstream fix. Distros will need some time to test the proposed patch and
|
||||
will generally request at least a few days of embargo, and vendor update
|
||||
publication prefers to happen Tuesday through Thursday. When appropriate,
|
||||
the security team can assist with this coordination, or the reporter can
|
||||
include linux-distros from the start. In this case, remember to prefix
|
||||
the email Subject line with "[vs]" as described in the linux-distros wiki:
|
||||
<http://oss-security.openwall.org/wiki/mailing-lists/distros#how-to-use-the-lists>
|
||||
The kernel security team strongly recommends that reporters of potential
|
||||
security issues NEVER contact the "linux-distros" mailing list until
|
||||
AFTER discussing it with the kernel security team. Do not Cc: both
|
||||
lists at once. You may contact the linux-distros mailing list after a
|
||||
fix has been agreed on and you fully understand the requirements that
|
||||
doing so will impose on you and the kernel community.
|
||||
|
||||
The different lists have different goals and the linux-distros rules do
|
||||
not contribute to actually fixing any potential security problems.
|
||||
|
||||
CVE assignment
|
||||
--------------
|
||||
|
||||
The security team does not normally assign CVEs, nor do we require them
|
||||
for reports or fixes, as this can needlessly complicate the process and
|
||||
may delay the bug handling. If a reporter wishes to have a CVE identifier
|
||||
assigned ahead of public disclosure, they will need to contact the private
|
||||
linux-distros list, described above. When such a CVE identifier is known
|
||||
before a patch is provided, it is desirable to mention it in the commit
|
||||
message if the reporter agrees.
|
||||
The security team does not assign CVEs, nor do we require them for
|
||||
reports or fixes, as this can needlessly complicate the process and may
|
||||
delay the bug handling. If a reporter wishes to have a CVE identifier
|
||||
assigned, they should find one by themselves, for example by contacting
|
||||
MITRE directly. However under no circumstances will a patch inclusion
|
||||
be delayed to wait for a CVE identifier to arrive.
|
||||
|
||||
Non-disclosure agreements
|
||||
-------------------------
|
||||
|
||||
@ -49,7 +49,7 @@ The following keys are defined:
|
||||
privileged ISA, with the following known exceptions (more exceptions may be
|
||||
added, but only if it can be demonstrated that the user ABI is not broken):
|
||||
|
||||
* The :fence.i: instruction cannot be directly executed by userspace
|
||||
* The ``fence.i`` instruction cannot be directly executed by userspace
|
||||
programs (it may still be executed in userspace via a
|
||||
kernel-controlled mechanism such as the vDSO).
|
||||
|
||||
|
||||
@ -187,7 +187,8 @@ WMI method BatteryeRawAnalytics()
|
||||
|
||||
Returns a buffer usually containg 12 blocks of analytics data.
|
||||
Those blocks contain:
|
||||
- block number starting with 0 (u8)
|
||||
|
||||
- a block number starting with 0 (u8)
|
||||
- 31 bytes of unknown data
|
||||
|
||||
.. note::
|
||||
|
||||
101
MAINTAINERS
101
MAINTAINERS
@ -1865,9 +1865,11 @@ M: Martin Povišer <povik+lin@cutebit.org>
|
||||
L: asahi@lists.linux.dev
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/sound/adi,ssm3515.yaml
|
||||
F: Documentation/devicetree/bindings/sound/apple,*
|
||||
F: sound/soc/apple/*
|
||||
F: sound/soc/codecs/cs42l83-i2c.c
|
||||
F: sound/soc/codecs/ssm3515.c
|
||||
|
||||
ARM/APPLE MACHINE SUPPORT
|
||||
M: Hector Martin <marcan@marcan.st>
|
||||
@ -2337,7 +2339,7 @@ F: drivers/phy/mediatek/
|
||||
ARM/MICROCHIP (ARM64) SoC support
|
||||
M: Conor Dooley <conor@kernel.org>
|
||||
M: Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
T: git https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git
|
||||
@ -2346,7 +2348,7 @@ F: arch/arm64/boot/dts/microchip/
|
||||
ARM/Microchip (AT91) SoC support
|
||||
M: Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
W: http://www.linux4sam.org
|
||||
@ -3248,7 +3250,7 @@ F: include/uapi/linux/atm*
|
||||
|
||||
ATMEL MACB ETHERNET DRIVER
|
||||
M: Nicolas Ferre <nicolas.ferre@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
S: Supported
|
||||
F: drivers/net/ethernet/cadence/
|
||||
|
||||
@ -3260,9 +3262,8 @@ F: Documentation/devicetree/bindings/input/atmel,maxtouch.yaml
|
||||
F: drivers/input/touchscreen/atmel_mxt_ts.c
|
||||
|
||||
ATMEL WIRELESS DRIVER
|
||||
M: Simon Kelley <simon@thekelleys.org.uk>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
W: http://www.thekelleys.org.uk/atmel
|
||||
W: http://atmelwlandriver.sourceforge.net/
|
||||
F: drivers/net/wireless/atmel/atmel*
|
||||
@ -3392,7 +3393,7 @@ F: drivers/media/radio/radio-aztech*
|
||||
B43 WIRELESS DRIVER
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: b43-dev@lists.infradead.org
|
||||
S: Odd Fixes
|
||||
S: Orphan
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/b43
|
||||
F: drivers/net/wireless/broadcom/b43/
|
||||
|
||||
@ -4121,6 +4122,13 @@ F: Documentation/devicetree/bindings/spi/brcm,bcm63xx-hsspi.yaml
|
||||
F: drivers/spi/spi-bcm63xx-hsspi.c
|
||||
F: drivers/spi/spi-bcmbca-hsspi.c
|
||||
|
||||
BROADCOM BCM6348/BCM6358 SPI controller DRIVER
|
||||
M: Jonas Gorski <jonas.gorski@gmail.com>
|
||||
L: linux-spi@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
F: Documentation/devicetree/bindings/spi/spi-bcm63xx.txt
|
||||
F: drivers/spi/spi-bcm63xx.c
|
||||
|
||||
BROADCOM ETHERNET PHY DRIVERS
|
||||
M: Florian Fainelli <florian.fainelli@broadcom.com>
|
||||
R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
|
||||
@ -4454,7 +4462,6 @@ CADENCE USB3 DRD IP DRIVER
|
||||
M: Peter Chen <peter.chen@kernel.org>
|
||||
M: Pawel Laszczak <pawell@cadence.com>
|
||||
R: Roger Quadros <rogerq@kernel.org>
|
||||
R: Aswath Govindraju <a-govindraju@ti.com>
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
|
||||
@ -5140,10 +5147,12 @@ S: Maintained
|
||||
F: include/linux/compiler_attributes.h
|
||||
|
||||
COMPUTE EXPRESS LINK (CXL)
|
||||
M: Davidlohr Bueso <dave@stgolabs.net>
|
||||
M: Jonathan Cameron <jonathan.cameron@huawei.com>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
M: Alison Schofield <alison.schofield@intel.com>
|
||||
M: Vishal Verma <vishal.l.verma@intel.com>
|
||||
M: Ira Weiny <ira.weiny@intel.com>
|
||||
M: Ben Widawsky <bwidawsk@kernel.org>
|
||||
M: Dan Williams <dan.j.williams@intel.com>
|
||||
L: linux-cxl@vger.kernel.org
|
||||
S: Maintained
|
||||
@ -5452,8 +5461,7 @@ F: Documentation/devicetree/bindings/net/can/ctu,ctucanfd.yaml
|
||||
F: drivers/net/can/ctucanfd/
|
||||
|
||||
CW1200 WLAN driver
|
||||
M: Solomon Peachy <pizza@shaftnet.org>
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/st/cw1200/
|
||||
|
||||
CX18 VIDEO4LINUX DRIVER
|
||||
@ -8672,8 +8680,11 @@ S: Maintained
|
||||
F: drivers/input/touchscreen/resistive-adc-touch.c
|
||||
|
||||
GENERIC STRING LIBRARY
|
||||
M: Kees Cook <keescook@chromium.org>
|
||||
R: Andy Shevchenko <andy@kernel.org>
|
||||
S: Maintained
|
||||
L: linux-hardening@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git for-next/hardening
|
||||
F: include/linux/string.h
|
||||
F: include/linux/string_choices.h
|
||||
F: include/linux/string_helpers.h
|
||||
@ -9364,7 +9375,6 @@ F: drivers/crypto/hisilicon/sgl.c
|
||||
F: include/linux/hisi_acc_qm.h
|
||||
|
||||
HISILICON ROCE DRIVER
|
||||
M: Haoyue Xu <xuhaoyue1@hisilicon.com>
|
||||
M: Junxian Huang <huangjunxian6@hisilicon.com>
|
||||
L: linux-rdma@vger.kernel.org
|
||||
S: Maintained
|
||||
@ -9649,6 +9659,7 @@ F: tools/hv/
|
||||
|
||||
HYPERBUS SUPPORT
|
||||
M: Vignesh Raghavendra <vigneshr@ti.com>
|
||||
R: Tudor Ambarus <tudor.ambarus@linaro.org>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
S: Supported
|
||||
Q: http://patchwork.ozlabs.org/project/linux-mtd/list/
|
||||
@ -12468,6 +12479,7 @@ F: net/mctp/
|
||||
|
||||
MAPLE TREE
|
||||
M: Liam R. Howlett <Liam.Howlett@oracle.com>
|
||||
L: maple-tree@lists.infradead.org
|
||||
L: linux-mm@kvack.org
|
||||
S: Supported
|
||||
F: Documentation/core-api/maple_tree.rst
|
||||
@ -12579,18 +12591,14 @@ F: Documentation/devicetree/bindings/net/marvell,pp2.yaml
|
||||
F: drivers/net/ethernet/marvell/mvpp2/
|
||||
|
||||
MARVELL MWIFIEX WIRELESS DRIVER
|
||||
M: Amitkumar Karwar <amitkarwar@gmail.com>
|
||||
M: Ganapathi Bhat <ganapathi017@gmail.com>
|
||||
M: Sharvari Harisangam <sharvari.harisangam@nxp.com>
|
||||
M: Xinming Hu <huxinming820@gmail.com>
|
||||
M: Brian Norris <briannorris@chromium.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: drivers/net/wireless/marvell/mwifiex/
|
||||
|
||||
MARVELL MWL8K WIRELESS DRIVER
|
||||
M: Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Odd Fixes
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/marvell/mwl8k.c
|
||||
|
||||
MARVELL NAND CONTROLLER DRIVER
|
||||
@ -13778,7 +13786,7 @@ F: Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml
|
||||
F: drivers/spi/spi-at91-usart.c
|
||||
|
||||
MICROCHIP AUDIO ASOC DRIVERS
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/sound/atmel*
|
||||
@ -13801,7 +13809,7 @@ S: Maintained
|
||||
F: drivers/crypto/atmel-ecc.*
|
||||
|
||||
MICROCHIP EIC DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/interrupt-controller/microchip,sama7g5-eic.yaml
|
||||
@ -13874,7 +13882,7 @@ F: drivers/video/fbdev/atmel_lcdfb.c
|
||||
F: include/video/atmel_lcdc.h
|
||||
|
||||
MICROCHIP MCP16502 PMIC DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt
|
||||
@ -13901,7 +13909,7 @@ F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
|
||||
F: drivers/mtd/nand/raw/atmel/*
|
||||
|
||||
MICROCHIP OTPC DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
|
||||
@ -13940,7 +13948,7 @@ F: Documentation/devicetree/bindings/fpga/microchip,mpf-spi-fpga-mgr.yaml
|
||||
F: drivers/fpga/microchip-spi.c
|
||||
|
||||
MICROCHIP PWM DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-pwm@vger.kernel.org
|
||||
S: Supported
|
||||
@ -13956,7 +13964,7 @@ F: drivers/iio/adc/at91-sama5d2_adc.c
|
||||
F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h
|
||||
|
||||
MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
|
||||
F: drivers/power/reset/at91-sama5d2_shdwc.c
|
||||
@ -13968,12 +13976,12 @@ T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
|
||||
F: drivers/soc/microchip/
|
||||
|
||||
MICROCHIP SPI DRIVER
|
||||
M: Tudor Ambarus <tudor.ambarus@linaro.org>
|
||||
M: Ryan Wanner <ryan.wanner@microchip.com>
|
||||
S: Supported
|
||||
F: drivers/spi/spi-atmel.*
|
||||
|
||||
MICROCHIP SSC DRIVER
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/misc/atmel-ssc.txt
|
||||
@ -14002,7 +14010,7 @@ F: drivers/usb/gadget/udc/atmel_usba_udc.*
|
||||
|
||||
MICROCHIP WILC1000 WIFI DRIVER
|
||||
M: Ajay Singh <ajay.kathat@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@microchip.com>
|
||||
M: Claudiu Beznea <claudiu.beznea@tuxon.dev>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/net/wireless/microchip/wilc1000/
|
||||
@ -16285,6 +16293,7 @@ F: drivers/pci/controller/dwc/pci-exynos.c
|
||||
PCI DRIVER FOR SYNOPSYS DESIGNWARE
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
M: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
|
||||
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
|
||||
@ -17436,6 +17445,7 @@ F: drivers/media/tuners/qt1010*
|
||||
|
||||
QUALCOMM ATH12K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
L: ath12k@lists.infradead.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
|
||||
@ -17443,6 +17453,7 @@ F: drivers/net/wireless/ath/ath12k/
|
||||
|
||||
QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
L: ath10k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
|
||||
@ -17452,6 +17463,7 @@ F: drivers/net/wireless/ath/ath10k/
|
||||
|
||||
QUALCOMM ATHEROS ATH11K WIRELESS DRIVER
|
||||
M: Kalle Valo <kvalo@kernel.org>
|
||||
M: Jeff Johnson <quic_jjohnson@quicinc.com>
|
||||
L: ath11k@lists.infradead.org
|
||||
S: Supported
|
||||
W: https://wireless.wiki.kernel.org/en/users/Drivers/ath11k
|
||||
@ -17543,6 +17555,7 @@ QUALCOMM ETHQOS ETHERNET DRIVER
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
R: Bhupesh Sharma <bhupesh.sharma@linaro.org>
|
||||
L: netdev@vger.kernel.org
|
||||
L: linux-arm-msm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/qcom,ethqos.yaml
|
||||
F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
|
||||
@ -17971,7 +17984,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.g
|
||||
F: drivers/net/wireless/realtek/rtlwifi/
|
||||
|
||||
REALTEK WIRELESS DRIVER (rtw88)
|
||||
M: Yan-Hsuan Chuang <tony0620emma@gmail.com>
|
||||
M: Ping-Ke Shih <pkshih@realtek.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/wireless/realtek/rtw88/
|
||||
@ -18496,17 +18509,14 @@ RTL8180 WIRELESS DRIVER
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Orphan
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
|
||||
F: drivers/net/wireless/realtek/rtl818x/rtl8180/
|
||||
|
||||
RTL8187 WIRELESS DRIVER
|
||||
M: Herton Ronaldo Krzesinski <herton@canonical.com>
|
||||
M: Hin-Tak Leung <htl10@users.sourceforge.net>
|
||||
M: Hin-Tak Leung <hintak.leung@gmail.com>
|
||||
M: Larry Finger <Larry.Finger@lwfinger.net>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
W: https://wireless.wiki.kernel.org/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
|
||||
F: drivers/net/wireless/realtek/rtl818x/rtl8187/
|
||||
|
||||
RTL8XXXU WIRELESS DRIVER (rtl8xxxu)
|
||||
@ -20390,7 +20400,6 @@ F: drivers/pwm/pwm-stm32*
|
||||
F: include/linux/*/stm32-*tim*
|
||||
|
||||
STMMAC ETHERNET DRIVER
|
||||
M: Giuseppe Cavallaro <peppe.cavallaro@st.com>
|
||||
M: Alexandre Torgue <alexandre.torgue@foss.st.com>
|
||||
M: Jose Abreu <joabreu@synopsys.com>
|
||||
L: netdev@vger.kernel.org
|
||||
@ -21628,11 +21637,17 @@ F: Documentation/translations/zh_TW/
|
||||
TTY LAYER
|
||||
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||
M: Jiri Slaby <jirislaby@kernel.org>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
L: linux-serial@vger.kernel.org
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git
|
||||
F: Documentation/driver-api/serial/
|
||||
F: drivers/tty/
|
||||
F: drivers/tty/serial/serial_base.h
|
||||
F: drivers/tty/serial/serial_base_bus.c
|
||||
F: drivers/tty/serial/serial_core.c
|
||||
F: drivers/tty/serial/serial_ctrl.c
|
||||
F: drivers/tty/serial/serial_port.c
|
||||
F: include/linux/selection.h
|
||||
F: include/linux/serial.h
|
||||
F: include/linux/serial_core.h
|
||||
@ -21661,11 +21676,14 @@ S: Orphan
|
||||
F: drivers/net/ethernet/dec/tulip/
|
||||
|
||||
TUN/TAP driver
|
||||
M: Maxim Krasnyansky <maxk@qti.qualcomm.com>
|
||||
M: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
|
||||
M: Jason Wang <jasowang@redhat.com>
|
||||
S: Maintained
|
||||
W: http://vtun.sourceforge.net/tun
|
||||
F: Documentation/networking/tuntap.rst
|
||||
F: arch/um/os-Linux/drivers/
|
||||
F: drivers/net/tap.c
|
||||
F: drivers/net/tun.c
|
||||
|
||||
TURBOCHANNEL SUBSYSTEM
|
||||
M: "Maciej W. Rozycki" <macro@orcam.me.uk>
|
||||
@ -21888,9 +21906,8 @@ S: Maintained
|
||||
F: drivers/usb/misc/apple-mfi-fastcharge.c
|
||||
|
||||
USB AR5523 WIRELESS DRIVER
|
||||
M: Pontus Fuchs <pontus.fuchs@gmail.com>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/ath/ar5523/
|
||||
|
||||
USB ATTACHED SCSI
|
||||
@ -22167,9 +22184,8 @@ F: drivers/usb/gadget/legacy/webcam.c
|
||||
F: include/uapi/linux/usb/g_uvc.h
|
||||
|
||||
USB WIRELESS RNDIS DRIVER (rndis_wlan)
|
||||
M: Jussi Kivilinna <jussi.kivilinna@iki.fi>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Maintained
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/legacy/rndis_wlan.c
|
||||
|
||||
USB XHCI DRIVER
|
||||
@ -22944,7 +22960,7 @@ F: drivers/input/misc/wistron_btns.c
|
||||
|
||||
WL3501 WIRELESS PCMCIA CARD DRIVER
|
||||
L: linux-wireless@vger.kernel.org
|
||||
S: Odd fixes
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/legacy/wl3501*
|
||||
|
||||
WMI BINARY MOF DRIVER
|
||||
@ -23515,11 +23531,8 @@ S: Maintained
|
||||
F: mm/zbud.c
|
||||
|
||||
ZD1211RW WIRELESS DRIVER
|
||||
M: Ulrich Kunitz <kune@deine-taler.de>
|
||||
L: linux-wireless@vger.kernel.org
|
||||
L: zd1211-devs@lists.sourceforge.net (subscribers-only)
|
||||
S: Maintained
|
||||
W: http://zd1211.ath.cx/wiki/DriverRewrite
|
||||
S: Orphan
|
||||
F: drivers/net/wireless/zydas/zd1211rw/
|
||||
|
||||
ZD1301 MEDIA DRIVER
|
||||
|
||||
24
Makefile
24
Makefile
@ -2,7 +2,7 @@
|
||||
VERSION = 6
|
||||
PATCHLEVEL = 5
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@ -555,11 +555,23 @@ LINUXINCLUDE := \
|
||||
$(USERINCLUDE)
|
||||
|
||||
KBUILD_AFLAGS := -D__ASSEMBLY__ -fno-PIE
|
||||
KBUILD_CFLAGS := -Wall -Wundef -Werror=strict-prototypes -Wno-trigraphs \
|
||||
-fno-strict-aliasing -fno-common -fshort-wchar -fno-PIE \
|
||||
-Werror=implicit-function-declaration -Werror=implicit-int \
|
||||
-Werror=return-type -Wno-format-security -funsigned-char \
|
||||
-std=gnu11
|
||||
|
||||
KBUILD_CFLAGS :=
|
||||
KBUILD_CFLAGS += -std=gnu11
|
||||
KBUILD_CFLAGS += -fshort-wchar
|
||||
KBUILD_CFLAGS += -funsigned-char
|
||||
KBUILD_CFLAGS += -fno-common
|
||||
KBUILD_CFLAGS += -fno-PIE
|
||||
KBUILD_CFLAGS += -fno-strict-aliasing
|
||||
KBUILD_CFLAGS += -Wall
|
||||
KBUILD_CFLAGS += -Wundef
|
||||
KBUILD_CFLAGS += -Werror=implicit-function-declaration
|
||||
KBUILD_CFLAGS += -Werror=implicit-int
|
||||
KBUILD_CFLAGS += -Werror=return-type
|
||||
KBUILD_CFLAGS += -Werror=strict-prototypes
|
||||
KBUILD_CFLAGS += -Wno-format-security
|
||||
KBUILD_CFLAGS += -Wno-trigraphs
|
||||
|
||||
KBUILD_CPPFLAGS := -D__KERNEL__
|
||||
KBUILD_RUSTFLAGS := $(rust_common_flags) \
|
||||
--target=$(objtree)/scripts/target.json \
|
||||
|
||||
@ -47,12 +47,6 @@ unsigned long __get_wchan(struct task_struct *p);
|
||||
|
||||
#define ARCH_HAS_PREFETCH
|
||||
#define ARCH_HAS_PREFETCHW
|
||||
#define ARCH_HAS_SPINLOCK_PREFETCH
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
/* Nothing to prefetch. */
|
||||
#define spin_lock_prefetch(lock) do { } while (0)
|
||||
#endif
|
||||
|
||||
extern inline void prefetch(const void *ptr)
|
||||
{
|
||||
@ -64,11 +58,4 @@ extern inline void prefetchw(const void *ptr)
|
||||
__builtin_prefetch(ptr, 1, 3);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
extern inline void spin_lock_prefetch(const void *ptr)
|
||||
{
|
||||
__builtin_prefetch(ptr, 1, 3);
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ALPHA_PROCESSOR_H */
|
||||
|
||||
@ -385,8 +385,7 @@ setup_memory(void *kernel_end)
|
||||
#endif /* CONFIG_BLK_DEV_INITRD */
|
||||
}
|
||||
|
||||
int __init
|
||||
page_is_ram(unsigned long pfn)
|
||||
int page_is_ram(unsigned long pfn)
|
||||
{
|
||||
struct memclust_struct * cluster;
|
||||
struct memdesc_struct * memdesc;
|
||||
|
||||
@ -172,7 +172,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart4: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -240,7 +240,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart5: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
@ -370,7 +370,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart11: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -419,7 +419,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart12: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -576,7 +576,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart6: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -625,7 +625,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart7: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -674,7 +674,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart8: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -723,7 +723,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart0: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -791,7 +791,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart1: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -859,7 +859,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart2: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -927,7 +927,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart3: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -1050,7 +1050,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart9: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
@ -1099,7 +1099,7 @@
|
||||
status = "disabled";
|
||||
|
||||
uart10: serial@200 {
|
||||
compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
|
||||
compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
|
||||
dmas = <&dma0
|
||||
|
||||
@ -161,7 +161,7 @@
|
||||
};
|
||||
|
||||
watchdog: watchdog@90060000 {
|
||||
compatible = "arm,amba-primecell";
|
||||
compatible = "arm,primecell";
|
||||
reg = <0x90060000 0x1000>;
|
||||
interrupts = <3>;
|
||||
};
|
||||
|
||||
@ -60,6 +60,16 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
/* CPU rated to 800 MHz, not the default 1.2GHz. */
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
166666 850000
|
||||
400000 900000
|
||||
800000 1050000
|
||||
>;
|
||||
};
|
||||
|
||||
&ecspi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ecspi1>;
|
||||
|
||||
@ -552,7 +552,7 @@
|
||||
reg = <0x020ca000 0x1000>;
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SLL_CLK_USBPHY2>;
|
||||
phy-reg_3p0-supply = <®_3p0>;
|
||||
phy-3p0-supply = <®_3p0>;
|
||||
fsl,anatop = <&anatop>;
|
||||
};
|
||||
|
||||
|
||||
@ -197,7 +197,7 @@ CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=y
|
||||
CONFIG_FSCACHE=y
|
||||
|
||||
@ -232,7 +232,7 @@ CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
||||
@ -327,7 +327,7 @@ CONFIG_PWM_SAMSUNG=y
|
||||
CONFIG_PHY_EXYNOS5250_SATA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
||||
@ -94,7 +94,7 @@ CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
||||
@ -442,7 +442,7 @@ CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTA_NETLINK_INTERFACE=y
|
||||
# CONFIG_PRINT_QUOTA_WARNING is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_ISO9660_FS=m
|
||||
CONFIG_JOLIET=y
|
||||
|
||||
@ -207,7 +207,7 @@ CONFIG_RESET_TI_SYSCON=m
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_EXT4_FS_POSIX_ACL=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
||||
@ -162,7 +162,7 @@ CONFIG_MAX517=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_LPC32XX=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
||||
@ -81,7 +81,7 @@ CONFIG_SOC_BRCMSTB=y
|
||||
CONFIG_MEMORY=y
|
||||
# CONFIG_ARM_PMU is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
||||
@ -1226,7 +1226,7 @@ CONFIG_COUNTER=m
|
||||
CONFIG_STM32_TIMER_CNT=m
|
||||
CONFIG_STM32_LPTIMER_CNT=m
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
|
||||
@ -188,7 +188,7 @@ CONFIG_RTC_DRV_OMAP=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
|
||||
@ -678,7 +678,7 @@ CONFIG_EXT4_FS_SECURITY=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
||||
@ -589,7 +589,7 @@ CONFIG_REISERFS_FS_XATTR=y
|
||||
CONFIG_REISERFS_FS_POSIX_ACL=y
|
||||
CONFIG_REISERFS_FS_SECURITY=y
|
||||
CONFIG_XFS_FS=m
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_FSCACHE=y
|
||||
|
||||
@ -79,7 +79,7 @@ CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_PCF8583=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_ISO9660_FS=y
|
||||
CONFIG_JOLIET=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
|
||||
@ -103,7 +103,7 @@ CONFIG_PHY_SAMSUNG_USB2=m
|
||||
CONFIG_PHY_S5PV210_USB2=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
||||
@ -136,7 +136,7 @@ CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_POSIX_ACL=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_NTFS_FS=y
|
||||
CONFIG_NTFS_RW=y
|
||||
|
||||
@ -85,7 +85,7 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
|
||||
@ -68,7 +68,7 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
|
||||
@ -54,7 +54,7 @@ CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_AUTOFS_FS=m
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
|
||||
@ -105,5 +105,4 @@ void sharpsl_pm_led(int val);
|
||||
#define MAX1111_ACIN_VOLT 6u
|
||||
int sharpsl_pm_pxa_read_max1111(int channel);
|
||||
|
||||
void corgi_lcd_limit_intensity(int limit);
|
||||
#endif
|
||||
|
||||
@ -15,6 +15,7 @@
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/apm-emulation.h>
|
||||
#include <linux/spi/corgi_lcd.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
@ -197,6 +197,8 @@ config ARM64
|
||||
!CC_OPTIMIZE_FOR_SIZE)
|
||||
select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \
|
||||
if DYNAMIC_FTRACE_WITH_ARGS
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT
|
||||
select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
|
||||
select HAVE_EFFICIENT_UNALIGNED_ACCESS
|
||||
select HAVE_FAST_GUP
|
||||
select HAVE_FTRACE_MCOUNT_RECORD
|
||||
|
||||
@ -145,7 +145,7 @@
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-falling-time-ns = <890>; /* hcnt */
|
||||
i2c-sdl-falling-time-ns = <890>; /* lcnt */
|
||||
i2c-scl-falling-time-ns = <890>; /* lcnt */
|
||||
|
||||
pinctrl-names = "default", "gpio";
|
||||
pinctrl-0 = <&i2c1_pmx_func>;
|
||||
|
||||
@ -141,7 +141,7 @@
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
i2c-sda-falling-time-ns = <890>; /* hcnt */
|
||||
i2c-sdl-falling-time-ns = <890>; /* lcnt */
|
||||
i2c-scl-falling-time-ns = <890>; /* lcnt */
|
||||
|
||||
adc@14 {
|
||||
compatible = "lltc,ltc2497";
|
||||
|
||||
@ -1 +0,0 @@
|
||||
../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi
|
||||
@ -141,7 +141,7 @@
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT",
|
||||
gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT",
|
||||
"", "", "", "RESET_ETHPHY",
|
||||
"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
|
||||
"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";
|
||||
|
||||
@ -111,7 +111,7 @@
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",
|
||||
gpio-line-names = "", "", "WDOG_INT", "X_RTC_INT",
|
||||
"", "", "", "RESET_ETHPHY",
|
||||
"", "", "nENABLE_FLATLINK";
|
||||
};
|
||||
@ -210,7 +210,7 @@
|
||||
};
|
||||
};
|
||||
|
||||
reg_vdd_gpu: buck3 {
|
||||
reg_vdd_vpu: buck3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
|
||||
@ -567,6 +567,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&disp_blk_ctrl {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pgc_mipi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -628,6 +628,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&disp_blk_ctrl {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pgc_mipi {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@ -358,7 +358,7 @@
|
||||
MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
|
||||
MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
|
||||
MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
|
||||
MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
|
||||
MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x159
|
||||
>;
|
||||
};
|
||||
|
||||
|
||||
@ -772,7 +772,7 @@
|
||||
<&clk IMX8MQ_SYS1_PLL_800M>,
|
||||
<&clk IMX8MQ_VPU_PLL>;
|
||||
assigned-clock-rates = <600000000>,
|
||||
<600000000>,
|
||||
<300000000>,
|
||||
<800000000>,
|
||||
<0>;
|
||||
};
|
||||
|
||||
@ -223,20 +223,20 @@
|
||||
<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
|
||||
"tgiv0", "tgie0", "tgif0",
|
||||
"tgia1", "tgib1", "tgiv1", "tgiu1",
|
||||
"tgia2", "tgib2", "tgiv2", "tgiu2",
|
||||
"tciv0", "tgie0", "tgif0",
|
||||
"tgia1", "tgib1", "tciv1", "tciu1",
|
||||
"tgia2", "tgib2", "tciv2", "tciu2",
|
||||
"tgia3", "tgib3", "tgic3", "tgid3",
|
||||
"tgiv3",
|
||||
"tciv3",
|
||||
"tgia4", "tgib4", "tgic4", "tgid4",
|
||||
"tgiv4",
|
||||
"tciv4",
|
||||
"tgiu5", "tgiv5", "tgiw5",
|
||||
"tgia6", "tgib6", "tgic6", "tgid6",
|
||||
"tgiv6",
|
||||
"tciv6",
|
||||
"tgia7", "tgib7", "tgic7", "tgid7",
|
||||
"tgiv7",
|
||||
"tciv7",
|
||||
"tgia8", "tgib8", "tgic8", "tgid8",
|
||||
"tgiv8", "tgiu8";
|
||||
"tciv8", "tciu8";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;
|
||||
|
||||
@ -223,20 +223,20 @@
|
||||
<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
|
||||
"tgiv0", "tgie0", "tgif0",
|
||||
"tgia1", "tgib1", "tgiv1", "tgiu1",
|
||||
"tgia2", "tgib2", "tgiv2", "tgiu2",
|
||||
"tciv0", "tgie0", "tgif0",
|
||||
"tgia1", "tgib1", "tciv1", "tciu1",
|
||||
"tgia2", "tgib2", "tciv2", "tciu2",
|
||||
"tgia3", "tgib3", "tgic3", "tgid3",
|
||||
"tgiv3",
|
||||
"tciv3",
|
||||
"tgia4", "tgib4", "tgic4", "tgid4",
|
||||
"tgiv4",
|
||||
"tciv4",
|
||||
"tgiu5", "tgiv5", "tgiw5",
|
||||
"tgia6", "tgib6", "tgic6", "tgid6",
|
||||
"tgiv6",
|
||||
"tciv6",
|
||||
"tgia7", "tgib7", "tgic7", "tgid7",
|
||||
"tgiv7",
|
||||
"tciv7",
|
||||
"tgia8", "tgib8", "tgic8", "tgid8",
|
||||
"tgiv8", "tgiu8";
|
||||
"tciv8", "tciu8";
|
||||
clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
|
||||
power-domains = <&cpg>;
|
||||
resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;
|
||||
|
||||
@ -1469,7 +1469,7 @@ CONFIG_BTRFS_FS_POSIX_ACL=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_AUTOFS4_FS=y
|
||||
CONFIG_AUTOFS_FS=y
|
||||
CONFIG_FUSE_FS=m
|
||||
CONFIG_CUSE=m
|
||||
CONFIG_OVERLAY_FS=m
|
||||
|
||||
@ -31,6 +31,13 @@
|
||||
.Lskip_hcrx_\@:
|
||||
.endm
|
||||
|
||||
/* Check if running in host at EL2 mode, i.e., (h)VHE. Jump to fail if not. */
|
||||
.macro __check_hvhe fail, tmp
|
||||
mrs \tmp, hcr_el2
|
||||
and \tmp, \tmp, #HCR_E2H
|
||||
cbz \tmp, \fail
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Allow Non-secure EL1 and EL0 to access physical timer and counter.
|
||||
* This is not necessary for VHE, since the host kernel runs in EL2,
|
||||
@ -43,9 +50,7 @@
|
||||
*/
|
||||
.macro __init_el2_timers
|
||||
mov x0, #3 // Enable EL1 physical timers
|
||||
mrs x1, hcr_el2
|
||||
and x1, x1, #HCR_E2H
|
||||
cbz x1, .LnVHE_\@
|
||||
__check_hvhe .LnVHE_\@, x1
|
||||
lsl x0, x0, #10
|
||||
.LnVHE_\@:
|
||||
msr cnthctl_el2, x0
|
||||
@ -139,15 +144,14 @@
|
||||
|
||||
/* Coprocessor traps */
|
||||
.macro __init_el2_cptr
|
||||
mrs x1, hcr_el2
|
||||
and x1, x1, #HCR_E2H
|
||||
cbz x1, .LnVHE_\@
|
||||
__check_hvhe .LnVHE_\@, x1
|
||||
mov x0, #(CPACR_EL1_FPEN_EL1EN | CPACR_EL1_FPEN_EL0EN)
|
||||
b .Lset_cptr_\@
|
||||
msr cpacr_el1, x0
|
||||
b .Lskip_set_cptr_\@
|
||||
.LnVHE_\@:
|
||||
mov x0, #0x33ff
|
||||
.Lset_cptr_\@:
|
||||
msr cptr_el2, x0 // Disable copro. traps to EL2
|
||||
.Lskip_set_cptr_\@:
|
||||
.endm
|
||||
|
||||
/* Disable any fine grained traps */
|
||||
@ -268,19 +272,19 @@
|
||||
check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2
|
||||
|
||||
.Linit_sve_\@: /* SVE register access */
|
||||
mrs x0, cptr_el2 // Disable SVE traps
|
||||
mrs x1, hcr_el2
|
||||
and x1, x1, #HCR_E2H
|
||||
cbz x1, .Lcptr_nvhe_\@
|
||||
__check_hvhe .Lcptr_nvhe_\@, x1
|
||||
|
||||
// VHE case
|
||||
// (h)VHE case
|
||||
mrs x0, cpacr_el1 // Disable SVE traps
|
||||
orr x0, x0, #(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)
|
||||
b .Lset_cptr_\@
|
||||
msr cpacr_el1, x0
|
||||
b .Lskip_set_cptr_\@
|
||||
|
||||
.Lcptr_nvhe_\@: // nVHE case
|
||||
mrs x0, cptr_el2 // Disable SVE traps
|
||||
bic x0, x0, #CPTR_EL2_TZ
|
||||
.Lset_cptr_\@:
|
||||
msr cptr_el2, x0
|
||||
.Lskip_set_cptr_\@:
|
||||
isb
|
||||
mov x1, #ZCR_ELx_LEN_MASK // SVE: Enable full vector
|
||||
msr_s SYS_ZCR_EL2, x1 // length for EL1.
|
||||
@ -289,9 +293,19 @@
|
||||
check_override id_aa64pfr1, ID_AA64PFR1_EL1_SME_SHIFT, .Linit_sme_\@, .Lskip_sme_\@, x1, x2
|
||||
|
||||
.Linit_sme_\@: /* SME register access and priority mapping */
|
||||
__check_hvhe .Lcptr_nvhe_sme_\@, x1
|
||||
|
||||
// (h)VHE case
|
||||
mrs x0, cpacr_el1 // Disable SME traps
|
||||
orr x0, x0, #(CPACR_EL1_SMEN_EL0EN | CPACR_EL1_SMEN_EL1EN)
|
||||
msr cpacr_el1, x0
|
||||
b .Lskip_set_cptr_sme_\@
|
||||
|
||||
.Lcptr_nvhe_sme_\@: // nVHE case
|
||||
mrs x0, cptr_el2 // Disable SME traps
|
||||
bic x0, x0, #CPTR_EL2_TSM
|
||||
msr cptr_el2, x0
|
||||
.Lskip_set_cptr_sme_\@:
|
||||
isb
|
||||
|
||||
mrs x1, sctlr_el2
|
||||
|
||||
@ -211,6 +211,10 @@ static inline unsigned long fgraph_ret_regs_frame_pointer(struct fgraph_ret_regs
|
||||
{
|
||||
return ret_regs->fp;
|
||||
}
|
||||
|
||||
void prepare_ftrace_return(unsigned long self_addr, unsigned long *parent,
|
||||
unsigned long frame_pointer);
|
||||
|
||||
#endif /* ifdef CONFIG_FUNCTION_GRAPH_TRACER */
|
||||
#endif
|
||||
|
||||
|
||||
@ -278,7 +278,7 @@ asmlinkage void __noreturn hyp_panic_bad_stack(void);
|
||||
asmlinkage void kvm_unexpected_el2_exception(void);
|
||||
struct kvm_cpu_context;
|
||||
void handle_trap(struct kvm_cpu_context *host_ctxt);
|
||||
asmlinkage void __noreturn kvm_host_psci_cpu_entry(bool is_cpu_on);
|
||||
asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bool is_cpu_on);
|
||||
void __noreturn __pkvm_init_finalise(void);
|
||||
void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc);
|
||||
void kvm_patch_vector_branch(struct alt_instr *alt,
|
||||
|
||||
@ -571,6 +571,14 @@ static inline bool vcpu_has_feature(struct kvm_vcpu *vcpu, int feature)
|
||||
return test_bit(feature, vcpu->arch.features);
|
||||
}
|
||||
|
||||
static __always_inline void kvm_write_cptr_el2(u64 val)
|
||||
{
|
||||
if (has_vhe() || has_hvhe())
|
||||
write_sysreg(val, cpacr_el1);
|
||||
else
|
||||
write_sysreg(val, cptr_el2);
|
||||
}
|
||||
|
||||
static __always_inline u64 kvm_get_reset_cptr_el2(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u64 val;
|
||||
@ -578,8 +586,16 @@ static __always_inline u64 kvm_get_reset_cptr_el2(struct kvm_vcpu *vcpu)
|
||||
if (has_vhe()) {
|
||||
val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN |
|
||||
CPACR_EL1_ZEN_EL1EN);
|
||||
if (cpus_have_final_cap(ARM64_SME))
|
||||
val |= CPACR_EL1_SMEN_EL1EN;
|
||||
} else if (has_hvhe()) {
|
||||
val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
|
||||
|
||||
if (!vcpu_has_sve(vcpu) ||
|
||||
(vcpu->arch.fp_state != FP_STATE_GUEST_OWNED))
|
||||
val |= CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN;
|
||||
if (cpus_have_final_cap(ARM64_SME))
|
||||
val |= CPACR_EL1_SMEN_EL1EN | CPACR_EL1_SMEN_EL0EN;
|
||||
} else {
|
||||
val = CPTR_NVHE_EL2_RES1;
|
||||
|
||||
@ -597,9 +613,6 @@ static __always_inline void kvm_reset_cptr_el2(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
u64 val = kvm_get_reset_cptr_el2(vcpu);
|
||||
|
||||
if (has_vhe() || has_hvhe())
|
||||
write_sysreg(val, cpacr_el1);
|
||||
else
|
||||
write_sysreg(val, cptr_el2);
|
||||
kvm_write_cptr_el2(val);
|
||||
}
|
||||
#endif /* __ARM64_KVM_EMULATE_H__ */
|
||||
|
||||
@ -727,6 +727,8 @@ struct kvm_vcpu_arch {
|
||||
#define DBG_SS_ACTIVE_PENDING __vcpu_single_flag(sflags, BIT(5))
|
||||
/* PMUSERENR for the guest EL0 is on physical CPU */
|
||||
#define PMUSERENR_ON_CPU __vcpu_single_flag(sflags, BIT(6))
|
||||
/* WFI instruction trapped */
|
||||
#define IN_WFI __vcpu_single_flag(sflags, BIT(7))
|
||||
|
||||
|
||||
/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
|
||||
|
||||
@ -608,22 +608,26 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size);
|
||||
kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr);
|
||||
|
||||
/**
|
||||
* kvm_pgtable_stage2_mkold() - Clear the access flag in a page-table entry.
|
||||
* kvm_pgtable_stage2_test_clear_young() - Test and optionally clear the access
|
||||
* flag in a page-table entry.
|
||||
* @pgt: Page-table structure initialised by kvm_pgtable_stage2_init*().
|
||||
* @addr: Intermediate physical address to identify the page-table entry.
|
||||
* @size: Size of the address range to visit.
|
||||
* @mkold: True if the access flag should be cleared.
|
||||
*
|
||||
* The offset of @addr within a page is ignored.
|
||||
*
|
||||
* If there is a valid, leaf page-table entry used to translate @addr, then
|
||||
* clear the access flag in that entry.
|
||||
* Tests and conditionally clears the access flag for every valid, leaf
|
||||
* page-table entry used to translate the range [@addr, @addr + @size).
|
||||
*
|
||||
* Note that it is the caller's responsibility to invalidate the TLB after
|
||||
* calling this function to ensure that the updated permissions are visible
|
||||
* to the CPUs.
|
||||
*
|
||||
* Return: The old page-table entry prior to clearing the flag, 0 on failure.
|
||||
* Return: True if any of the visited PTEs had the access flag set.
|
||||
*/
|
||||
kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr);
|
||||
bool kvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr,
|
||||
u64 size, bool mkold);
|
||||
|
||||
/**
|
||||
* kvm_pgtable_stage2_relax_perms() - Relax the permissions enforced by a
|
||||
@ -645,18 +649,6 @@ kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr);
|
||||
int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
|
||||
enum kvm_pgtable_prot prot);
|
||||
|
||||
/**
|
||||
* kvm_pgtable_stage2_is_young() - Test whether a page-table entry has the
|
||||
* access flag set.
|
||||
* @pgt: Page-table structure initialised by kvm_pgtable_stage2_init*().
|
||||
* @addr: Intermediate physical address to identify the page-table entry.
|
||||
*
|
||||
* The offset of @addr within a page is ignored.
|
||||
*
|
||||
* Return: True if the page-table entry has the access flag set, false otherwise.
|
||||
*/
|
||||
bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr);
|
||||
|
||||
/**
|
||||
* kvm_pgtable_stage2_flush_range() - Clean and invalidate data cache to Point
|
||||
* of Coherency for guest stage-2 address
|
||||
|
||||
@ -359,14 +359,6 @@ static inline void prefetchw(const void *ptr)
|
||||
asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
|
||||
}
|
||||
|
||||
#define ARCH_HAS_SPINLOCK_PREFETCH
|
||||
static inline void spin_lock_prefetch(const void *ptr)
|
||||
{
|
||||
asm volatile(ARM64_LSE_ATOMIC_INSN(
|
||||
"prfm pstl1strm, %a0",
|
||||
"nop") : : "p" (ptr));
|
||||
}
|
||||
|
||||
extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
|
||||
extern void __init minsigstksz_setup(void);
|
||||
|
||||
|
||||
@ -85,4 +85,7 @@ static inline int syscall_get_arch(struct task_struct *task)
|
||||
return AUDIT_ARCH_AARCH64;
|
||||
}
|
||||
|
||||
int syscall_trace_enter(struct pt_regs *regs);
|
||||
void syscall_trace_exit(struct pt_regs *regs);
|
||||
|
||||
#endif /* __ASM_SYSCALL_H */
|
||||
|
||||
@ -78,6 +78,7 @@ extern u32 __boot_cpu_mode[2];
|
||||
|
||||
void __hyp_set_vectors(phys_addr_t phys_vector_base);
|
||||
void __hyp_reset_vectors(void);
|
||||
bool is_kvm_arm_initialised(void);
|
||||
|
||||
DECLARE_STATIC_KEY_FALSE(kvm_protected_mode_initialized);
|
||||
|
||||
|
||||
@ -679,7 +679,7 @@ static void fpsimd_to_sve(struct task_struct *task)
|
||||
void *sst = task->thread.sve_state;
|
||||
struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
|
||||
|
||||
if (!system_supports_sve())
|
||||
if (!system_supports_sve() && !system_supports_sme())
|
||||
return;
|
||||
|
||||
vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
|
||||
@ -705,7 +705,7 @@ static void sve_to_fpsimd(struct task_struct *task)
|
||||
unsigned int i;
|
||||
__uint128_t const *p;
|
||||
|
||||
if (!system_supports_sve())
|
||||
if (!system_supports_sve() && !system_supports_sme())
|
||||
return;
|
||||
|
||||
vl = thread_get_cur_vl(&task->thread);
|
||||
@ -835,7 +835,8 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
|
||||
void *sst = task->thread.sve_state;
|
||||
struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
|
||||
|
||||
if (!test_tsk_thread_flag(task, TIF_SVE))
|
||||
if (!test_tsk_thread_flag(task, TIF_SVE) &&
|
||||
!thread_sm_enabled(&task->thread))
|
||||
return;
|
||||
|
||||
vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
|
||||
@ -847,6 +848,8 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task)
|
||||
int vec_set_vector_length(struct task_struct *task, enum vec_type type,
|
||||
unsigned long vl, unsigned long flags)
|
||||
{
|
||||
bool free_sme = false;
|
||||
|
||||
if (flags & ~(unsigned long)(PR_SVE_VL_INHERIT |
|
||||
PR_SVE_SET_VL_ONEXEC))
|
||||
return -EINVAL;
|
||||
@ -897,25 +900,40 @@ int vec_set_vector_length(struct task_struct *task, enum vec_type type,
|
||||
task->thread.fp_type = FP_STATE_FPSIMD;
|
||||
}
|
||||
|
||||
if (system_supports_sme() && type == ARM64_VEC_SME) {
|
||||
task->thread.svcr &= ~(SVCR_SM_MASK |
|
||||
SVCR_ZA_MASK);
|
||||
clear_thread_flag(TIF_SME);
|
||||
if (system_supports_sme()) {
|
||||
if (type == ARM64_VEC_SME ||
|
||||
!(task->thread.svcr & (SVCR_SM_MASK | SVCR_ZA_MASK))) {
|
||||
/*
|
||||
* We are changing the SME VL or weren't using
|
||||
* SME anyway, discard the state and force a
|
||||
* reallocation.
|
||||
*/
|
||||
task->thread.svcr &= ~(SVCR_SM_MASK |
|
||||
SVCR_ZA_MASK);
|
||||
clear_tsk_thread_flag(task, TIF_SME);
|
||||
free_sme = true;
|
||||
}
|
||||
}
|
||||
|
||||
if (task == current)
|
||||
put_cpu_fpsimd_context();
|
||||
|
||||
/*
|
||||
* Force reallocation of task SVE and SME state to the correct
|
||||
* size on next use:
|
||||
*/
|
||||
sve_free(task);
|
||||
if (system_supports_sme() && type == ARM64_VEC_SME)
|
||||
sme_free(task);
|
||||
|
||||
task_set_vl(task, type, vl);
|
||||
|
||||
/*
|
||||
* Free the changed states if they are not in use, SME will be
|
||||
* reallocated to the correct size on next use and we just
|
||||
* allocate SVE now in case it is needed for use in streaming
|
||||
* mode.
|
||||
*/
|
||||
if (system_supports_sve()) {
|
||||
sve_free(task);
|
||||
sve_alloc(task, true);
|
||||
}
|
||||
|
||||
if (free_sme)
|
||||
sme_free(task);
|
||||
|
||||
out:
|
||||
update_tsk_thread_flag(task, vec_vl_inherit_flag(type),
|
||||
flags & PR_SVE_VL_INHERIT);
|
||||
@ -1649,7 +1667,6 @@ void fpsimd_flush_thread(void)
|
||||
|
||||
fpsimd_flush_thread_vl(ARM64_VEC_SME);
|
||||
current->thread.svcr = 0;
|
||||
sme_smstop();
|
||||
}
|
||||
|
||||
current->thread.fp_type = FP_STATE_FPSIMD;
|
||||
|
||||
@ -932,11 +932,13 @@ static int sve_set_common(struct task_struct *target,
|
||||
/*
|
||||
* Ensure target->thread.sve_state is up to date with target's
|
||||
* FPSIMD regs, so that a short copyin leaves trailing
|
||||
* registers unmodified. Always enable SVE even if going into
|
||||
* streaming mode.
|
||||
* registers unmodified. Only enable SVE if we are
|
||||
* configuring normal SVE, a system with streaming SVE may not
|
||||
* have normal SVE.
|
||||
*/
|
||||
fpsimd_sync_to_sve(target);
|
||||
set_tsk_thread_flag(target, TIF_SVE);
|
||||
if (type == ARM64_VEC_SVE)
|
||||
set_tsk_thread_flag(target, TIF_SVE);
|
||||
target->thread.fp_type = FP_STATE_SVE;
|
||||
|
||||
BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
|
||||
@ -1180,6 +1182,8 @@ static int zt_set(struct task_struct *target,
|
||||
if (ret == 0)
|
||||
target->thread.svcr |= SVCR_ZA_MASK;
|
||||
|
||||
fpsimd_flush_task_state(target);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@ -75,9 +75,6 @@ static inline bool has_syscall_work(unsigned long flags)
|
||||
return unlikely(flags & _TIF_SYSCALL_WORK);
|
||||
}
|
||||
|
||||
int syscall_trace_enter(struct pt_regs *regs);
|
||||
void syscall_trace_exit(struct pt_regs *regs);
|
||||
|
||||
static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr,
|
||||
const syscall_fn_t syscall_table[])
|
||||
{
|
||||
|
||||
@ -6,6 +6,10 @@
|
||||
*
|
||||
*/
|
||||
|
||||
int __kernel_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);
|
||||
int __kernel_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz);
|
||||
int __kernel_clock_getres(clockid_t clock_id, struct __kernel_timespec *res);
|
||||
|
||||
int __kernel_clock_gettime(clockid_t clock,
|
||||
struct __kernel_timespec *ts)
|
||||
{
|
||||
|
||||
@ -827,8 +827,8 @@ static void timer_set_traps(struct kvm_vcpu *vcpu, struct timer_map *map)
|
||||
assign_clear_set_bit(tpt, CNTHCTL_EL1PCEN << 10, set, clr);
|
||||
assign_clear_set_bit(tpc, CNTHCTL_EL1PCTEN << 10, set, clr);
|
||||
|
||||
/* This only happens on VHE, so use the CNTKCTL_EL1 accessor */
|
||||
sysreg_clear_set(cntkctl_el1, clr, set);
|
||||
/* This only happens on VHE, so use the CNTHCTL_EL2 accessor. */
|
||||
sysreg_clear_set(cnthctl_el2, clr, set);
|
||||
}
|
||||
|
||||
void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
|
||||
@ -1563,7 +1563,7 @@ no_vgic:
|
||||
void kvm_timer_init_vhe(void)
|
||||
{
|
||||
if (cpus_have_final_cap(ARM64_HAS_ECV_CNTPOFF))
|
||||
sysreg_clear_set(cntkctl_el1, 0, CNTHCTL_ECV);
|
||||
sysreg_clear_set(cnthctl_el2, 0, CNTHCTL_ECV);
|
||||
}
|
||||
|
||||
int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
|
||||
|
||||
@ -53,11 +53,16 @@ DECLARE_KVM_NVHE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
|
||||
|
||||
DECLARE_KVM_NVHE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
|
||||
|
||||
static bool vgic_present;
|
||||
static bool vgic_present, kvm_arm_initialised;
|
||||
|
||||
static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled);
|
||||
static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized);
|
||||
DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
|
||||
|
||||
bool is_kvm_arm_initialised(void)
|
||||
{
|
||||
return kvm_arm_initialised;
|
||||
}
|
||||
|
||||
int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
|
||||
@ -713,13 +718,15 @@ void kvm_vcpu_wfi(struct kvm_vcpu *vcpu)
|
||||
*/
|
||||
preempt_disable();
|
||||
kvm_vgic_vmcr_sync(vcpu);
|
||||
vgic_v4_put(vcpu, true);
|
||||
vcpu_set_flag(vcpu, IN_WFI);
|
||||
vgic_v4_put(vcpu);
|
||||
preempt_enable();
|
||||
|
||||
kvm_vcpu_halt(vcpu);
|
||||
vcpu_clear_flag(vcpu, IN_WFIT);
|
||||
|
||||
preempt_disable();
|
||||
vcpu_clear_flag(vcpu, IN_WFI);
|
||||
vgic_v4_load(vcpu);
|
||||
preempt_enable();
|
||||
}
|
||||
@ -787,7 +794,7 @@ static int check_vcpu_requests(struct kvm_vcpu *vcpu)
|
||||
if (kvm_check_request(KVM_REQ_RELOAD_GICv4, vcpu)) {
|
||||
/* The distributor enable bits were changed */
|
||||
preempt_disable();
|
||||
vgic_v4_put(vcpu, false);
|
||||
vgic_v4_put(vcpu);
|
||||
vgic_v4_load(vcpu);
|
||||
preempt_enable();
|
||||
}
|
||||
@ -1857,45 +1864,49 @@ static void cpu_hyp_reinit(void)
|
||||
cpu_hyp_init_features();
|
||||
}
|
||||
|
||||
static void _kvm_arch_hardware_enable(void *discard)
|
||||
static void cpu_hyp_init(void *discard)
|
||||
{
|
||||
if (!__this_cpu_read(kvm_arm_hardware_enabled)) {
|
||||
if (!__this_cpu_read(kvm_hyp_initialized)) {
|
||||
cpu_hyp_reinit();
|
||||
__this_cpu_write(kvm_arm_hardware_enabled, 1);
|
||||
__this_cpu_write(kvm_hyp_initialized, 1);
|
||||
}
|
||||
}
|
||||
|
||||
static void cpu_hyp_uninit(void *discard)
|
||||
{
|
||||
if (__this_cpu_read(kvm_hyp_initialized)) {
|
||||
cpu_hyp_reset();
|
||||
__this_cpu_write(kvm_hyp_initialized, 0);
|
||||
}
|
||||
}
|
||||
|
||||
int kvm_arch_hardware_enable(void)
|
||||
{
|
||||
int was_enabled = __this_cpu_read(kvm_arm_hardware_enabled);
|
||||
/*
|
||||
* Most calls to this function are made with migration
|
||||
* disabled, but not with preemption disabled. The former is
|
||||
* enough to ensure correctness, but most of the helpers
|
||||
* expect the later and will throw a tantrum otherwise.
|
||||
*/
|
||||
preempt_disable();
|
||||
|
||||
_kvm_arch_hardware_enable(NULL);
|
||||
cpu_hyp_init(NULL);
|
||||
|
||||
if (!was_enabled) {
|
||||
kvm_vgic_cpu_up();
|
||||
kvm_timer_cpu_up();
|
||||
}
|
||||
kvm_vgic_cpu_up();
|
||||
kvm_timer_cpu_up();
|
||||
|
||||
preempt_enable();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void _kvm_arch_hardware_disable(void *discard)
|
||||
{
|
||||
if (__this_cpu_read(kvm_arm_hardware_enabled)) {
|
||||
cpu_hyp_reset();
|
||||
__this_cpu_write(kvm_arm_hardware_enabled, 0);
|
||||
}
|
||||
}
|
||||
|
||||
void kvm_arch_hardware_disable(void)
|
||||
{
|
||||
if (__this_cpu_read(kvm_arm_hardware_enabled)) {
|
||||
kvm_timer_cpu_down();
|
||||
kvm_vgic_cpu_down();
|
||||
}
|
||||
kvm_timer_cpu_down();
|
||||
kvm_vgic_cpu_down();
|
||||
|
||||
if (!is_protected_kvm_enabled())
|
||||
_kvm_arch_hardware_disable(NULL);
|
||||
cpu_hyp_uninit(NULL);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CPU_PM
|
||||
@ -1904,16 +1915,16 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
|
||||
void *v)
|
||||
{
|
||||
/*
|
||||
* kvm_arm_hardware_enabled is left with its old value over
|
||||
* kvm_hyp_initialized is left with its old value over
|
||||
* PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should
|
||||
* re-enable hyp.
|
||||
*/
|
||||
switch (cmd) {
|
||||
case CPU_PM_ENTER:
|
||||
if (__this_cpu_read(kvm_arm_hardware_enabled))
|
||||
if (__this_cpu_read(kvm_hyp_initialized))
|
||||
/*
|
||||
* don't update kvm_arm_hardware_enabled here
|
||||
* so that the hardware will be re-enabled
|
||||
* don't update kvm_hyp_initialized here
|
||||
* so that the hyp will be re-enabled
|
||||
* when we resume. See below.
|
||||
*/
|
||||
cpu_hyp_reset();
|
||||
@ -1921,8 +1932,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
|
||||
return NOTIFY_OK;
|
||||
case CPU_PM_ENTER_FAILED:
|
||||
case CPU_PM_EXIT:
|
||||
if (__this_cpu_read(kvm_arm_hardware_enabled))
|
||||
/* The hardware was enabled before suspend. */
|
||||
if (__this_cpu_read(kvm_hyp_initialized))
|
||||
/* The hyp was enabled before suspend. */
|
||||
cpu_hyp_reinit();
|
||||
|
||||
return NOTIFY_OK;
|
||||
@ -2003,7 +2014,7 @@ static int __init init_subsystems(void)
|
||||
/*
|
||||
* Enable hardware so that subsystem initialisation can access EL2.
|
||||
*/
|
||||
on_each_cpu(_kvm_arch_hardware_enable, NULL, 1);
|
||||
on_each_cpu(cpu_hyp_init, NULL, 1);
|
||||
|
||||
/*
|
||||
* Register CPU lower-power notifier
|
||||
@ -2041,7 +2052,7 @@ out:
|
||||
hyp_cpu_pm_exit();
|
||||
|
||||
if (err || !is_protected_kvm_enabled())
|
||||
on_each_cpu(_kvm_arch_hardware_disable, NULL, 1);
|
||||
on_each_cpu(cpu_hyp_uninit, NULL, 1);
|
||||
|
||||
return err;
|
||||
}
|
||||
@ -2079,7 +2090,7 @@ static int __init do_pkvm_init(u32 hyp_va_bits)
|
||||
* The stub hypercalls are now disabled, so set our local flag to
|
||||
* prevent a later re-init attempt in kvm_arch_hardware_enable().
|
||||
*/
|
||||
__this_cpu_write(kvm_arm_hardware_enabled, 1);
|
||||
__this_cpu_write(kvm_hyp_initialized, 1);
|
||||
preempt_enable();
|
||||
|
||||
return ret;
|
||||
@ -2482,6 +2493,8 @@ static __init int kvm_arm_init(void)
|
||||
if (err)
|
||||
goto out_subs;
|
||||
|
||||
kvm_arm_initialised = true;
|
||||
|
||||
return 0;
|
||||
|
||||
out_subs:
|
||||
|
||||
@ -154,6 +154,12 @@ SYM_CODE_END(\label)
|
||||
esb
|
||||
stp x0, x1, [sp, #-16]!
|
||||
662:
|
||||
/*
|
||||
* spectre vectors __bp_harden_hyp_vecs generate br instructions at runtime
|
||||
* that jump at offset 8 at __kvm_hyp_vector.
|
||||
* As hyp .text is guarded section, it needs bti j.
|
||||
*/
|
||||
bti j
|
||||
b \target
|
||||
|
||||
check_preamble_length 661b, 662b
|
||||
@ -165,6 +171,8 @@ check_preamble_length 661b, 662b
|
||||
nop
|
||||
stp x0, x1, [sp, #-16]!
|
||||
662:
|
||||
/* Check valid_vect */
|
||||
bti j
|
||||
b \target
|
||||
|
||||
check_preamble_length 661b, 662b
|
||||
|
||||
@ -457,6 +457,7 @@ static bool handle_ampere1_tcr(struct kvm_vcpu *vcpu)
|
||||
*/
|
||||
val &= ~(TCR_HD | TCR_HA);
|
||||
write_sysreg_el1(val, SYS_TCR);
|
||||
__kvm_skip_instr(vcpu);
|
||||
return true;
|
||||
}
|
||||
|
||||
|
||||
@ -705,7 +705,20 @@ int hyp_ffa_init(void *pages)
|
||||
if (res.a0 == FFA_RET_NOT_SUPPORTED)
|
||||
return 0;
|
||||
|
||||
if (res.a0 != FFA_VERSION_1_0)
|
||||
/*
|
||||
* Firmware returns the maximum supported version of the FF-A
|
||||
* implementation. Check that the returned version is
|
||||
* backwards-compatible with the hyp according to the rules in DEN0077A
|
||||
* v1.1 REL0 13.2.1.
|
||||
*
|
||||
* Of course, things are never simple when dealing with firmware. v1.1
|
||||
* broke ABI with v1.0 on several structures, which is itself
|
||||
* incompatible with the aforementioned versioning scheme. The
|
||||
* expectation is that v1.x implementations that do not support the v1.0
|
||||
* ABI return NOT_SUPPORTED rather than a version number, according to
|
||||
* DEN0077A v1.1 REL0 18.6.4.
|
||||
*/
|
||||
if (FFA_MAJOR_VERSION(res.a0) != 1)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
arm_smccc_1_1_smc(FFA_ID_GET, 0, 0, 0, 0, 0, 0, 0, &res);
|
||||
|
||||
@ -297,3 +297,13 @@ SYM_CODE_START(__kvm_hyp_host_forward_smc)
|
||||
|
||||
ret
|
||||
SYM_CODE_END(__kvm_hyp_host_forward_smc)
|
||||
|
||||
/*
|
||||
* kvm_host_psci_cpu_entry is called through br instruction, which requires
|
||||
* bti j instruction as compilers (gcc and llvm) doesn't insert bti j for external
|
||||
* functions, but bti c instead.
|
||||
*/
|
||||
SYM_CODE_START(kvm_host_psci_cpu_entry)
|
||||
bti j
|
||||
b __kvm_host_psci_cpu_entry
|
||||
SYM_CODE_END(kvm_host_psci_cpu_entry)
|
||||
|
||||
@ -200,7 +200,7 @@ static int psci_system_suspend(u64 func_id, struct kvm_cpu_context *host_ctxt)
|
||||
__hyp_pa(init_params), 0);
|
||||
}
|
||||
|
||||
asmlinkage void __noreturn kvm_host_psci_cpu_entry(bool is_cpu_on)
|
||||
asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bool is_cpu_on)
|
||||
{
|
||||
struct psci_boot_args *boot_args;
|
||||
struct kvm_cpu_context *host_ctxt;
|
||||
|
||||
@ -63,7 +63,7 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
|
||||
__activate_traps_fpsimd32(vcpu);
|
||||
}
|
||||
|
||||
write_sysreg(val, cptr_el2);
|
||||
kvm_write_cptr_el2(val);
|
||||
write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el2);
|
||||
|
||||
if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {
|
||||
|
||||
@ -1195,25 +1195,54 @@ kvm_pte_t kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr)
|
||||
return pte;
|
||||
}
|
||||
|
||||
kvm_pte_t kvm_pgtable_stage2_mkold(struct kvm_pgtable *pgt, u64 addr)
|
||||
struct stage2_age_data {
|
||||
bool mkold;
|
||||
bool young;
|
||||
};
|
||||
|
||||
static int stage2_age_walker(const struct kvm_pgtable_visit_ctx *ctx,
|
||||
enum kvm_pgtable_walk_flags visit)
|
||||
{
|
||||
kvm_pte_t pte = 0;
|
||||
stage2_update_leaf_attrs(pgt, addr, 1, 0, KVM_PTE_LEAF_ATTR_LO_S2_AF,
|
||||
&pte, NULL, 0);
|
||||
kvm_pte_t new = ctx->old & ~KVM_PTE_LEAF_ATTR_LO_S2_AF;
|
||||
struct stage2_age_data *data = ctx->arg;
|
||||
|
||||
if (!kvm_pte_valid(ctx->old) || new == ctx->old)
|
||||
return 0;
|
||||
|
||||
data->young = true;
|
||||
|
||||
/*
|
||||
* stage2_age_walker() is always called while holding the MMU lock for
|
||||
* write, so this will always succeed. Nonetheless, this deliberately
|
||||
* follows the race detection pattern of the other stage-2 walkers in
|
||||
* case the locking mechanics of the MMU notifiers is ever changed.
|
||||
*/
|
||||
if (data->mkold && !stage2_try_set_pte(ctx, new))
|
||||
return -EAGAIN;
|
||||
|
||||
/*
|
||||
* "But where's the TLBI?!", you scream.
|
||||
* "Over in the core code", I sigh.
|
||||
*
|
||||
* See the '->clear_flush_young()' callback on the KVM mmu notifier.
|
||||
*/
|
||||
return pte;
|
||||
return 0;
|
||||
}
|
||||
|
||||
bool kvm_pgtable_stage2_is_young(struct kvm_pgtable *pgt, u64 addr)
|
||||
bool kvm_pgtable_stage2_test_clear_young(struct kvm_pgtable *pgt, u64 addr,
|
||||
u64 size, bool mkold)
|
||||
{
|
||||
kvm_pte_t pte = 0;
|
||||
stage2_update_leaf_attrs(pgt, addr, 1, 0, 0, &pte, NULL, 0);
|
||||
return pte & KVM_PTE_LEAF_ATTR_LO_S2_AF;
|
||||
struct stage2_age_data data = {
|
||||
.mkold = mkold,
|
||||
};
|
||||
struct kvm_pgtable_walker walker = {
|
||||
.cb = stage2_age_walker,
|
||||
.arg = &data,
|
||||
.flags = KVM_PGTABLE_WALK_LEAF,
|
||||
};
|
||||
|
||||
WARN_ON(kvm_pgtable_walk(pgt, addr, size, &walker));
|
||||
return data.young;
|
||||
}
|
||||
|
||||
int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
|
||||
|
||||
@ -1756,27 +1756,25 @@ bool kvm_set_spte_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
||||
bool kvm_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
||||
{
|
||||
u64 size = (range->end - range->start) << PAGE_SHIFT;
|
||||
kvm_pte_t kpte;
|
||||
pte_t pte;
|
||||
|
||||
if (!kvm->arch.mmu.pgt)
|
||||
return false;
|
||||
|
||||
WARN_ON(size != PAGE_SIZE && size != PMD_SIZE && size != PUD_SIZE);
|
||||
|
||||
kpte = kvm_pgtable_stage2_mkold(kvm->arch.mmu.pgt,
|
||||
range->start << PAGE_SHIFT);
|
||||
pte = __pte(kpte);
|
||||
return pte_valid(pte) && pte_young(pte);
|
||||
return kvm_pgtable_stage2_test_clear_young(kvm->arch.mmu.pgt,
|
||||
range->start << PAGE_SHIFT,
|
||||
size, true);
|
||||
}
|
||||
|
||||
bool kvm_test_age_gfn(struct kvm *kvm, struct kvm_gfn_range *range)
|
||||
{
|
||||
u64 size = (range->end - range->start) << PAGE_SHIFT;
|
||||
|
||||
if (!kvm->arch.mmu.pgt)
|
||||
return false;
|
||||
|
||||
return kvm_pgtable_stage2_is_young(kvm->arch.mmu.pgt,
|
||||
range->start << PAGE_SHIFT);
|
||||
return kvm_pgtable_stage2_test_clear_young(kvm->arch.mmu.pgt,
|
||||
range->start << PAGE_SHIFT,
|
||||
size, false);
|
||||
}
|
||||
|
||||
phys_addr_t kvm_mmu_get_httbr(void)
|
||||
|
||||
@ -244,7 +244,7 @@ static int __init finalize_pkvm(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
if (!is_protected_kvm_enabled())
|
||||
if (!is_protected_kvm_enabled() || !is_kvm_arm_initialised())
|
||||
return 0;
|
||||
|
||||
/*
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user