Merge remote-tracking branches 'asoc/fix/amd', 'asoc/fix/hdmi-codec', 'asoc/fix/rt5651', 'asoc/fix/samsung', 'asoc/fix/sgtl5000', 'asoc/fix/sunxi' and 'asoc/fix/wm-adsp' into asoc-linus
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a3e39ed1f4
@ -9925,6 +9925,13 @@ F: Documentation/ABI/stable/sysfs-bus-nvmem
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F: include/linux/nvmem-consumer.h
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F: include/linux/nvmem-provider.h
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NXP SGTL5000 DRIVER
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M: Fabio Estevam <fabio.estevam@nxp.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Maintained
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F: Documentation/devicetree/bindings/sound/sgtl5000.txt
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F: sound/soc/codecs/sgtl5000*
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NXP TDA998X DRM DRIVER
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M: Russell King <linux@armlinux.org.uk>
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S: Supported
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@ -12107,6 +12114,7 @@ M: Sylwester Nawrocki <s.nawrocki@samsung.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)
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S: Supported
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F: sound/soc/samsung/
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F: Documentation/devicetree/bindings/sound/samsung*
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SAMSUNG EXYNOS PSEUDO RANDOM NUMBER GENERATOR (RNG) DRIVER
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M: Krzysztof Kozlowski <krzk@kernel.org>
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@ -579,13 +579,6 @@ static int acp_init(void __iomem *acp_mmio, u32 asic_type)
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for (bank = 1; bank < 48; bank++)
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acp_set_sram_bank_state(acp_mmio, bank, false);
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}
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/* Stoney supports 16bit resolution */
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if (asic_type == CHIP_STONEY) {
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val = acp_reg_read(acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
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val |= 0x03;
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acp_reg_write(val, acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
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}
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return 0;
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}
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@ -774,6 +767,7 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
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{
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int status;
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uint64_t size;
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u32 val = 0;
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struct page *pg;
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struct snd_pcm_runtime *runtime;
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struct audio_substream_data *rtd;
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@ -786,6 +780,14 @@ static int acp_dma_hw_params(struct snd_pcm_substream *substream,
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if (WARN_ON(!rtd))
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return -EINVAL;
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if (adata->asic_type == CHIP_STONEY) {
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val = acp_reg_read(adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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val |= ACP_I2S_SP_16BIT_RESOLUTION_EN;
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else
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val |= ACP_I2S_MIC_16BIT_RESOLUTION_EN;
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acp_reg_write(val, adata->acp_mmio, mmACP_I2S_16BIT_RESOLUTION_EN);
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}
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size = params_buffer_bytes(params);
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status = snd_pcm_lib_malloc_pages(substream, size);
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if (status < 0)
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@ -70,6 +70,8 @@
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#define CAPTURE_END_DMA_DESCR_CH15 7
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#define mmACP_I2S_16BIT_RESOLUTION_EN 0x5209
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#define ACP_I2S_MIC_16BIT_RESOLUTION_EN 0x01
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#define ACP_I2S_SP_16BIT_RESOLUTION_EN 0x02
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enum acp_dma_priority_level {
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/* 0x0 Specifies the DMA channel is given normal priority */
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ACP_DMA_PRIORITY_LEVEL_NORMAL = 0x0,
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@ -798,12 +798,7 @@ static int hdmi_codec_probe(struct platform_device *pdev)
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static int hdmi_codec_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct hdmi_codec_priv *hcp;
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hcp = dev_get_drvdata(dev);
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kfree(hcp->chmap_info);
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snd_soc_unregister_codec(dev);
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snd_soc_unregister_codec(&pdev->dev);
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return 0;
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}
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@ -1722,6 +1722,7 @@ static const struct regmap_config rt5651_regmap = {
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.num_reg_defaults = ARRAY_SIZE(rt5651_reg),
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.ranges = rt5651_ranges,
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.num_ranges = ARRAY_SIZE(rt5651_ranges),
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.use_single_rw = true,
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};
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#if defined(CONFIG_OF)
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@ -529,10 +529,15 @@ static const struct snd_kcontrol_new sgtl5000_snd_controls[] = {
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static int sgtl5000_digital_mute(struct snd_soc_dai *codec_dai, int mute)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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u16 adcdac_ctrl = SGTL5000_DAC_MUTE_LEFT | SGTL5000_DAC_MUTE_RIGHT;
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u16 i2s_pwr = SGTL5000_I2S_IN_POWERUP;
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snd_soc_update_bits(codec, SGTL5000_CHIP_ADCDAC_CTRL,
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adcdac_ctrl, mute ? adcdac_ctrl : 0);
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/*
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* During 'digital mute' do not mute DAC
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* because LINE_IN would be muted aswell. We want to mute
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* only I2S block - this can be done by powering it off
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*/
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snd_soc_update_bits(codec, SGTL5000_CHIP_DIG_POWER,
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i2s_pwr, mute ? 0 : i2s_pwr);
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return 0;
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}
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@ -871,15 +876,26 @@ static int sgtl5000_pcm_hw_params(struct snd_pcm_substream *substream,
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static int sgtl5000_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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struct sgtl5000_priv *sgtl = snd_soc_codec_get_drvdata(codec);
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int ret;
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switch (level) {
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case SND_SOC_BIAS_ON:
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case SND_SOC_BIAS_PREPARE:
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case SND_SOC_BIAS_STANDBY:
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regcache_cache_only(sgtl->regmap, false);
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ret = regcache_sync(sgtl->regmap);
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if (ret) {
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regcache_cache_only(sgtl->regmap, true);
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return ret;
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}
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snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
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SGTL5000_REFTOP_POWERUP,
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SGTL5000_REFTOP_POWERUP);
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break;
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case SND_SOC_BIAS_OFF:
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regcache_cache_only(sgtl->regmap, true);
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snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
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SGTL5000_REFTOP_POWERUP, 0);
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break;
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@ -1237,6 +1253,10 @@ static int sgtl5000_probe(struct snd_soc_codec *codec)
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*/
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snd_soc_write(codec, SGTL5000_DAP_CTRL, 0);
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/* Unmute DAC after start */
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snd_soc_update_bits(codec, SGTL5000_CHIP_ADCDAC_CTRL,
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SGTL5000_DAC_MUTE_LEFT | SGTL5000_DAC_MUTE_RIGHT, 0);
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return 0;
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err:
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@ -1204,12 +1204,14 @@ static int wmfw_add_ctl(struct wm_adsp *dsp, struct wm_coeff_ctl *ctl)
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kcontrol->put = wm_coeff_put_acked;
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break;
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default:
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kcontrol->get = wm_coeff_get;
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kcontrol->put = wm_coeff_put;
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ctl->bytes_ext.max = ctl->len;
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ctl->bytes_ext.get = wm_coeff_tlv_get;
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ctl->bytes_ext.put = wm_coeff_tlv_put;
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if (kcontrol->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
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ctl->bytes_ext.max = ctl->len;
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ctl->bytes_ext.get = wm_coeff_tlv_get;
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ctl->bytes_ext.put = wm_coeff_tlv_put;
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} else {
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kcontrol->get = wm_coeff_get;
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kcontrol->put = wm_coeff_put;
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}
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break;
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}
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@ -104,7 +104,7 @@
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#define SUN8I_I2S_CHAN_CFG_REG 0x30
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#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM_MASK GENMASK(6, 4)
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#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) (chan - 1)
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#define SUN8I_I2S_CHAN_CFG_RX_SLOT_NUM(chan) ((chan - 1) << 4)
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#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM_MASK GENMASK(2, 0)
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#define SUN8I_I2S_CHAN_CFG_TX_SLOT_NUM(chan) (chan - 1)
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