drm/amdgpu: Introduce reset domain
Defined a reset_domain struct such that all the entities that go through reset together will be serialized one against another. Do it for both single device and XGMI hive cases. Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Suggested-by: Christian König <ckoenig.leichtzumerken@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://www.spinics.net/lists/amd-gfx/msg74111.html
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@ -813,6 +813,10 @@ struct amd_powerplay {
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#define AMDGPU_RESET_MAGIC_NUM 64
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#define AMDGPU_MAX_DF_PERFMONS 4
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#define AMDGPU_PRODUCT_NAME_LEN 64
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struct amdgpu_reset_domain {
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struct workqueue_struct *wq;
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};
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struct amdgpu_device {
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struct device *dev;
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struct pci_dev *pdev;
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@ -1100,6 +1104,7 @@ struct amdgpu_device {
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uint32_t ip_versions[MAX_HWIP][HWIP_MAX_INSTANCE];
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bool ram_is_direct_mapped;
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struct amdgpu_reset_domain reset_domain;
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};
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static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)
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