drm/amdgpu: Introduce reset domain

Defined a reset_domain struct such that
all the entities that go through reset
together will be serialized one against
another. Do it for both single device and
XGMI hive cases.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Suggested-by: Christian König <ckoenig.leichtzumerken@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Link: https://www.spinics.net/lists/amd-gfx/msg74111.html
This commit is contained in:
Andrey Grodzovsky
2021-11-30 16:19:03 -05:00
parent b21a142fd2
commit a4c63cafa5
4 changed files with 35 additions and 1 deletions

View File

@ -813,6 +813,10 @@ struct amd_powerplay {
#define AMDGPU_RESET_MAGIC_NUM 64
#define AMDGPU_MAX_DF_PERFMONS 4
#define AMDGPU_PRODUCT_NAME_LEN 64
struct amdgpu_reset_domain {
struct workqueue_struct *wq;
};
struct amdgpu_device {
struct device *dev;
struct pci_dev *pdev;
@ -1100,6 +1104,7 @@ struct amdgpu_device {
uint32_t ip_versions[MAX_HWIP][HWIP_MAX_INSTANCE];
bool ram_is_direct_mapped;
struct amdgpu_reset_domain reset_domain;
};
static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev)