drm/xe: Convert Xe HW Engine print to snapshot capture and print.
The goal is to allow for a snapshot capture to be taken at the time
of the crash, while the print out can happen at a later time through
the exposed devcoredump virtual device.
v2: Addressing these Matthew comments:
- Handle memory allocation failures.
- Do not use GFP_ATOMIC on cases like debugfs prints.
- placement of @reg doc.
- identation issues.
v3: checkpatch
v4: Rebase and get back to GFP_ATOMIC only.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
This commit is contained in:
Rodrigo Vivi
parent
3847ec03dd
commit
a4db555587
@ -42,7 +42,7 @@ static int hw_engines(struct seq_file *m, void *data)
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}
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for_each_hw_engine(hwe, gt, id)
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xe_hw_engine_print_state(hwe, &p);
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xe_hw_engine_print(hwe, &p);
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xe_device_mem_access_put(xe);
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err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
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@ -751,7 +751,7 @@ static void simple_error_capture(struct xe_engine *e)
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if (hwe->class != e->hwe->class ||
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!(BIT(hwe->logical_instance) & adj_logical_mask))
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continue;
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xe_hw_engine_print_state(hwe, &p);
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xe_hw_engine_print(hwe, &p);
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}
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xe_analyze_vm(&p, e->vm, e->gt->info.id);
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xe_force_wake_put(gt_to_fw(guc_to_gt(guc)), XE_FORCEWAKE_ALL);
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@ -574,77 +574,174 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec)
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xe_hw_fence_irq_run(hwe->fence_irq);
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}
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void xe_hw_engine_print_state(struct xe_hw_engine *hwe, struct drm_printer *p)
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/**
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* xe_hw_engine_snapshot_capture - Take a quick snapshot of the HW Engine.
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* @hwe: Xe HW Engine.
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*
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* This can be printed out in a later stage like during dev_coredump
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* analysis.
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*
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* Returns: a Xe HW Engine snapshot object that must be freed by the
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* caller, using `xe_hw_engine_snapshot_free`.
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*/
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struct xe_hw_engine_snapshot *
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xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
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{
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struct xe_hw_engine_snapshot *snapshot;
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int len;
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if (!xe_hw_engine_is_valid(hwe))
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return NULL;
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snapshot = kzalloc(sizeof(*snapshot), GFP_ATOMIC);
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if (!snapshot)
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return NULL;
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len = strlen(hwe->name) + 1;
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snapshot->name = kzalloc(len, GFP_ATOMIC);
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if (snapshot->name)
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strscpy(snapshot->name, hwe->name, len);
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snapshot->class = hwe->class;
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snapshot->logical_instance = hwe->logical_instance;
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snapshot->forcewake.domain = hwe->domain;
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snapshot->forcewake.ref = xe_force_wake_ref(gt_to_fw(hwe->gt),
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hwe->domain);
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snapshot->mmio_base = hwe->mmio_base;
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snapshot->reg.ring_hwstam = hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
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snapshot->reg.ring_hws_pga = hw_engine_mmio_read32(hwe,
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RING_HWS_PGA(0));
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snapshot->reg.ring_execlist_status_lo =
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hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0));
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snapshot->reg.ring_execlist_status_hi =
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hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0));
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snapshot->reg.ring_execlist_sq_contents_lo =
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hw_engine_mmio_read32(hwe,
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RING_EXECLIST_SQ_CONTENTS_LO(0));
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snapshot->reg.ring_execlist_sq_contents_hi =
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hw_engine_mmio_read32(hwe,
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RING_EXECLIST_SQ_CONTENTS_HI(0));
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snapshot->reg.ring_execlist_control =
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hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0));
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snapshot->reg.ring_start = hw_engine_mmio_read32(hwe, RING_START(0));
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snapshot->reg.ring_head =
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hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR;
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snapshot->reg.ring_tail =
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hw_engine_mmio_read32(hwe, RING_TAIL(0)) & TAIL_ADDR;
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snapshot->reg.ring_ctl = hw_engine_mmio_read32(hwe, RING_CTL(0));
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snapshot->reg.ring_mi_mode =
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hw_engine_mmio_read32(hwe, RING_MI_MODE(0));
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snapshot->reg.ring_mode = hw_engine_mmio_read32(hwe, RING_MODE(0));
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snapshot->reg.ring_imr = hw_engine_mmio_read32(hwe, RING_IMR(0));
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snapshot->reg.ring_esr = hw_engine_mmio_read32(hwe, RING_ESR(0));
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snapshot->reg.ring_emr = hw_engine_mmio_read32(hwe, RING_EMR(0));
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snapshot->reg.ring_eir = hw_engine_mmio_read32(hwe, RING_EIR(0));
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snapshot->reg.ring_acthd_udw =
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hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0));
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snapshot->reg.ring_acthd = hw_engine_mmio_read32(hwe, RING_ACTHD(0));
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snapshot->reg.ring_bbaddr_udw =
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hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0));
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snapshot->reg.ring_bbaddr = hw_engine_mmio_read32(hwe, RING_BBADDR(0));
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snapshot->reg.ring_dma_fadd_udw =
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hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0));
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snapshot->reg.ring_dma_fadd =
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hw_engine_mmio_read32(hwe, RING_DMA_FADD(0));
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snapshot->reg.ipeir = hw_engine_mmio_read32(hwe, IPEIR(0));
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snapshot->reg.ipehr = hw_engine_mmio_read32(hwe, IPEHR(0));
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if (snapshot->class == XE_ENGINE_CLASS_COMPUTE)
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snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);
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return snapshot;
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}
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/**
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* xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
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* @snapshot: Xe HW Engine snapshot object.
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* @p: drm_printer where it will be printed out.
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*
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* This function prints out a given Xe HW Engine snapshot object.
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*/
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void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
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struct drm_printer *p)
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{
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if (!snapshot)
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return;
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drm_printf(p, "%s (physical), logical instance=%d\n", hwe->name,
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hwe->logical_instance);
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drm_printf(p, "%s (physical), logical instance=%d\n",
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snapshot->name ? snapshot->name : "",
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snapshot->logical_instance);
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drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
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hwe->domain,
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xe_force_wake_ref(gt_to_fw(hwe->gt), hwe->domain));
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drm_printf(p, "\tMMIO base: 0x%08x\n", hwe->mmio_base);
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drm_printf(p, "\tHWSTAM: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_HWSTAM(0)));
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drm_printf(p, "\tRING_HWS_PGA: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_HWS_PGA(0)));
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snapshot->forcewake.domain, snapshot->forcewake.ref);
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drm_printf(p, "\tHWSTAM: 0x%08x\n", snapshot->reg.ring_hwstam);
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drm_printf(p, "\tRING_HWS_PGA: 0x%08x\n", snapshot->reg.ring_hws_pga);
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drm_printf(p, "\tRING_EXECLIST_STATUS_LO: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0)));
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snapshot->reg.ring_execlist_status_lo);
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drm_printf(p, "\tRING_EXECLIST_STATUS_HI: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0)));
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snapshot->reg.ring_execlist_status_hi);
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drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_LO: 0x%08x\n",
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hw_engine_mmio_read32(hwe,
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RING_EXECLIST_SQ_CONTENTS_LO(0)));
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snapshot->reg.ring_execlist_sq_contents_lo);
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drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS_HI: 0x%08x\n",
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hw_engine_mmio_read32(hwe,
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RING_EXECLIST_SQ_CONTENTS_HI(0)));
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snapshot->reg.ring_execlist_sq_contents_hi);
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drm_printf(p, "\tRING_EXECLIST_CONTROL: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_EXECLIST_CONTROL(0)));
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drm_printf(p, "\tRING_START: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_START(0)));
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drm_printf(p, "\tRING_HEAD: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR);
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drm_printf(p, "\tRING_TAIL: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_TAIL(0)) & TAIL_ADDR);
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drm_printf(p, "\tRING_CTL: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_CTL(0)));
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snapshot->reg.ring_execlist_control);
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drm_printf(p, "\tRING_START: 0x%08x\n", snapshot->reg.ring_start);
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drm_printf(p, "\tRING_HEAD: 0x%08x\n", snapshot->reg.ring_head);
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drm_printf(p, "\tRING_TAIL: 0x%08x\n", snapshot->reg.ring_tail);
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drm_printf(p, "\tRING_CTL: 0x%08x\n", snapshot->reg.ring_ctl);
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drm_printf(p, "\tRING_MODE: 0x%08x\n", snapshot->reg.ring_mi_mode);
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drm_printf(p, "\tRING_MODE: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_MI_MODE(0)));
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drm_printf(p, "\tRING_MODE_GEN7: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_MODE(0)));
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drm_printf(p, "\tRING_IMR: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_IMR(0)));
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drm_printf(p, "\tRING_ESR: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_ESR(0)));
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drm_printf(p, "\tRING_EMR: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_EMR(0)));
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drm_printf(p, "\tRING_EIR: 0x%08x\n",
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hw_engine_mmio_read32(hwe, RING_EIR(0)));
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drm_printf(p, "\tACTHD: 0x%08x_%08x\n",
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hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0)),
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hw_engine_mmio_read32(hwe, RING_ACTHD(0)));
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drm_printf(p, "\tBBADDR: 0x%08x_%08x\n",
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hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0)),
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hw_engine_mmio_read32(hwe, RING_BBADDR(0)));
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snapshot->reg.ring_mode);
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drm_printf(p, "\tRING_IMR: 0x%08x\n", snapshot->reg.ring_imr);
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drm_printf(p, "\tRING_ESR: 0x%08x\n", snapshot->reg.ring_esr);
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drm_printf(p, "\tRING_EMR: 0x%08x\n", snapshot->reg.ring_emr);
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drm_printf(p, "\tRING_EIR: 0x%08x\n", snapshot->reg.ring_eir);
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drm_printf(p, "\tACTHD: 0x%08x_%08x\n", snapshot->reg.ring_acthd_udw,
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snapshot->reg.ring_acthd);
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drm_printf(p, "\tBBADDR: 0x%08x_%08x\n", snapshot->reg.ring_bbaddr_udw,
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snapshot->reg.ring_bbaddr);
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drm_printf(p, "\tDMA_FADDR: 0x%08x_%08x\n",
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hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0)),
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hw_engine_mmio_read32(hwe, RING_DMA_FADD(0)));
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drm_printf(p, "\tIPEIR: 0x%08x\n",
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hw_engine_mmio_read32(hwe, IPEIR(0)));
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drm_printf(p, "\tIPEHR: 0x%08x\n\n",
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hw_engine_mmio_read32(hwe, IPEHR(0)));
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if (hwe->class == XE_ENGINE_CLASS_COMPUTE)
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snapshot->reg.ring_dma_fadd_udw,
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snapshot->reg.ring_dma_fadd);
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drm_printf(p, "\tIPEIR: 0x%08x\n", snapshot->reg.ipeir);
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drm_printf(p, "\tIPEHR: 0x%08x\n\n", snapshot->reg.ipehr);
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if (snapshot->class == XE_ENGINE_CLASS_COMPUTE)
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drm_printf(p, "\tRCU_MODE: 0x%08x\n",
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xe_mmio_read32(hwe->gt, RCU_MODE));
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snapshot->reg.rcu_mode);
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}
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/**
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* xe_hw_engine_snapshot_free - Free all allocated objects for a given snapshot.
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* @snapshot: Xe HW Engine snapshot object.
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*
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* This function free all the memory that needed to be allocated at capture
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* time.
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*/
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void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot)
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{
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if (!snapshot)
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return;
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kfree(snapshot->name);
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kfree(snapshot);
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}
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/**
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* xe_hw_engine_print - Xe HW Engine Print.
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* @hwe: Hardware Engine.
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* @p: drm_printer.
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*
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* This function quickly capture a snapshot and immediately print it out.
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*/
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void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p)
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{
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struct xe_hw_engine_snapshot *snapshot;
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snapshot = xe_hw_engine_snapshot_capture(hwe);
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xe_hw_engine_snapshot_print(snapshot, p);
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xe_hw_engine_snapshot_free(snapshot);
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}
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u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
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@ -14,9 +14,15 @@ int xe_hw_engines_init_early(struct xe_gt *gt);
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int xe_hw_engines_init(struct xe_gt *gt);
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void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec);
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void xe_hw_engine_enable_ring(struct xe_hw_engine *hwe);
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void xe_hw_engine_print_state(struct xe_hw_engine *hwe, struct drm_printer *p);
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u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
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enum xe_engine_class engine_class);
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struct xe_hw_engine_snapshot *
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xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe);
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void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
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void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
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struct drm_printer *p);
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void xe_hw_engine_print(struct xe_hw_engine *hwe, struct drm_printer *p);
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void xe_hw_engine_setup_default_lrc_state(struct xe_hw_engine *hwe);
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bool xe_hw_engine_is_reserved(struct xe_hw_engine *hwe);
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@ -109,4 +109,82 @@ struct xe_hw_engine {
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enum xe_hw_engine_id engine_id;
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};
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/**
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* struct xe_hw_engine_snapshot - Hardware engine snapshot
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*
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* Contains the snapshot of useful hardware engine info and registers.
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*/
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struct xe_hw_engine_snapshot {
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/** @name: name of the hw engine */
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char *name;
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/** @class: class of this hw engine */
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enum xe_engine_class class;
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/** @logical_instance: logical instance of this hw engine */
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u16 logical_instance;
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/** @forcewake: Force Wake information snapshot */
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struct {
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/** @domain: force wake domain of this hw engine */
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enum xe_force_wake_domains domain;
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/** @ref: Forcewake ref for the above domain */
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int ref;
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} forcewake;
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/** @mmio_base: MMIO base address of this hw engine*/
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u32 mmio_base;
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/** @reg: Useful MMIO register snapshot */
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struct {
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/** @ring_hwstam: RING_HWSTAM */
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u32 ring_hwstam;
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/** @ring_hws_pga: RING_HWS_PGA */
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u32 ring_hws_pga;
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/** @ring_execlist_status_lo: RING_EXECLIST_STATUS_LO */
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u32 ring_execlist_status_lo;
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/** @ring_execlist_status_hi: RING_EXECLIST_STATUS_HI */
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u32 ring_execlist_status_hi;
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/** @ring_execlist_sq_contents_lo: RING_EXECLIST_SQ_CONTENTS */
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u32 ring_execlist_sq_contents_lo;
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/** @ring_execlist_sq_contents_hi: RING_EXECLIST_SQ_CONTENTS + 4 */
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u32 ring_execlist_sq_contents_hi;
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/** @ring_execlist_control: RING_EXECLIST_CONTROL */
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u32 ring_execlist_control;
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/** @ring_start: RING_START */
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u32 ring_start;
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/** @ring_head: RING_HEAD */
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u32 ring_head;
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/** @ring_tail: RING_TAIL */
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u32 ring_tail;
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/** @ring_ctl: RING_CTL */
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u32 ring_ctl;
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/** @ring_mi_mode: RING_MI_MODE */
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u32 ring_mi_mode;
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/** @ring_mode: RING_MODE */
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u32 ring_mode;
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/** @ring_imr: RING_IMR */
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u32 ring_imr;
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/** @ring_esr: RING_ESR */
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u32 ring_esr;
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/** @ring_emr: RING_EMR */
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u32 ring_emr;
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/** @ring_eir: RING_EIR */
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u32 ring_eir;
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/** @ring_acthd_udw: RING_ACTHD_UDW */
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u32 ring_acthd_udw;
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/** @ring_acthd: RING_ACTHD */
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u32 ring_acthd;
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/** @ring_bbaddr_udw: RING_BBADDR_UDW */
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u32 ring_bbaddr_udw;
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/** @ring_bbaddr: RING_BBADDR */
|
||||
u32 ring_bbaddr;
|
||||
/** @ring_dma_fadd_udw: RING_DMA_FADD_UDW */
|
||||
u32 ring_dma_fadd_udw;
|
||||
/** @ring_dma_fadd: RING_DMA_FADD */
|
||||
u32 ring_dma_fadd;
|
||||
/** @ipeir: IPEIR */
|
||||
u32 ipeir;
|
||||
/** @ipehr: IPEHR */
|
||||
u32 ipehr;
|
||||
/** @rcu_mode: RCU_MODE */
|
||||
u32 rcu_mode;
|
||||
} reg;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
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Reference in New Issue
Block a user