Pin control fixes for v5.15:
- Fix wakeup interrupts in the AMD driver affecting AMD laptops. - Fix parent irqspec translation in the Qualcomm SPMI GPIO driver. - Fix deferred probe handling in the Rockchip driver, this is a stopgap solution while we look for something more elegant. - Add PM suspend callbacks to the Qualcomm SC7280 driver. - Some minor doc fix (should have come in earlier, sorry) -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmFTkc4ACgkQQRCzN7AZ XXNfYA//fE2S4iV3d8Vj5rO03jtUSDdPRKg0TGFmL44pz+HPkIz+lRMbeEqjjEzi G1Rm4GNyifiS01jh3DSa3aS0JhdvOyVD7J2Hih2WEVYvMxi+ZUfdcuGgfwD1xFmO Haweg9vEYBlAtW1NcJPHH4YxN+qBwgrW41cnMOGxR4IB/sNGNoDdAdxJaXfwno08 Ku+5PgIQif6YVb45WFgzDD6TF+khXClw2oqlNu7iO9TJ4zVP5I9of10bmhpPzfhW SoT2ySoxvBZqV71y6vtmc9X58nxyMRCFSWMVhCeQRcFnYRywpBpbLgP99y3xBxOn tYrseBXmguCe/tCqlld3BmHFwHkVC6vzURB9sEYL1Ea+xhQ3bnI4swMrt2UB2KAE UIWYw1nq6p8hMEGdsr042+9S8W6HNJGrfFs7YcFFmEuL7wJ4DtStNXkNWvXbXTs0 +w0XoUbA1IjOzfycJguU1J9pZSZopd0xOL9aTmJGYC1zNUUvPOYGM9NknbHr50mH mhTJYyRUCi2QDWUV7SforTdnRwkaZiW1j+wggOw1rO5pEt3orBgZQ/cPeMBYV+FR lHiKtAHBoXMq0a93zukGyD4iH0CPnefiHWhvrfq+Md/Q91fJvAw6cTRIOYSz6XW3 XGGvRN+xj0kk+vo+o5dyDgnZewKK8nVUBwGyiG2gzA2FNYZKVEQ= =Gel/ -----END PGP SIGNATURE----- Merge tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control fixes from Linus Walleij: "Some few pin control fixes for the v5.15 kernel cycle. The most critical is the AMD fixes. - Fix wakeup interrupts in the AMD driver affecting AMD laptops. - Fix parent irqspec translation in the Qualcomm SPMI GPIO driver. - Fix deferred probe handling in the Rockchip driver, this is a stopgap solution while we look for something more elegant. - Add PM suspend callbacks to the Qualcomm SC7280 driver. - Some minor doc fix (should have come in earlier, sorry)" * tag 'pinctrl-v5.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: pinctrl: qcom: sc7280: Add PM suspend callbacks gpio/rockchip: fetch deferred output settings on probe pinctrl/rockchip: add a queue for deferred pin output settings on probe pinctrl: qcom: spmi-gpio: correct parent irqspec translation pinctrl: amd: Handle wake-up interrupt pinctrl: amd: Add irq field data pinctrl: core: Remove duplicated word from devm_pinctrl_unregister()
This commit is contained in:
commit
a4e6f95a89
@ -689,6 +689,7 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
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struct device_node *pctlnp = of_get_parent(np);
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struct pinctrl_dev *pctldev = NULL;
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struct rockchip_pin_bank *bank = NULL;
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struct rockchip_pin_output_deferred *cfg;
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static int gpio;
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int id, ret;
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@ -716,12 +717,33 @@ static int rockchip_gpio_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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/*
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* Prevent clashes with a deferred output setting
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* being added right at this moment.
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*/
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mutex_lock(&bank->deferred_lock);
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ret = rockchip_gpiolib_register(bank);
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if (ret) {
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clk_disable_unprepare(bank->clk);
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mutex_unlock(&bank->deferred_lock);
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return ret;
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}
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while (!list_empty(&bank->deferred_output)) {
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cfg = list_first_entry(&bank->deferred_output,
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struct rockchip_pin_output_deferred, head);
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list_del(&cfg->head);
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ret = rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->arg);
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if (ret)
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dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->arg);
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kfree(cfg);
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}
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mutex_unlock(&bank->deferred_lock);
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platform_set_drvdata(pdev, bank);
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dev_info(dev, "probed %pOF\n", np);
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@ -2306,7 +2306,7 @@ EXPORT_SYMBOL_GPL(devm_pinctrl_register_and_init);
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/**
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* devm_pinctrl_unregister() - Resource managed version of pinctrl_unregister().
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* @dev: device for which which resource was allocated
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* @dev: device for which resource was allocated
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* @pctldev: the pinctrl device to unregister.
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*/
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void devm_pinctrl_unregister(struct device *dev, struct pinctrl_dev *pctldev)
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@ -445,6 +445,7 @@ static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
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u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3);
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int err;
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
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@ -457,6 +458,15 @@ static int amd_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
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writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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if (on)
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err = enable_irq_wake(gpio_dev->irq);
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else
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err = disable_irq_wake(gpio_dev->irq);
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if (err)
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dev_err(&gpio_dev->pdev->dev, "failed to %s wake-up interrupt\n",
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on ? "enable" : "disable");
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return 0;
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}
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@ -902,7 +912,6 @@ static struct pinctrl_desc amd_pinctrl_desc = {
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static int amd_gpio_probe(struct platform_device *pdev)
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{
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int ret = 0;
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int irq_base;
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struct resource *res;
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struct amd_gpio *gpio_dev;
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struct gpio_irq_chip *girq;
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@ -925,9 +934,9 @@ static int amd_gpio_probe(struct platform_device *pdev)
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if (!gpio_dev->base)
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return -ENOMEM;
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irq_base = platform_get_irq(pdev, 0);
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if (irq_base < 0)
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return irq_base;
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gpio_dev->irq = platform_get_irq(pdev, 0);
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if (gpio_dev->irq < 0)
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return gpio_dev->irq;
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#ifdef CONFIG_PM_SLEEP
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gpio_dev->saved_regs = devm_kcalloc(&pdev->dev, amd_pinctrl_desc.npins,
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@ -987,7 +996,7 @@ static int amd_gpio_probe(struct platform_device *pdev)
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goto out2;
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}
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ret = devm_request_irq(&pdev->dev, irq_base, amd_gpio_irq_handler,
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ret = devm_request_irq(&pdev->dev, gpio_dev->irq, amd_gpio_irq_handler,
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IRQF_SHARED, KBUILD_MODNAME, gpio_dev);
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if (ret)
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goto out2;
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@ -98,6 +98,7 @@ struct amd_gpio {
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struct resource *res;
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struct platform_device *pdev;
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u32 *saved_regs;
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int irq;
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};
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/* KERNCZ configuration*/
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@ -2092,6 +2092,23 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
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return false;
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}
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static int rockchip_pinconf_defer_output(struct rockchip_pin_bank *bank,
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unsigned int pin, u32 arg)
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{
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struct rockchip_pin_output_deferred *cfg;
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cfg = kzalloc(sizeof(*cfg), GFP_KERNEL);
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if (!cfg)
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return -ENOMEM;
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cfg->pin = pin;
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cfg->arg = arg;
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list_add_tail(&cfg->head, &bank->deferred_output);
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return 0;
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}
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/* set the pin config settings for a specified pin */
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static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *configs, unsigned num_configs)
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@ -2136,6 +2153,22 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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if (rc != RK_FUNC_GPIO)
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return -EINVAL;
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/*
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* Check for gpio driver not being probed yet.
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* The lock makes sure that either gpio-probe has completed
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* or the gpio driver hasn't probed yet.
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*/
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mutex_lock(&bank->deferred_lock);
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if (!gpio || !gpio->direction_output) {
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rc = rockchip_pinconf_defer_output(bank, pin - bank->pin_base, arg);
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mutex_unlock(&bank->deferred_lock);
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if (rc)
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return rc;
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break;
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}
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mutex_unlock(&bank->deferred_lock);
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rc = gpio->direction_output(gpio, pin - bank->pin_base,
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arg);
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if (rc)
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@ -2204,6 +2237,11 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
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if (rc != RK_FUNC_GPIO)
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return -EINVAL;
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if (!gpio || !gpio->get) {
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arg = 0;
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break;
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}
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rc = gpio->get(gpio, pin - bank->pin_base);
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if (rc < 0)
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return rc;
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@ -2450,6 +2488,9 @@ static int rockchip_pinctrl_register(struct platform_device *pdev,
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pin_bank->name, pin);
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pdesc++;
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}
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INIT_LIST_HEAD(&pin_bank->deferred_output);
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mutex_init(&pin_bank->deferred_lock);
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}
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ret = rockchip_pinctrl_parse_dt(pdev, info);
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@ -2716,6 +2757,31 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
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return 0;
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}
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static int rockchip_pinctrl_remove(struct platform_device *pdev)
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{
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struct rockchip_pinctrl *info = platform_get_drvdata(pdev);
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struct rockchip_pin_bank *bank;
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struct rockchip_pin_output_deferred *cfg;
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int i;
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of_platform_depopulate(&pdev->dev);
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for (i = 0; i < info->ctrl->nr_banks; i++) {
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bank = &info->ctrl->pin_banks[i];
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mutex_lock(&bank->deferred_lock);
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while (!list_empty(&bank->deferred_output)) {
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cfg = list_first_entry(&bank->deferred_output,
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struct rockchip_pin_output_deferred, head);
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list_del(&cfg->head);
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kfree(cfg);
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}
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mutex_unlock(&bank->deferred_lock);
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}
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return 0;
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}
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static struct rockchip_pin_bank px30_pin_banks[] = {
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PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
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IOMUX_SOURCE_PMU,
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@ -3175,6 +3241,7 @@ static const struct of_device_id rockchip_pinctrl_dt_match[] = {
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static struct platform_driver rockchip_pinctrl_driver = {
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.probe = rockchip_pinctrl_probe,
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.remove = rockchip_pinctrl_remove,
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.driver = {
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.name = "rockchip-pinctrl",
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.pm = &rockchip_pinctrl_dev_pm_ops,
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@ -141,6 +141,8 @@ struct rockchip_drv {
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* @toggle_edge_mode: bit mask to toggle (falling/rising) edge mode
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* @recalced_mask: bit mask to indicate a need to recalulate the mask
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* @route_mask: bits describing the routing pins of per bank
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* @deferred_output: gpio output settings to be done after gpio bank probed
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* @deferred_lock: mutex for the deferred_output shared btw gpio and pinctrl
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*/
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struct rockchip_pin_bank {
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struct device *dev;
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@ -169,6 +171,8 @@ struct rockchip_pin_bank {
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u32 toggle_edge_mode;
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u32 recalced_mask;
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u32 route_mask;
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struct list_head deferred_output;
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struct mutex deferred_lock;
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};
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/**
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@ -243,6 +247,12 @@ struct rockchip_pin_config {
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unsigned int nconfigs;
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};
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struct rockchip_pin_output_deferred {
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struct list_head head;
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unsigned int pin;
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u32 arg;
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};
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/**
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* struct rockchip_pin_group: represent group of pins of a pinmux function.
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* @name: name of the pin group, used to lookup the group.
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static struct platform_driver sc7280_pinctrl_driver = {
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.driver = {
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.name = "sc7280-pinctrl",
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.pm = &msm_pinctrl_dev_pm_ops,
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.of_match_table = sc7280_pinctrl_of_match,
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},
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.probe = sc7280_pinctrl_probe,
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
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* Copyright (c) 2012-2014, 2016-2021 The Linux Foundation. All rights reserved.
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*/
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#include <linux/gpio/driver.h>
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@ -14,6 +14,7 @@
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/spmi.h>
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#include <linux/types.h>
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#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
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@ -171,6 +172,8 @@ struct pmic_gpio_state {
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struct pinctrl_dev *ctrl;
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struct gpio_chip chip;
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struct irq_chip irq;
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u8 usid;
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u8 pid_base;
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};
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static const struct pinconf_generic_params pmic_gpio_bindings[] = {
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@ -949,12 +952,36 @@ static int pmic_gpio_child_to_parent_hwirq(struct gpio_chip *chip,
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unsigned int *parent_hwirq,
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unsigned int *parent_type)
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{
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*parent_hwirq = child_hwirq + 0xc0;
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struct pmic_gpio_state *state = gpiochip_get_data(chip);
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*parent_hwirq = child_hwirq + state->pid_base;
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*parent_type = child_type;
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return 0;
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}
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static void *pmic_gpio_populate_parent_fwspec(struct gpio_chip *chip,
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unsigned int parent_hwirq,
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unsigned int parent_type)
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{
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struct pmic_gpio_state *state = gpiochip_get_data(chip);
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struct irq_fwspec *fwspec;
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fwspec = kzalloc(sizeof(*fwspec), GFP_KERNEL);
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if (!fwspec)
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return NULL;
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fwspec->fwnode = chip->irq.parent_domain->fwnode;
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fwspec->param_count = 4;
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fwspec->param[0] = state->usid;
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fwspec->param[1] = parent_hwirq;
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/* param[2] must be left as 0 */
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fwspec->param[3] = parent_type;
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return fwspec;
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}
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static int pmic_gpio_probe(struct platform_device *pdev)
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{
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struct irq_domain *parent_domain;
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@ -965,6 +992,7 @@ static int pmic_gpio_probe(struct platform_device *pdev)
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struct pmic_gpio_pad *pad, *pads;
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struct pmic_gpio_state *state;
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struct gpio_irq_chip *girq;
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const struct spmi_device *parent_spmi_dev;
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int ret, npins, i;
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u32 reg;
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@ -984,6 +1012,9 @@ static int pmic_gpio_probe(struct platform_device *pdev)
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state->dev = &pdev->dev;
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state->map = dev_get_regmap(dev->parent, NULL);
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parent_spmi_dev = to_spmi_device(dev->parent);
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state->usid = parent_spmi_dev->usid;
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state->pid_base = reg >> 8;
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pindesc = devm_kcalloc(dev, npins, sizeof(*pindesc), GFP_KERNEL);
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if (!pindesc)
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@ -1059,7 +1090,7 @@ static int pmic_gpio_probe(struct platform_device *pdev)
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girq->fwnode = of_node_to_fwnode(state->dev->of_node);
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girq->parent_domain = parent_domain;
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girq->child_to_parent_hwirq = pmic_gpio_child_to_parent_hwirq;
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girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_fourcell;
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girq->populate_parent_alloc_arg = pmic_gpio_populate_parent_fwspec;
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girq->child_offset_to_irq = pmic_gpio_child_offset_to_irq;
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girq->child_irq_domain_ops.translate = pmic_gpio_domain_translate;
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