Pull trivial into release branch
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a51a69c0ed
@ -97,6 +97,9 @@ static int set_max_cstate(struct dmi_system_id *id)
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/* Actually this shouldn't be __cpuinitdata, would be better to fix the
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callers to only run once -AK */
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static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
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{ set_max_cstate, "IBM ThinkPad R40e", {
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DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
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DMI_MATCH(DMI_BIOS_VERSION,"1SET70WW")}, (void *)1},
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{ set_max_cstate, "IBM ThinkPad R40e", {
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DMI_MATCH(DMI_BIOS_VENDOR,"IBM"),
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DMI_MATCH(DMI_BIOS_VERSION,"1SET60WW")}, (void *)1},
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@ -365,7 +368,9 @@ static void acpi_processor_idle(void)
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C2 */
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inb(cx->address);
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/* Dummy op - must do something useless after P_LVL2 read */
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/* Dummy wait op - must do something useless after P_LVL2 read
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because chipsets cannot guarantee that STPCLK# signal
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gets asserted in time to freeze execution properly. */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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@ -403,7 +408,7 @@ static void acpi_processor_idle(void)
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t1 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Invoke C3 */
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inb(cx->address);
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/* Dummy op - must do something useless after P_LVL3 read */
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/* Dummy wait op (see above) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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/* Get end time (ticks) */
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t2 = inl(acpi_fadt.xpm_tmr_blk.address);
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