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NTB: ntb_hw_amd: set peer limit register

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As per amd ntb spec it says that peer limit register
must be programmed

Signed-off-by: Sanjay R Mehta <sanju.mehta@amd.com>
Acked-by: Allen Hubbe <allenbh@gmail.com>
Acked-by: Logan Gunthorpe <logang@deltatee.com>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>
This commit is contained in:
Sanjay R Mehta 2019-02-15 09:21:46 +00:00 committed by Jon Mason
parent 12c023d7c3
commit a5c3666f1c
1 changed files with 4 additions and 4 deletions
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8
drivers/ntb/hw/amd/ntb_hw_amd.c
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@ -160,8 +160,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
}
/* set and verify setting the limit */
write64(limit, mmio + limit_reg);
reg_val = read64(mmio + limit_reg);
write64(limit, peer_mmio + limit_reg);
reg_val = read64(peer_mmio + limit_reg);
if (reg_val != limit) {
write64(base_addr, mmio + limit_reg);
write64(0, peer_mmio + xlat_reg);
@ -183,8 +183,8 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
}
/* set and verify setting the limit */
writel(limit, mmio + limit_reg);
reg_val = readl(mmio + limit_reg);
writel(limit, peer_mmio + limit_reg);
reg_val = readl(peer_mmio + limit_reg);
if (reg_val != limit) {
writel(base_addr, mmio + limit_reg);
writel(0, peer_mmio + xlat_reg);