drm: bridge: samsung-dsim: fix blanking packet size calculation
Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Adam Ford <aford173@gmail.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # imx8mm-icore Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20230526030559.326566-2-aford173@gmail.com
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@ -885,17 +885,29 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi)
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u32 reg;
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if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
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int byte_clk_khz = dsi->burst_clk_rate / 1000 / 8;
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int hfp = (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock;
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int hbp = (m->htotal - m->hsync_end) * byte_clk_khz / m->clock;
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int hsa = (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock;
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/* remove packet overhead when possible */
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hfp = max(hfp - 6, 0);
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hbp = max(hbp - 6, 0);
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hsa = max(hsa - 6, 0);
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dev_dbg(dsi->dev, "calculated hfp: %u, hbp: %u, hsa: %u",
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hfp, hbp, hsa);
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reg = DSIM_CMD_ALLOW(0xf)
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| DSIM_STABLE_VFP(m->vsync_start - m->vdisplay)
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| DSIM_MAIN_VBP(m->vtotal - m->vsync_end);
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samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg);
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reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay)
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| DSIM_MAIN_HBP(m->htotal - m->hsync_end);
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reg = DSIM_MAIN_HFP(hfp) | DSIM_MAIN_HBP(hbp);
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samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg);
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reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start)
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| DSIM_MAIN_HSA(m->hsync_end - m->hsync_start);
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| DSIM_MAIN_HSA(hsa);
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samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg);
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}
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reg = DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) |
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