drm/amdgpu: enable PCS error report on arcturus
add arcturus xgmi/wafl pcs err status group to support PCS error detection and report on arcturus Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -51,6 +51,21 @@ static const int wafl_pcs_err_status_reg_vg20[] = {
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smnPCS_GOPX1_0_PCS_GOPX1_PCS_ERROR_STATUS + 0x100000,
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};
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static const int xgmi_pcs_err_status_reg_arct[] = {
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS,
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS + 0x100000,
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS + 0x500000,
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS + 0x600000,
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS + 0x700000,
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smnXGMI0_PCS_GOPX16_PCS_ERROR_STATUS + 0x800000,
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};
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/* same as vg20*/
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static const int wafl_pcs_err_status_reg_arct[] = {
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smnPCS_GOPX1_0_PCS_GOPX1_PCS_ERROR_STATUS,
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smnPCS_GOPX1_0_PCS_GOPX1_PCS_ERROR_STATUS + 0x100000,
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};
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static const struct amdgpu_pcs_ras_field xgmi_pcs_ras_fields[] = {
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{"XGMI PCS DataLossErr",
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SOC15_REG_FIELD(XGMI0_PCS_GOPX16_PCS_ERROR_STATUS, DataLossErr)},
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@ -709,6 +724,22 @@ int amdgpu_xgmi_query_ras_error_count(struct amdgpu_device *adev,
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err_data->ce_count = 0;
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switch (adev->asic_type) {
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case CHIP_ARCTURUS:
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/* check xgmi pcs error */
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for (i = 0; i < ARRAY_SIZE(xgmi_pcs_err_status_reg_arct); i++) {
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data = RREG32_PCIE(xgmi_pcs_err_status_reg_arct[i]);
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if (data)
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amdgpu_xgmi_query_pcs_error_status(adev,
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data, &ue_cnt, &ce_cnt, true);
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}
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/* check wafl pcs error */
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for (i = 0; i < ARRAY_SIZE(wafl_pcs_err_status_reg_arct); i++) {
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data = RREG32_PCIE(wafl_pcs_err_status_reg_arct[i]);
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if (data)
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amdgpu_xgmi_query_pcs_error_status(adev,
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data, &ue_cnt, &ce_cnt, false);
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}
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break;
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case CHIP_VEGA20:
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default:
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/* check xgmi pcs error */
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