Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
cyber2000fb: fix console in truecolor modes
cyber2000fb: fix machine hang on module load
SA1111: Eliminate use after free
ARM: Fix Versatile/Realview/VExpress MMC card detection sense
ARM: 6279/1: highmem: fix SMP preemption bug in kmap_high_l1_vipt
ARM: Add barriers to io{read,write}{8,16,32} accessors as well
ARM: 6273/1: Add barriers to the I/O accessors if ARM_DMA_MEM_BUFFERABLE
ARM: 6272/1: Convert L2x0 to use the IO relaxed operations
ARM: 6271/1: Introduce *_relaxed() I/O accessors
ARM: 6275/1: ux500: don't use writeb() in uncompress.h
ARM: 6270/1: clean files in arch/arm/boot/compressed/
ARM: Fix csum_partial_copy_from_user()
This commit is contained in:
Linus Torvalds
commit
a63ecd835f
@ -71,6 +71,9 @@ targets := vmlinux vmlinux.lds \
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piggy.$(suffix_y) piggy.$(suffix_y).o \
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font.o font.c head.o misc.o $(OBJS)
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# Make sure files are removed during clean
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extra-y += piggy.gzip piggy.lzo piggy.lzma lib1funcs.S
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ifeq ($(CONFIG_FUNCTION_TRACER),y)
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ORIG_CFLAGS := $(KBUILD_CFLAGS)
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KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
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@ -1028,13 +1028,12 @@ static int sa1111_remove(struct platform_device *pdev)
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struct sa1111 *sachip = platform_get_drvdata(pdev);
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if (sachip) {
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__sa1111_remove(sachip);
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platform_set_drvdata(pdev, NULL);
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#ifdef CONFIG_PM
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kfree(sachip->saved_state);
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sachip->saved_state = NULL;
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#endif
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__sa1111_remove(sachip);
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platform_set_drvdata(pdev, NULL);
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}
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return 0;
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@ -26,6 +26,7 @@
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <asm/memory.h>
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#include <asm/system.h>
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/*
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* ISA I/O bus memory addresses are 1:1 with the physical address.
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@ -179,25 +180,38 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
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* IO port primitives for more information.
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*/
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#ifdef __mem_pci
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#define readb(c) ({ __u8 __v = __raw_readb(__mem_pci(c)); __v; })
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#define readw(c) ({ __u16 __v = le16_to_cpu((__force __le16) \
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#define readb_relaxed(c) ({ u8 __v = __raw_readb(__mem_pci(c)); __v; })
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#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16) \
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__raw_readw(__mem_pci(c))); __v; })
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#define readl(c) ({ __u32 __v = le32_to_cpu((__force __le32) \
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#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32) \
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__raw_readl(__mem_pci(c))); __v; })
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#define readb_relaxed(addr) readb(addr)
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#define readw_relaxed(addr) readw(addr)
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#define readl_relaxed(addr) readl(addr)
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#define writeb_relaxed(v,c) ((void)__raw_writeb(v,__mem_pci(c)))
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#define writew_relaxed(v,c) ((void)__raw_writew((__force u16) \
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cpu_to_le16(v),__mem_pci(c)))
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#define writel_relaxed(v,c) ((void)__raw_writel((__force u32) \
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cpu_to_le32(v),__mem_pci(c)))
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#ifdef CONFIG_ARM_DMA_MEM_BUFFERABLE
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#define __iormb() rmb()
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#define __iowmb() wmb()
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#else
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#define __iormb() do { } while (0)
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#define __iowmb() do { } while (0)
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#endif
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#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
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#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
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#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
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#define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
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#define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
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#define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
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#define readsb(p,d,l) __raw_readsb(__mem_pci(p),d,l)
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#define readsw(p,d,l) __raw_readsw(__mem_pci(p),d,l)
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#define readsl(p,d,l) __raw_readsl(__mem_pci(p),d,l)
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#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
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#define writew(v,c) __raw_writew((__force __u16) \
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cpu_to_le16(v),__mem_pci(c))
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#define writel(v,c) __raw_writel((__force __u32) \
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cpu_to_le32(v),__mem_pci(c))
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#define writesb(p,d,l) __raw_writesb(__mem_pci(p),d,l)
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#define writesw(p,d,l) __raw_writesw(__mem_pci(p),d,l)
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#define writesl(p,d,l) __raw_writesl(__mem_pci(p),d,l)
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@ -244,13 +258,13 @@ extern void _memset_io(volatile void __iomem *, int, size_t);
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* io{read,write}{8,16,32} macros
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*/
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#ifndef ioread8
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#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __v; })
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#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __v; })
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#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __v; })
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#define ioread8(p) ({ unsigned int __v = __raw_readb(p); __iormb(); __v; })
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#define ioread16(p) ({ unsigned int __v = le16_to_cpu((__force __le16)__raw_readw(p)); __iormb(); __v; })
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#define ioread32(p) ({ unsigned int __v = le32_to_cpu((__force __le32)__raw_readl(p)); __iormb(); __v; })
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#define iowrite8(v,p) __raw_writeb(v, p)
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#define iowrite16(v,p) __raw_writew((__force __u16)cpu_to_le16(v), p)
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#define iowrite32(v,p) __raw_writel((__force __u32)cpu_to_le32(v), p)
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#define iowrite8(v,p) ({ __iowmb(); (void)__raw_writeb(v, p); })
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#define iowrite16(v,p) ({ __iowmb(); (void)__raw_writew((__force __u16)cpu_to_le16(v), p); })
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#define iowrite32(v,p) ({ __iowmb(); (void)__raw_writel((__force __u32)cpu_to_le32(v), p); })
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#define ioread8_rep(p,d,c) __raw_readsb(p,d,c)
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#define ioread16_rep(p,d,c) __raw_readsw(p,d,c)
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@ -71,7 +71,7 @@
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.pushsection .fixup,"ax"
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.align 4
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9001: mov r4, #-EFAULT
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ldr r5, [fp, #4] @ *err_ptr
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ldr r5, [sp, #8*4] @ *err_ptr
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str r4, [r5]
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ldmia sp, {r1, r2} @ retrieve dst, len
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add r2, r2, r1
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@ -237,7 +237,7 @@ static unsigned int realview_mmc_status(struct device *dev)
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else
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mask = 2;
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return !(readl(REALVIEW_SYSMCI) & mask);
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return readl(REALVIEW_SYSMCI) & mask;
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}
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struct mmci_platform_data realview_mmc0_plat_data = {
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@ -30,22 +30,22 @@
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static void putc(const char c)
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{
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/* Do nothing if the UART is not enabled. */
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if (!(readb(U8500_UART_CR) & 0x1))
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if (!(__raw_readb(U8500_UART_CR) & 0x1))
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return;
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if (c == '\n')
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putc('\r');
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while (readb(U8500_UART_FR) & (1 << 5))
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while (__raw_readb(U8500_UART_FR) & (1 << 5))
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barrier();
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writeb(c, U8500_UART_DR);
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__raw_writeb(c, U8500_UART_DR);
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}
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static void flush(void)
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{
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if (!(readb(U8500_UART_CR) & 0x1))
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if (!(__raw_readb(U8500_UART_CR) & 0x1))
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return;
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while (readb(U8500_UART_FR) & (1 << 3))
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while (__raw_readb(U8500_UART_FR) & (1 << 3))
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barrier();
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}
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@ -241,7 +241,7 @@ static struct platform_device v2m_flash_device = {
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static unsigned int v2m_mmci_status(struct device *dev)
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{
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return !(readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0));
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return readl(MMIO_P2V(V2M_SYS_MCI)) & (1 << 0);
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}
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static struct mmci_platform_data v2m_mmci_data = {
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@ -32,14 +32,14 @@ static uint32_t l2x0_way_mask; /* Bitmask of active ways */
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static inline void cache_wait(void __iomem *reg, unsigned long mask)
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{
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/* wait for the operation to complete */
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while (readl(reg) & mask)
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while (readl_relaxed(reg) & mask)
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;
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}
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static inline void cache_sync(void)
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{
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void __iomem *base = l2x0_base;
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writel(0, base + L2X0_CACHE_SYNC);
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writel_relaxed(0, base + L2X0_CACHE_SYNC);
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cache_wait(base + L2X0_CACHE_SYNC, 1);
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}
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@ -47,14 +47,14 @@ static inline void l2x0_clean_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
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writel(addr, base + L2X0_CLEAN_LINE_PA);
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writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
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}
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static inline void l2x0_inv_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_INV_LINE_PA, 1);
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writel(addr, base + L2X0_INV_LINE_PA);
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writel_relaxed(addr, base + L2X0_INV_LINE_PA);
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}
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#ifdef CONFIG_PL310_ERRATA_588369
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@ -75,9 +75,9 @@ static inline void l2x0_flush_line(unsigned long addr)
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/* Clean by PA followed by Invalidate by PA */
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cache_wait(base + L2X0_CLEAN_LINE_PA, 1);
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writel(addr, base + L2X0_CLEAN_LINE_PA);
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writel_relaxed(addr, base + L2X0_CLEAN_LINE_PA);
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cache_wait(base + L2X0_INV_LINE_PA, 1);
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writel(addr, base + L2X0_INV_LINE_PA);
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writel_relaxed(addr, base + L2X0_INV_LINE_PA);
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}
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#else
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@ -90,7 +90,7 @@ static inline void l2x0_flush_line(unsigned long addr)
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{
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void __iomem *base = l2x0_base;
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cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1);
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writel(addr, base + L2X0_CLEAN_INV_LINE_PA);
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writel_relaxed(addr, base + L2X0_CLEAN_INV_LINE_PA);
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}
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#endif
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@ -109,7 +109,7 @@ static inline void l2x0_inv_all(void)
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/* invalidate all ways */
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spin_lock_irqsave(&l2x0_lock, flags);
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writel(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
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writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
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cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
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cache_sync();
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spin_unlock_irqrestore(&l2x0_lock, flags);
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@ -215,8 +215,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
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l2x0_base = base;
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cache_id = readl(l2x0_base + L2X0_CACHE_ID);
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aux = readl(l2x0_base + L2X0_AUX_CTRL);
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cache_id = readl_relaxed(l2x0_base + L2X0_CACHE_ID);
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aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
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aux &= aux_mask;
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aux |= aux_val;
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@ -248,15 +248,15 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
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* If you are booting from non-secure mode
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* accessing the below registers will fault.
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*/
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if (!(readl(l2x0_base + L2X0_CTRL) & 1)) {
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
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/* l2x0 controller is disabled */
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writel(aux, l2x0_base + L2X0_AUX_CTRL);
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writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
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l2x0_inv_all();
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/* enable L2X0 */
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writel(1, l2x0_base + L2X0_CTRL);
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writel_relaxed(1, l2x0_base + L2X0_CTRL);
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}
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outer_cache.inv_range = l2x0_inv_range;
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@ -163,19 +163,22 @@ static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
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void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
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{
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unsigned int idx, cpu = smp_processor_id();
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int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
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unsigned int idx, cpu;
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int *depth;
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unsigned long vaddr, flags;
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pte_t pte, *ptep;
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if (!in_interrupt())
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preempt_disable();
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cpu = smp_processor_id();
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depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
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idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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ptep = TOP_PTE(vaddr);
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pte = mk_pte(page, kmap_prot);
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if (!in_interrupt())
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preempt_disable();
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raw_local_irq_save(flags);
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(*depth)++;
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if (pte_val(*ptep) == pte_val(pte)) {
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@ -539,9 +539,13 @@ static int mmci_get_cd(struct mmc_host *mmc)
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if (host->gpio_cd == -ENOSYS)
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status = host->plat->status(mmc_dev(host->mmc));
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else
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status = gpio_get_value(host->gpio_cd);
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status = !gpio_get_value(host->gpio_cd);
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return !status;
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/*
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* Use positive logic throughout - status is zero for no card,
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* non-zero for card inserted.
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*/
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return status;
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}
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static const struct mmc_host_ops mmci_ops = {
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@ -388,6 +388,7 @@ cyber2000fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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pseudo_val |= convert_bitfield(red, &var->red);
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pseudo_val |= convert_bitfield(green, &var->green);
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pseudo_val |= convert_bitfield(blue, &var->blue);
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ret = 0;
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break;
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}
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@ -436,6 +437,8 @@ static void cyber2000fb_write_ramdac_ctrl(struct cfb_info *cfb)
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cyber2000fb_writeb(i | 4, 0x3cf, cfb);
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cyber2000fb_writeb(val, 0x3c6, cfb);
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cyber2000fb_writeb(i, 0x3cf, cfb);
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/* prevent card lock-up observed on x86 with CyberPro 2000 */
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cyber2000fb_readb(0x3cf, cfb);
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}
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static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw)
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