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clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clock

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This was broken before, because the AHB1 bus was enabled before the VPU
clock was ungated, while it must be done afterwards.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Paul Cercueil 2018-05-20 16:31:16 +00:00 committed by Stephen Boyd
parent 45ba63a29f
commit a6523b6fb8
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/ingenic/jz4770-cgu.c
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@ -154,7 +154,7 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = {
"h1clk", CGU_CLK_DIV | CGU_CLK_GATE,
.parents = { JZ4770_CLK_PLL0, },
.div = { CGU_REG_CPCCR, 24, 1, 4, 22, -1, -1 },
.gate = { CGU_REG_LCR, 30 },
.gate = { CGU_REG_CLKGR1, 7 },
},
[JZ4770_CLK_H2CLK] = {
"h2clk", CGU_CLK_DIV,
@ -362,7 +362,7 @@ static const struct ingenic_cgu_clk_info jz4770_cgu_clocks[] = {
[JZ4770_CLK_VPU] = {
"vpu", CGU_CLK_GATE,
.parents = { JZ4770_CLK_H1CLK, },
.gate = { CGU_REG_CLKGR1, 7 },
.gate = { CGU_REG_LCR, 30 },
},
[JZ4770_CLK_MMC0] = {
"mmc0", CGU_CLK_GATE,