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cxl: Mask slice error interrupts after first occurrence

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In some situations, a faulty AFU slice may create an interrupt storm of
slice errors, rendering the machine unusable. Since these interrupts are
informational only, present the interrupt once, then mask it off to
prevent it from being retriggered until the AFU is reset.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>
Reviewed-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
Alastair D'Silva
2017-05-01 10:53:31 +10:00
committed by Michael Ellerman
parent 4f58f0bf15
commit a715626a8e
2 changed files with 35 additions and 2 deletions
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18
drivers/misc/cxl/cxl.h
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@ -228,6 +228,24 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
#define CXL_PSL_SERR_An_llcmdto (1ull << (63-6))
#define CXL_PSL_SERR_An_afupar (1ull << (63-7))
#define CXL_PSL_SERR_An_afudup (1ull << (63-8))
#define CXL_PSL_SERR_An_IRQS ( \
CXL_PSL_SERR_An_afuto | CXL_PSL_SERR_An_afudis | CXL_PSL_SERR_An_afuov | \
CXL_PSL_SERR_An_badsrc | CXL_PSL_SERR_An_badctx | CXL_PSL_SERR_An_llcmdis | \
CXL_PSL_SERR_An_llcmdto | CXL_PSL_SERR_An_afupar | CXL_PSL_SERR_An_afudup)
#define CXL_PSL_SERR_An_afuto_mask (1ull << (63-32))
#define CXL_PSL_SERR_An_afudis_mask (1ull << (63-33))
#define CXL_PSL_SERR_An_afuov_mask (1ull << (63-34))
#define CXL_PSL_SERR_An_badsrc_mask (1ull << (63-35))
#define CXL_PSL_SERR_An_badctx_mask (1ull << (63-36))
#define CXL_PSL_SERR_An_llcmdis_mask (1ull << (63-37))
#define CXL_PSL_SERR_An_llcmdto_mask (1ull << (63-38))
#define CXL_PSL_SERR_An_afupar_mask (1ull << (63-39))
#define CXL_PSL_SERR_An_afudup_mask (1ull << (63-40))
#define CXL_PSL_SERR_An_IRQ_MASKS ( \
CXL_PSL_SERR_An_afuto_mask | CXL_PSL_SERR_An_afudis_mask | CXL_PSL_SERR_An_afuov_mask | \
CXL_PSL_SERR_An_badsrc_mask | CXL_PSL_SERR_An_badctx_mask | CXL_PSL_SERR_An_llcmdis_mask | \
CXL_PSL_SERR_An_llcmdto_mask | CXL_PSL_SERR_An_afupar_mask | CXL_PSL_SERR_An_afudup_mask)
#define CXL_PSL_SERR_An_AE (1ull << (63-30))
/****** CXL_PSL_SCNTL_An ****************************************************/