perf: Add system error and not in transaction branch types
This expands generic branch type classification by adding two more entries there in i.e system error and not in transaction. This also updates the x86 implementation to process X86_BR_NO_TX records as appropriate. This changes branch types reported to user space on x86 platform but it should not be a problem. The possible scenarios and impacts are enumerated here. -------------------------------------------------------------------------- | kernel | perf tool | Impact | -------------------------------------------------------------------------- | old | old | Works as before | -------------------------------------------------------------------------- | old | new | PERF_BR_UNKNOWN is processed | -------------------------------------------------------------------------- | new | old | PERF_BR_NO_TX is blocked via old PERF_BR_MAX | -------------------------------------------------------------------------- | new | new | PERF_BR_NO_TX is recognized | -------------------------------------------------------------------------- When PERF_BR_NO_TX is blocked via old PERF_BR_MAX (new kernel with old perf tool) the user space might throw up an warning complaining about an unrecognized branch types being reported, but it's expected. PERF_BR_SERROR & PERF_BR_NO_TX branch types will be used for BRBE implementation on arm64 platform. PERF_BR_NO_TX complements 'abort' and 'in_tx' elements in perf_branch_entry which represent other transaction states for a given branch record. Because this completes the transaction state classification. Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: James Clark <james.clark@arm.com> Link: https://lkml.kernel.org/r/20220824044822.70230-2-anshuman.khandual@arm.com
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@ -225,7 +225,7 @@ static int branch_map[X86_BR_TYPE_MAP_MAX] = {
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PERF_BR_IND_CALL, /* X86_BR_IND_CALL */
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PERF_BR_UNKNOWN, /* X86_BR_ABORT */
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PERF_BR_UNKNOWN, /* X86_BR_IN_TX */
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PERF_BR_UNKNOWN, /* X86_BR_NO_TX */
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PERF_BR_NO_TX, /* X86_BR_NO_TX */
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PERF_BR_CALL, /* X86_BR_ZERO_CALL */
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PERF_BR_UNKNOWN, /* X86_BR_CALL_STACK */
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PERF_BR_IND, /* X86_BR_IND_JMP */
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@ -253,6 +253,8 @@ enum {
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PERF_BR_COND_RET = 10, /* conditional function return */
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PERF_BR_ERET = 11, /* exception return */
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PERF_BR_IRQ = 12, /* irq */
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PERF_BR_SERROR = 13, /* system error */
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PERF_BR_NO_TX = 14, /* not in transaction */
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PERF_BR_MAX,
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};
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