IB/mlx5: Refactor UMR to have its own context struct
Instead of having the UMR context part of each memory region, allocate a struct on the stack. This allows queuing multiple UMRs that access the same memory region. Signed-off-by: Shachar Raindel <raindel@mellanox.com> Signed-off-by: Haggai Eran <haggaie@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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@ -264,8 +264,6 @@ struct mlx5_ib_mr {
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__be64 *pas;
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dma_addr_t dma;
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int npages;
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struct completion done;
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enum ib_wc_status status;
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struct mlx5_ib_dev *dev;
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struct mlx5_create_mkey_mbox_out out;
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struct mlx5_core_sig_ctx *sig;
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@ -277,6 +275,17 @@ struct mlx5_ib_fast_reg_page_list {
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dma_addr_t map;
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};
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struct mlx5_ib_umr_context {
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enum ib_wc_status status;
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struct completion done;
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};
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static inline void mlx5_ib_init_umr_context(struct mlx5_ib_umr_context *context)
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{
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context->status = -1;
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init_completion(&context->done);
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}
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struct umr_common {
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struct ib_pd *pd;
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struct ib_cq *cq;
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@ -708,7 +708,7 @@ static void prep_umr_unreg_wqe(struct mlx5_ib_dev *dev,
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void mlx5_umr_cq_handler(struct ib_cq *cq, void *cq_context)
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{
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struct mlx5_ib_mr *mr;
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struct mlx5_ib_umr_context *context;
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struct ib_wc wc;
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int err;
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@ -721,9 +721,9 @@ void mlx5_umr_cq_handler(struct ib_cq *cq, void *cq_context)
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if (err == 0)
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break;
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mr = (struct mlx5_ib_mr *)(unsigned long)wc.wr_id;
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mr->status = wc.status;
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complete(&mr->done);
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context = (struct mlx5_ib_umr_context *)wc.wr_id;
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context->status = wc.status;
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complete(&context->done);
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}
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ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
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}
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@ -735,6 +735,7 @@ static struct mlx5_ib_mr *reg_umr(struct ib_pd *pd, struct ib_umem *umem,
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struct mlx5_ib_dev *dev = to_mdev(pd->device);
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struct device *ddev = dev->ib_dev.dma_device;
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struct umr_common *umrc = &dev->umrc;
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struct mlx5_ib_umr_context umr_context;
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struct ib_send_wr wr, *bad;
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struct mlx5_ib_mr *mr;
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struct ib_sge sg;
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@ -774,24 +775,21 @@ static struct mlx5_ib_mr *reg_umr(struct ib_pd *pd, struct ib_umem *umem,
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}
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memset(&wr, 0, sizeof(wr));
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wr.wr_id = (u64)(unsigned long)mr;
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wr.wr_id = (u64)(unsigned long)&umr_context;
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prep_umr_reg_wqe(pd, &wr, &sg, mr->dma, npages, mr->mmr.key, page_shift, virt_addr, len, access_flags);
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/* We serialize polls so one process does not kidnap another's
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* completion. This is not a problem since wr is completed in
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* around 1 usec
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*/
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mlx5_ib_init_umr_context(&umr_context);
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down(&umrc->sem);
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init_completion(&mr->done);
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err = ib_post_send(umrc->qp, &wr, &bad);
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if (err) {
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mlx5_ib_warn(dev, "post send failed, err %d\n", err);
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goto unmap_dma;
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}
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wait_for_completion(&mr->done);
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if (mr->status != IB_WC_SUCCESS) {
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mlx5_ib_warn(dev, "reg umr failed\n");
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err = -EFAULT;
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} else {
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wait_for_completion(&umr_context.done);
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if (umr_context.status != IB_WC_SUCCESS) {
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mlx5_ib_warn(dev, "reg umr failed\n");
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err = -EFAULT;
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}
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}
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mr->mmr.iova = virt_addr;
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@ -940,24 +938,26 @@ error:
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static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
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{
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struct umr_common *umrc = &dev->umrc;
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struct mlx5_ib_umr_context umr_context;
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struct ib_send_wr wr, *bad;
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int err;
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memset(&wr, 0, sizeof(wr));
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wr.wr_id = (u64)(unsigned long)mr;
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wr.wr_id = (u64)(unsigned long)&umr_context;
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prep_umr_unreg_wqe(dev, &wr, mr->mmr.key);
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mlx5_ib_init_umr_context(&umr_context);
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down(&umrc->sem);
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init_completion(&mr->done);
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err = ib_post_send(umrc->qp, &wr, &bad);
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if (err) {
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up(&umrc->sem);
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mlx5_ib_dbg(dev, "err %d\n", err);
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goto error;
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} else {
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wait_for_completion(&umr_context.done);
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up(&umrc->sem);
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}
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wait_for_completion(&mr->done);
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up(&umrc->sem);
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if (mr->status != IB_WC_SUCCESS) {
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if (umr_context.status != IB_WC_SUCCESS) {
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mlx5_ib_warn(dev, "unreg umr failed\n");
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err = -EFAULT;
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goto error;
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