soc: qcom: Add LLCC support for multi channel DDR
Add LLCC support for multi channel DDR configuration based on a feature register. Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20230830105654.28057-5-quic_kbajaj@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -12,6 +12,7 @@
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/nvmem-consumer.h>
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/sizes.h>
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@ -995,6 +996,24 @@ static int qcom_llcc_cfg_program(struct platform_device *pdev,
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return ret;
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}
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static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config)
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{
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int ret;
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ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index);
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if (ret == -ENOENT || ret == -EOPNOTSUPP) {
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if (num_config > 1)
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return -EINVAL;
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*cfg_index = 0;
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return 0;
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}
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if (!ret && *cfg_index >= num_config)
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ret = -EINVAL;
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return ret;
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}
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static int qcom_llcc_remove(struct platform_device *pdev)
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{
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/* Set the global pointer to a error code to avoid referencing it */
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@ -1031,6 +1050,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
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const struct qcom_llcc_config *cfg;
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const struct llcc_slice_config *llcc_cfg;
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u32 sz;
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u8 cfg_index;
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u32 version;
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struct regmap *regmap;
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@ -1052,7 +1072,10 @@ static int qcom_llcc_probe(struct platform_device *pdev)
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ret = -EINVAL;
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goto err;
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}
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cfg = &cfgs->llcc_config[0];
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ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config);
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if (ret)
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goto err;
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cfg = &cfgs->llcc_config[cfg_index];
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ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks);
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if (ret)
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