drm/amd/powerplay: OD setting fix on Vega10
gfxclk for OD setting is limited to 1980M for non-acg ASICs of Vega10 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -32,6 +32,7 @@
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#include "vega10_pptable.h"
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#include "vega10_pptable.h"
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#define NUM_DSPCLK_LEVELS 8
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#define NUM_DSPCLK_LEVELS 8
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#define VEGA10_ENGINECLOCK_HARDMAX 198000
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static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
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static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
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enum phm_platform_caps cap)
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enum phm_platform_caps cap)
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@ -258,7 +259,26 @@ static int init_over_drive_limits(
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struct pp_hwmgr *hwmgr,
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struct pp_hwmgr *hwmgr,
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const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
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const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
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{
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{
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hwmgr->platform_descriptor.overdriveLimit.engineClock =
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const ATOM_Vega10_GFXCLK_Dependency_Table *gfxclk_dep_table =
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(const ATOM_Vega10_GFXCLK_Dependency_Table *)
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(((unsigned long) powerplay_table) +
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le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset));
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bool is_acg_enabled = false;
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ATOM_Vega10_GFXCLK_Dependency_Record_V2 *patom_record_v2;
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if (gfxclk_dep_table->ucRevId == 1) {
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patom_record_v2 =
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(ATOM_Vega10_GFXCLK_Dependency_Record_V2 *)gfxclk_dep_table->entries;
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is_acg_enabled =
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(bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable;
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}
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if (powerplay_table->ulMaxODEngineClock > VEGA10_ENGINECLOCK_HARDMAX &&
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!is_acg_enabled)
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hwmgr->platform_descriptor.overdriveLimit.engineClock =
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VEGA10_ENGINECLOCK_HARDMAX;
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else
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hwmgr->platform_descriptor.overdriveLimit.engineClock =
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le32_to_cpu(powerplay_table->ulMaxODEngineClock);
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le32_to_cpu(powerplay_table->ulMaxODEngineClock);
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hwmgr->platform_descriptor.overdriveLimit.memoryClock =
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hwmgr->platform_descriptor.overdriveLimit.memoryClock =
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le32_to_cpu(powerplay_table->ulMaxODMemoryClock);
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le32_to_cpu(powerplay_table->ulMaxODMemoryClock);
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