Merge tag 'omap-fixes-a2-for-3.4rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into fixes
From Paul Walmsley: OMAP clock, powerdomain, clockdomain, and hwmod fixes intended for the early v3.4-rc series. Also contains an HSMMC integration refinement of an earlier hardware bug workaround. * tag 'omap-fixes-a2-for-3.4rc' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending: ARM: OMAP2+: hwmod: Fix wrong SYSC_TYPE1_XXX_MASK bit definitions ARM: OMAP2+: hwmod: Make omap_hwmod_softreset wait for reset status ARM: OMAP2+: hwmod: Restore sysc after a reset ARM: OMAP2+: omap_hwmod: Allow io_ring wakeup configuration for all modules ARM: OMAP3: clock data: fill in some missing clockdomains ARM: OMAP4: clock data: Force a DPLL clkdm/pwrdm ON before a relock ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL ARM: OMAP2+: powerdomain: Wait for powerdomain transition in pwrdm_state_switch() ARM: OMAP AM3517/3505: clock data: change EMAC clocks aliases ARM: OMAP: clock: fix race in disable all clocks ARM: OMAP4: hwmod data: Add aliases for McBSP fclk clocks ARM: OMAP3xxx: clock data: fix DPLL4 CLKSEL masks ARM: OMAP3xxx: HSMMC: avoid erratum workaround when transceiver is attached ARM: OMAP44xx: clockdomain data: correct the emu_sys_clkdm CLKTRCTRL data
This commit is contained in:
@ -1479,6 +1479,11 @@ static int _reset(struct omap_hwmod *oh)
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ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
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if (oh->class->sysc) {
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_update_sysc_cache(oh);
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_enable_sysc(oh);
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}
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return ret;
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}
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@ -1788,20 +1793,9 @@ static int _setup(struct omap_hwmod *oh, void *data)
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return 0;
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}
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if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
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if (!(oh->flags & HWMOD_INIT_NO_RESET))
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_reset(oh);
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/*
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* OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
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* The _enable() function should be split to
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* avoid the rewrite of the OCP_SYSCONFIG register.
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*/
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if (oh->class->sysc) {
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_update_sysc_cache(oh);
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_enable_sysc(oh);
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}
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}
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postsetup_state = oh->_postsetup_state;
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if (postsetup_state == _HWMOD_STATE_UNKNOWN)
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postsetup_state = _HWMOD_STATE_ENABLED;
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@ -1909,20 +1903,10 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
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*/
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int omap_hwmod_softreset(struct omap_hwmod *oh)
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{
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u32 v;
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int ret;
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if (!oh || !(oh->_sysc_cache))
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if (!oh)
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return -EINVAL;
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v = oh->_sysc_cache;
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ret = _set_softreset(oh, &v);
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if (ret)
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goto error;
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_write_sysconfig(v, oh);
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error:
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return ret;
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return _ocp_softreset(oh);
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}
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/**
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@ -2465,26 +2449,28 @@ int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
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* @oh: struct omap_hwmod *
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*
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* Sets the module OCP socket ENAWAKEUP bit to allow the module to
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* send wakeups to the PRCM. Eventually this should sets PRCM wakeup
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* registers to cause the PRCM to receive wakeup events from the
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* module. Does not set any wakeup routing registers beyond this
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* point - if the module is to wake up any other module or subsystem,
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* that must be set separately. Called by omap_device code. Returns
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* -EINVAL on error or 0 upon success.
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* send wakeups to the PRCM, and enable I/O ring wakeup events for
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* this IP block if it has dynamic mux entries. Eventually this
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* should set PRCM wakeup registers to cause the PRCM to receive
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* wakeup events from the module. Does not set any wakeup routing
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* registers beyond this point - if the module is to wake up any other
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* module or subsystem, that must be set separately. Called by
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* omap_device code. Returns -EINVAL on error or 0 upon success.
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*/
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int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
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{
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unsigned long flags;
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u32 v;
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if (!oh->class->sysc ||
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!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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return -EINVAL;
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spin_lock_irqsave(&oh->_lock, flags);
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v = oh->_sysc_cache;
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_enable_wakeup(oh, &v);
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_write_sysconfig(v, oh);
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if (oh->class->sysc &&
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(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
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v = oh->_sysc_cache;
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_enable_wakeup(oh, &v);
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_write_sysconfig(v, oh);
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}
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_set_idle_ioring_wakeup(oh, true);
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spin_unlock_irqrestore(&oh->_lock, flags);
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@ -2496,26 +2482,28 @@ int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
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* @oh: struct omap_hwmod *
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*
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* Clears the module OCP socket ENAWAKEUP bit to prevent the module
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* from sending wakeups to the PRCM. Eventually this should clear
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* PRCM wakeup registers to cause the PRCM to ignore wakeup events
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* from the module. Does not set any wakeup routing registers beyond
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* this point - if the module is to wake up any other module or
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* subsystem, that must be set separately. Called by omap_device
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* code. Returns -EINVAL on error or 0 upon success.
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* from sending wakeups to the PRCM, and disable I/O ring wakeup
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* events for this IP block if it has dynamic mux entries. Eventually
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* this should clear PRCM wakeup registers to cause the PRCM to ignore
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* wakeup events from the module. Does not set any wakeup routing
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* registers beyond this point - if the module is to wake up any other
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* module or subsystem, that must be set separately. Called by
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* omap_device code. Returns -EINVAL on error or 0 upon success.
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*/
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int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
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{
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unsigned long flags;
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u32 v;
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if (!oh->class->sysc ||
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!(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
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return -EINVAL;
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spin_lock_irqsave(&oh->_lock, flags);
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v = oh->_sysc_cache;
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_disable_wakeup(oh, &v);
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_write_sysconfig(v, oh);
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if (oh->class->sysc &&
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(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
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v = oh->_sysc_cache;
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_disable_wakeup(oh, &v);
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_write_sysconfig(v, oh);
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}
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_set_idle_ioring_wakeup(oh, false);
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spin_unlock_irqrestore(&oh->_lock, flags);
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