interconnect: qcom: smd-rpm: Add rpmcc handling skeleton code
Introduce qcom_icc_rpm_set_bus_rate() in preparation for handling RPM clock resources within the interconnect framework. This lets us greatly simplify all of the code handling, as setting the rate comes down to: u32 rate_khz = max(clk.sleep_rate, clk.active_rate, clk_a.active_rate) write_to_rpm(clock.description, rate_khz); Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Link: https://lore.kernel.org/r/20230526-topic-smd_icc-v7-9-09c78c175546@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -25,6 +25,18 @@ enum qcom_icc_type {
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QCOM_ICC_QNOC,
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};
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/**
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* struct rpm_clk_resource - RPM bus clock resource
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* @resource_type: RPM resource type of the clock resource
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* @clock_id: index of the clock resource of a specific resource type
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* @branch: whether the resource represents a branch clock
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*/
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struct rpm_clk_resource {
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u32 resource_type;
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u32 clock_id;
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bool branch;
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};
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#define NUM_BUS_CLKS 2
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/**
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@ -50,6 +62,7 @@ struct qcom_icc_provider {
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unsigned int qos_offset;
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u64 bus_clk_rate[NUM_BUS_CLKS];
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struct clk_bulk_data bus_clks[NUM_BUS_CLKS];
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const struct rpm_clk_resource *bus_clk_desc;
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struct clk_bulk_data *intf_clks;
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bool keep_alive;
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bool is_on;
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@ -107,6 +120,7 @@ struct qcom_icc_desc {
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struct qcom_icc_node * const *nodes;
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size_t num_nodes;
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const char * const *bus_clocks;
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const struct rpm_clk_resource *bus_clk_desc;
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const char * const *intf_clocks;
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size_t num_intf_clocks;
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bool keep_alive;
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@ -128,5 +142,6 @@ int qnoc_remove(struct platform_device *pdev);
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bool qcom_icc_rpm_smd_available(void);
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int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val);
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int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate);
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#endif
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@ -16,6 +16,7 @@
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#include "icc-rpm.h"
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#define RPM_KEY_BW 0x00007762
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#define QCOM_RPM_SMD_KEY_RATE 0x007a484b
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static struct qcom_smd_rpm *icc_smd_rpm;
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@ -44,6 +45,26 @@ int qcom_icc_rpm_smd_send(int ctx, int rsc_type, int id, u32 val)
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}
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EXPORT_SYMBOL_GPL(qcom_icc_rpm_smd_send);
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int qcom_icc_rpm_set_bus_rate(const struct rpm_clk_resource *clk, int ctx, u32 rate)
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{
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struct clk_smd_rpm_req req = {
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.key = cpu_to_le32(QCOM_RPM_SMD_KEY_RATE),
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.nbytes = cpu_to_le32(sizeof(u32)),
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};
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/* Branch clocks are only on/off */
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if (clk->branch)
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rate = !!rate;
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req.value = cpu_to_le32(rate);
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return qcom_rpm_smd_write(icc_smd_rpm,
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ctx,
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clk->resource_type,
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clk->clock_id,
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&req, sizeof(req));
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}
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EXPORT_SYMBOL_GPL(qcom_icc_rpm_set_bus_rate);
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static int qcom_icc_rpm_smd_remove(struct platform_device *pdev)
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{
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icc_smd_rpm = NULL;
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