bnxt_en: Increase firmware message response DMA wait time

[ Upstream commit b891106da52b2c12dbaf73400f6d225b06a38d80 ]

When polling for the firmware message response, we first poll for the
response message header.  Once the valid length is detected in the
header, we poll for the valid bit at the end of the message which
signals DMA completion.  Normally, this poll time for DMA completion
is extremely short (0 to a few usec).  But on some devices under some
rare conditions, it can be up to about 20 msec.

Increase this delay to 50 msec and use udelay() for the first 10 usec
for the common case, and usleep_range() beyond that.

Also, change the error message to include the above delay time when
printing the timeout value.

Fixes: 3c8c20db769c ("bnxt_en: move HWRM API implementation into separate file")
Reviewed-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Michael Chan 2022-02-20 04:05:52 -05:00 committed by Greg Kroah-Hartman
parent 2744058955
commit a94879d419
2 changed files with 10 additions and 4 deletions

View File

@ -595,18 +595,24 @@ timeout_abort:
/* Last byte of resp contains valid bit */
valid = ((u8 *)ctx->resp) + len - 1;
for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; j++) {
for (j = 0; j < HWRM_VALID_BIT_DELAY_USEC; ) {
/* make sure we read from updated DMA memory */
dma_rmb();
if (*valid)
break;
usleep_range(1, 5);
if (j < 10) {
udelay(1);
j++;
} else {
usleep_range(20, 30);
j += 20;
}
}
if (j >= HWRM_VALID_BIT_DELAY_USEC) {
if (!(ctx->flags & BNXT_HWRM_CTX_SILENT))
netdev_err(bp->dev, "Error (timeout: %u) msg {0x%x 0x%x} len:%d v:%d\n",
hwrm_total_timeout(i),
hwrm_total_timeout(i) + j,
le16_to_cpu(ctx->req->req_type),
le16_to_cpu(ctx->req->seq_id), len,
*valid);

View File

@ -94,7 +94,7 @@ static inline unsigned int hwrm_total_timeout(unsigned int n)
}
#define HWRM_VALID_BIT_DELAY_USEC 150
#define HWRM_VALID_BIT_DELAY_USEC 50000
static inline bool bnxt_cfa_hwrm_message(u16 req_type)
{