spi: pxa2xx: Get rid of unused ->cs_control()
Since the last user of the custom ->cs_control() gone, we may get rid of this legacy API completely. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20211123192723.44537-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -102,7 +102,7 @@ device. All fields are optional.
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u8 dma_burst_size;
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u8 dma_burst_size;
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u32 timeout;
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u32 timeout;
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u8 enable_loopback;
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u8 enable_loopback;
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void (*cs_control)(u32 command);
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int gpio_cs;
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};
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};
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The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are
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The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are
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@ -133,11 +133,6 @@ into internal loopback mode. In this mode the SSP controller internally
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connects the SSPTX pin to the SSPRX pin. This is useful for initial setup
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connects the SSPTX pin to the SSPRX pin. This is useful for initial setup
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testing.
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testing.
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The "pxa2xx_spi_chip.cs_control" field is used to point to a board specific
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function for asserting/deasserting a slave device chip select. If the field is
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NULL, the pxa2xx_spi master controller driver assumes that the SSP port is
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configured to use GPIO or SSPFRM instead.
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NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
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NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the
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chipselect is dropped after each spi_transfer. Most devices need chip select
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chipselect is dropped after each spi_transfer. Most devices need chip select
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asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor)
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asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor)
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@ -152,30 +147,12 @@ field. Below is a sample configuration using the PXA255 NSSP.
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::
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::
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/* Chip Select control for the CS8415A SPI slave device */
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static void cs8415a_cs_control(u32 command)
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{
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if (command & PXA2XX_CS_ASSERT)
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GPCR(2) = GPIO_bit(2);
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else
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GPSR(2) = GPIO_bit(2);
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}
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/* Chip Select control for the CS8405A SPI slave device */
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static void cs8405a_cs_control(u32 command)
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{
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if (command & PXA2XX_CS_ASSERT)
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GPCR(3) = GPIO_bit(3);
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else
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GPSR(3) = GPIO_bit(3);
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}
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static struct pxa2xx_spi_chip cs8415a_chip_info = {
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static struct pxa2xx_spi_chip cs8415a_chip_info = {
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.tx_threshold = 8, /* SSP hardward FIFO threshold */
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.tx_threshold = 8, /* SSP hardward FIFO threshold */
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.rx_threshold = 8, /* SSP hardward FIFO threshold */
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.rx_threshold = 8, /* SSP hardward FIFO threshold */
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.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
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.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
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.timeout = 235, /* See Intel documentation */
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.timeout = 235, /* See Intel documentation */
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.cs_control = cs8415a_cs_control, /* Use external chip select */
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.gpio_cs = 2, /* Use external chip select */
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};
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};
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static struct pxa2xx_spi_chip cs8405a_chip_info = {
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static struct pxa2xx_spi_chip cs8405a_chip_info = {
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@ -183,7 +160,7 @@ field. Below is a sample configuration using the PXA255 NSSP.
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.rx_threshold = 8, /* SSP hardward FIFO threshold */
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.rx_threshold = 8, /* SSP hardward FIFO threshold */
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.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
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.dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */
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.timeout = 235, /* See Intel documentation */
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.timeout = 235, /* See Intel documentation */
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.cs_control = cs8405a_cs_control, /* Use external chip select */
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.gpio_cs = 3, /* Use external chip select */
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};
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};
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static struct spi_board_info streetracer_spi_board_info[] __initdata = {
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static struct spi_board_info streetracer_spi_board_info[] __initdata = {
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@ -347,7 +347,7 @@ static struct pxa2xx_spi_controller pxa_ssp_master_2_info = {
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};
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};
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/* An upcoming kernel change will scrap SFRM usage so these
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/* An upcoming kernel change will scrap SFRM usage so these
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* drivers have been moved to use gpio's via cs_control */
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* drivers have been moved to use GPIOs */
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static struct pxa2xx_spi_chip staccel_chip_info = {
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static struct pxa2xx_spi_chip staccel_chip_info = {
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.tx_threshold = 8,
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.tx_threshold = 8,
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.rx_threshold = 8,
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.rx_threshold = 8,
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@ -427,7 +427,6 @@ static void lpss_ssp_cs_control(struct spi_device *spi, bool enable)
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static void cs_assert(struct spi_device *spi)
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static void cs_assert(struct spi_device *spi)
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{
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{
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struct chip_data *chip = spi_get_ctldata(spi);
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struct driver_data *drv_data =
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struct driver_data *drv_data =
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spi_controller_get_devdata(spi->controller);
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spi_controller_get_devdata(spi->controller);
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@ -436,18 +435,12 @@ static void cs_assert(struct spi_device *spi)
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return;
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return;
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}
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}
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if (chip->cs_control) {
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chip->cs_control(PXA2XX_CS_ASSERT);
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return;
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}
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if (is_lpss_ssp(drv_data))
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if (is_lpss_ssp(drv_data))
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lpss_ssp_cs_control(spi, true);
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lpss_ssp_cs_control(spi, true);
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}
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}
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static void cs_deassert(struct spi_device *spi)
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static void cs_deassert(struct spi_device *spi)
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{
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{
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struct chip_data *chip = spi_get_ctldata(spi);
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struct driver_data *drv_data =
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struct driver_data *drv_data =
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spi_controller_get_devdata(spi->controller);
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spi_controller_get_devdata(spi->controller);
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unsigned long timeout;
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unsigned long timeout;
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@ -461,11 +454,6 @@ static void cs_deassert(struct spi_device *spi)
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!time_after(jiffies, timeout))
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!time_after(jiffies, timeout))
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cpu_relax();
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cpu_relax();
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if (chip->cs_control) {
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chip->cs_control(PXA2XX_CS_DEASSERT);
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return;
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}
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if (is_lpss_ssp(drv_data))
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if (is_lpss_ssp(drv_data))
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lpss_ssp_cs_control(spi, false);
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lpss_ssp_cs_control(spi, false);
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}
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}
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@ -1204,12 +1192,6 @@ static int setup_cs(struct spi_device *spi, struct chip_data *chip,
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*/
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*/
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cleanup_cs(spi);
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cleanup_cs(spi);
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/* If ->cs_control() is provided, ignore GPIO chip select */
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if (chip_info->cs_control) {
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chip->cs_control = chip_info->cs_control;
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return 0;
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}
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if (gpio_is_valid(chip_info->gpio_cs)) {
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if (gpio_is_valid(chip_info->gpio_cs)) {
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int gpio = chip_info->gpio_cs;
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int gpio = chip_info->gpio_cs;
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int err;
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int err;
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@ -49,7 +49,6 @@ struct driver_data {
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int (*write)(struct driver_data *drv_data);
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int (*write)(struct driver_data *drv_data);
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int (*read)(struct driver_data *drv_data);
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int (*read)(struct driver_data *drv_data);
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irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
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irqreturn_t (*transfer_handler)(struct driver_data *drv_data);
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void (*cs_control)(u32 command);
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void __iomem *lpss_base;
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void __iomem *lpss_base;
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@ -67,8 +66,6 @@ struct chip_data {
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u32 threshold;
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u32 threshold;
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u16 lpss_rx_threshold;
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u16 lpss_rx_threshold;
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u16 lpss_tx_threshold;
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u16 lpss_tx_threshold;
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void (*cs_control)(u32 command);
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};
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};
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static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
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static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
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@ -9,9 +9,6 @@
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#include <linux/pxa2xx_ssp.h>
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#include <linux/pxa2xx_ssp.h>
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#define PXA2XX_CS_ASSERT (0x01)
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#define PXA2XX_CS_DEASSERT (0x02)
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struct dma_chan;
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struct dma_chan;
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/*
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/*
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@ -47,7 +44,6 @@ struct pxa2xx_spi_chip {
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u32 timeout;
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u32 timeout;
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u8 enable_loopback;
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u8 enable_loopback;
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int gpio_cs;
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int gpio_cs;
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void (*cs_control)(u32 command);
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};
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};
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#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
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#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
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