staging: r8188eu: Remove some bit manipulation macros
This driver defines a set of macros that get or set a bitfield in the RX and TX descriptors. Most of these have been replaced by the appropriate use of the system macros BIT() or GENMASK(). While reworking these routines, I also fixed camel case variables and missing spaces. Some comments were also converted to the drivers/net/wireless preferred format. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Link: https://lore.kernel.org/r/20210803135223.12543-11-Larry.Finger@lwfinger.net Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -626,7 +626,7 @@ void ODM_RA_TxRPT2Handle_8188E(struct odm_dm_struct *dm_odm, u8 *TxRPT_Buf, u16
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if (valid) {
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pRAInfo->RTY[0] = (u16)GET_TX_REPORT_TYPE1_RERTY_0(pBuffer);
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pRAInfo->RTY[1] = (u16)GET_TX_REPORT_TYPE1_RERTY_1(pBuffer);
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pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2(pBuffer);
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pRAInfo->RTY[2] = (u16)GET_TX_REPORT_TYPE1_RERTY_2((u8 *)pBuffer);
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pRAInfo->RTY[3] = (u16)GET_TX_REPORT_TYPE1_RERTY_3(pBuffer);
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pRAInfo->RTY[4] = (u16)GET_TX_REPORT_TYPE1_RERTY_4(pBuffer);
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pRAInfo->DROP = (u16)GET_TX_REPORT_TYPE1_DROP_0(pBuffer);
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@ -3,19 +3,11 @@
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#ifndef __INC_RA_H
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#define __INC_RA_H
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/*++
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/* Module Name: RateAdaptive.h
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* Abstract: Prototype of RA and related data structure.
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*/
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Module Name:
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RateAdaptive.h
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Abstract:
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Prototype of RA and related data structure.
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Major Change History:
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When Who What
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---------- --------------- -------------------------------
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2011-08-12 Page Create.
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--*/
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#include <linux/bitfield.h>
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/* Rate adaptive define */
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#define PERENTRY 23
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@ -23,31 +15,26 @@ Major Change History:
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#define RATESIZE 28
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#define TX_RPT2_ITEM_SIZE 8
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/* */
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/* TX report 2 format in Rx desc */
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/* */
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#define GET_TX_RPT2_DESC_PKT_LEN_88E(__pRxStatusDesc) \
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LE_BITS_TO_4BYTE(__pRxStatusDesc, 0, 9)
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#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__pRxStatusDesc) \
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LE_BITS_TO_4BYTE(__pRxStatusDesc+16, 0, 32)
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#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__pRxStatusDesc) \
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LE_BITS_TO_4BYTE(__pRxStatusDesc+20, 0, 32)
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#define GET_TX_REPORT_TYPE1_RERTY_0(__pAddr) \
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LE_BITS_TO_4BYTE(__pAddr, 0, 16)
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#define GET_TX_REPORT_TYPE1_RERTY_1(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+2, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_2(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+3, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_3(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+4, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_4(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+4+1, 0, 8)
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#define GET_TX_REPORT_TYPE1_DROP_0(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+4+2, 0, 8)
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#define GET_TX_REPORT_TYPE1_DROP_1(__pAddr) \
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LE_BITS_TO_1BYTE(__pAddr+4+3, 0, 8)
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#define GET_TX_RPT2_DESC_PKT_LEN_88E(__rxstatusdesc) \
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le32_get_bits(*(__le32 *)__rxstatusdesc, GENMASK(8, 0))
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#define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__rxstatusdesc) \
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le32_to_cpu((*(__le32 *)(__rxstatusdesc + 16))
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#define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__rxstatusdesc) \
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le32_to_cpu((*(__le32 *)(__rxstatusdesc + 20))
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#define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) \
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le16_get_bits(*(__le16 *)__paddr, GENMASK(15, 0))
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#define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) \
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LE_BITS_TO_1BYTE(__paddr + 2, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) \
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LE_BITS_TO_1BYTE(__paddr + 3, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) \
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LE_BITS_TO_1BYTE(__paddr + 4, 0, 8)
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#define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) \
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LE_BITS_TO_1BYTE(__paddr + 5, 0, 8)
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#define GET_TX_REPORT_TYPE1_DROP_0(__paddr) \
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LE_BITS_TO_1BYTE(__paddr + 6, 0, 8)
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/* End rate adaptive define */
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void ODM_RASupport_Init(struct odm_dm_struct *dm_odm);
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@ -117,51 +117,6 @@ value to host byte ordering.*/
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BIT_LEN_MASK_8(__bitlen) \
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)
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/* Description:
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* Mask subfield (continuous bits in little-endian) of 4-byte value
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* and return the result in 4-byte value in host byte ordering.
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*/
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#define LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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LE_P4BYTE_TO_HOST_4BYTE(__pstart) & \
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(~BIT_OFFSET_LEN_MASK_32(__bitoffset, __bitlen)) \
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)
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#define LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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LE_P2BYTE_TO_HOST_2BYTE(__pstart) & \
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(~BIT_OFFSET_LEN_MASK_16(__bitoffset, __bitlen)) \
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)
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#define LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) \
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( \
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LE_P1BYTE_TO_HOST_1BYTE(__pstart) & \
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(~BIT_OFFSET_LEN_MASK_8(__bitoffset, __bitlen)) \
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)
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/* Description:
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* Set subfield of little-endian 4-byte value to specified value.
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*/
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#define SET_BITS_TO_LE_4BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u32 *)(__pstart)) = \
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( \
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LE_BITS_CLEARED_TO_4BYTE(__pstart, __bitoffset, __bitlen) | \
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((((u32)__val) & BIT_LEN_MASK_32(__bitlen)) << (__bitoffset)) \
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)
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#define SET_BITS_TO_LE_2BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u16 *)(__pstart)) = \
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( \
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LE_BITS_CLEARED_TO_2BYTE(__pstart, __bitoffset, __bitlen) | \
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((((u16)__val) & BIT_LEN_MASK_16(__bitlen)) << (__bitoffset)) \
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);
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#define SET_BITS_TO_LE_1BYTE(__pstart, __bitoffset, __bitlen, __val) \
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*((u8 *)(__pstart)) = EF1BYTE \
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( \
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LE_BITS_CLEARED_TO_1BYTE(__pstart, __bitoffset, __bitlen) | \
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((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
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)
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/* Get the N-bytes aligment offset from the current length */
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#define N_BYTE_ALIGMENT(__value, __aligment) ((__aligment == 1) ? \
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(__value) : (((__value + __aligment - 1) / __aligment) * __aligment))
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@ -29,12 +29,12 @@ enum RT_SPINLOCK_TYPE {
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#define DEV_BUS_TYPE RT_USB_INTERFACE
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#define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) \
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SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value)
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#define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) \
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SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value)
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#define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) \
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SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value)
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#define SET_TX_DESC_ANTSEL_A_88E(__ptxdesc, __value) \
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le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(24))
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#define SET_TX_DESC_ANTSEL_B_88E(__ptxdesc, __value) \
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le32p_replace_bits((__le32 *)(__ptxdesc + 8), __value, BIT(25))
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#define SET_TX_DESC_ANTSEL_C_88E(__ptxdesc, __value) \
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le32p_replace_bits((__le32 *)(__ptxdesc + 28), __value, BIT(29))
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/* define useless flag to avoid compile warning */
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#define USE_WORKITEM 0
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@ -18,24 +18,22 @@
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#define QSLT_CMD 0x13
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/* For 88e early mode */
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#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value)
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#define SET_EARLYMODE_PKTNUM(__paddr, __value) \
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le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(2, 0))
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#define SET_EARLYMODE_LEN0(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value)
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#define SET_EARLYMODE_LEN1(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value)
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#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value)
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#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value)
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le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(15, 4))
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#define SET_EARLYMODE_LEN1(__paddr, __value) \
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le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(27, 16))
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#define SET_EARLYMODE_LEN2_1(__pdr, __vValue) \
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le32p_replace_bits((__le32 *)__paddr, __value, GENMASK(31, 28))
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#define SET_EARLYMODE_LEN2_2(__paddr, __value) \
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le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(7, 0))
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#define SET_EARLYMODE_LEN3(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value)
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#define SET_EARLYMODE_LEN4(__pAddr, __Value) \
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SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value)
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le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(19, 8))
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#define SET_EARLYMODE_LEN4(__paAddr, __vValue) \
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le32p_replace_bits((__le32 *)(__paddr + 4), __value, GENMASK(31, 20))
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/* */
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/* defined for TX DESC Operation */
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/* */
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#define MAX_TID (15)
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