drm/scheduler: modify args of drm_sched_entity_init
replace run queue by a list of run queues and remove the sched arg as that is part of run queue itself Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Acked-by: Eric Anholt <eric@anholt.net> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -90,8 +90,8 @@ static int amdgpu_ctx_init(struct amdgpu_device *adev,
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if (ring == &adev->gfx.kiq.ring)
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continue;
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r = drm_sched_entity_init(&ring->sched, &ctx->rings[i].entity,
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rq, &ctx->guilty);
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r = drm_sched_entity_init(&ctx->rings[i].entity,
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&rq, 1, &ctx->guilty);
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if (r)
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goto failed;
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}
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@ -1918,8 +1918,7 @@ void amdgpu_ttm_set_buffer_funcs_status(struct amdgpu_device *adev, bool enable)
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ring = adev->mman.buffer_funcs_ring;
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_KERNEL];
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r = drm_sched_entity_init(&ring->sched, &adev->mman.entity,
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rq, NULL);
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r = drm_sched_entity_init(&adev->mman.entity, &rq, 1, NULL);
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if (r) {
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DRM_ERROR("Failed setting up TTM BO move entity (%d)\n",
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r);
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@ -266,8 +266,8 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev)
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ring = &adev->uvd.inst[j].ring;
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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r = drm_sched_entity_init(&ring->sched, &adev->uvd.inst[j].entity,
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rq, NULL);
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r = drm_sched_entity_init(&adev->uvd.inst[j].entity, &rq,
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1, NULL);
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if (r != 0) {
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DRM_ERROR("Failed setting up UVD(%d) run queue.\n", j);
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return r;
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@ -190,8 +190,7 @@ int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size)
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ring = &adev->vce.ring[0];
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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r = drm_sched_entity_init(&ring->sched, &adev->vce.entity,
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rq, NULL);
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r = drm_sched_entity_init(&adev->vce.entity, &rq, 1, NULL);
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if (r != 0) {
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DRM_ERROR("Failed setting up VCE run queue.\n");
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return r;
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@ -2564,8 +2564,7 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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ring_instance %= adev->vm_manager.vm_pte_num_rings;
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ring = adev->vm_manager.vm_pte_rings[ring_instance];
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_KERNEL];
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r = drm_sched_entity_init(&ring->sched, &vm->entity,
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rq, NULL);
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r = drm_sched_entity_init(&vm->entity, &rq, 1, NULL);
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if (r)
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return r;
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@ -430,8 +430,8 @@ static int uvd_v6_0_sw_init(void *handle)
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struct drm_sched_rq *rq;
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ring = &adev->uvd.inst->ring_enc[0];
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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r = drm_sched_entity_init(&ring->sched, &adev->uvd.inst->entity_enc,
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rq, NULL);
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r = drm_sched_entity_init(&adev->uvd.inst->entity_enc,
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&rq, 1, NULL);
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if (r) {
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DRM_ERROR("Failed setting up UVD ENC run queue.\n");
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return r;
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@ -432,8 +432,8 @@ static int uvd_v7_0_sw_init(void *handle)
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for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
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ring = &adev->uvd.inst[j].ring_enc[0];
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rq = &ring->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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r = drm_sched_entity_init(&ring->sched, &adev->uvd.inst[j].entity_enc,
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rq, NULL);
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r = drm_sched_entity_init(&adev->uvd.inst[j].entity_enc,
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&rq, 1, NULL);
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if (r) {
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DRM_ERROR("(%d)Failed setting up UVD ENC run queue.\n", j);
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return r;
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@ -49,12 +49,12 @@ static int etnaviv_open(struct drm_device *dev, struct drm_file *file)
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for (i = 0; i < ETNA_MAX_PIPES; i++) {
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struct etnaviv_gpu *gpu = priv->gpu[i];
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struct drm_sched_rq *rq;
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if (gpu) {
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drm_sched_entity_init(&gpu->sched,
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&ctx->sched_entity[i],
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&gpu->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL],
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NULL);
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rq = &gpu->sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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drm_sched_entity_init(&ctx->sched_entity[i],
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&rq, 1, NULL);
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}
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}
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@ -162,26 +162,30 @@ drm_sched_rq_select_entity(struct drm_sched_rq *rq)
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* drm_sched_entity_init - Init a context entity used by scheduler when
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* submit to HW ring.
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*
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* @sched: scheduler instance
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* @entity: scheduler entity to init
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* @rq: the run queue this entity belongs
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* @rq_list: the list of run queue on which jobs from this
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* entity can be submitted
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* @num_rq_list: number of run queue in rq_list
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* @guilty: atomic_t set to 1 when a job on this queue
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* is found to be guilty causing a timeout
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*
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* Note: the rq_list should have atleast one element to schedule
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* the entity
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*
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* Returns 0 on success or a negative error code on failure.
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*/
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int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity,
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struct drm_sched_rq *rq,
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int drm_sched_entity_init(struct drm_sched_entity *entity,
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struct drm_sched_rq **rq_list,
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unsigned int num_rq_list,
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atomic_t *guilty)
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{
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if (!(sched && entity && rq))
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if (!(entity && rq_list && num_rq_list > 0 && rq_list[0]))
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return -EINVAL;
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memset(entity, 0, sizeof(struct drm_sched_entity));
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INIT_LIST_HEAD(&entity->list);
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entity->rq = rq;
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entity->sched = sched;
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entity->rq = rq_list[0];
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entity->sched = rq_list[0]->sched;
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entity->guilty = guilty;
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entity->last_scheduled = NULL;
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@ -123,6 +123,7 @@ v3d_open(struct drm_device *dev, struct drm_file *file)
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{
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struct v3d_dev *v3d = to_v3d_dev(dev);
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struct v3d_file_priv *v3d_priv;
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struct drm_sched_rq *rq;
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int i;
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v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
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@ -132,10 +133,8 @@ v3d_open(struct drm_device *dev, struct drm_file *file)
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v3d_priv->v3d = v3d;
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for (i = 0; i < V3D_MAX_QUEUES; i++) {
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drm_sched_entity_init(&v3d->queue[i].sched,
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&v3d_priv->sched_entity[i],
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&v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL],
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NULL);
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rq = &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
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drm_sched_entity_init(&v3d_priv->sched_entity[i], &rq, 1, NULL);
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}
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file->driver_priv = v3d_priv;
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@ -282,9 +282,9 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
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const char *name);
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void drm_sched_fini(struct drm_gpu_scheduler *sched);
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int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity,
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struct drm_sched_rq *rq,
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int drm_sched_entity_init(struct drm_sched_entity *entity,
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struct drm_sched_rq **rq_list,
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unsigned int num_rq_list,
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atomic_t *guilty);
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long drm_sched_entity_flush(struct drm_gpu_scheduler *sched,
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struct drm_sched_entity *entity, long timeout);
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