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Devicetree fixes for 5.19, part 2:

Browse Source 
- More DT meta-schema check fixes from new bindings in merge window
 
 - Fix stale DT binding references from Mauro
 
 - Update various binding maintainers
 
 - Fix in arm,malidp properties to match reality
 
 - Add deprecated 'atheros' vendor prefix
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Merge tag 'devicetree-fixes-for-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull more devicetree fixes from Rob Herring:

 - More DT meta-schema check fixes from new bindings in merge window

 - Fix stale DT binding references from Mauro

 - Update various binding maintainers

 - Fix in arm,malidp properties to match reality

 - Add deprecated 'atheros' vendor prefix

* tag 'devicetree-fixes-for-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: display: arm,malidp: remove bogus RQOS property
  dt-bindings: pinctrl: ralink: Fix 'enum' lists with duplicate entries
  dt-bindings: Drop more redundant 'maxItems/minItems' in if/then schemas
  dt-bindings: nvme: apple,nvme-ans: Drop 'maxItems' from 'apple,sart'
  MAINTAINERS: rectify entries for ARM DRM DRIVERS after dt conversion
  MAINTAINERS: update snps,axs10x-reset.yaml reference
  MAINTAINERS: update dongwoon,dw9807-vcm.yaml reference
  MAINTAINERS: update cortina,gemini-ethernet.yaml reference
  dt-bindings: mfd: rk808: update rockchip,rk808.yaml reference
  dt-bindings: reset: update st,stih407-powerdown.yaml references
  dt-bindings: arm: update vexpress-config.yaml references
  dt-bindings: interrupt-controller: update brcm,l2-intc.yaml reference
  dt-bindings: mfd: bd9571mwv: update rohm,bd9571mwv.yaml reference
  dt-bindings: update Luca Ceresoli's e-mail address
  dt-bindings: msm: update maintainers list with proper id
  dt-bindings: vendor-prefixes: document deprecated Atheros
  dt-bindings: Update QCOM USB subsystem maintainer information
This commit is contained in:
Linus Torvalds 2022-06-10 11:57:36 -07:00
commit aa3398fb4b
35 changed files with 65 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/ABI/testing/sysfs-driver-bd9571mwv-regulator
View File

@ -26,6 +26,6 @@ Description: Read/write the current state of DDR Backup Mode, which controls
DDR Backup Mode must be explicitly enabled by the user,
to invoke step 1.
See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt.
See also Documentation/devicetree/bindings/mfd/rohm,bd9571mwv.yaml.
Users: User space applications for embedded boards equipped with a
BD9571MWV PMIC.

2
Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
View File

@ -45,7 +45,7 @@ description: |
The case where SH and SP are both 1 is likely not very interesting.
maintainers:
- Luca Ceresoli <luca@lucaceresoli.net>
- Luca Ceresoli <luca.ceresoli@bootlin.com>
properties:
compatible:

2
Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt
View File

@ -16,7 +16,7 @@ has been processed. See [2] for more information on the brcm,l2-intc node.
firmware. On some SoCs, this firmware supports DFS and DVFS in addition to
Adaptive Voltage Scaling.
[2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt
[2] Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml
Node brcm,avs-cpu-data-mem

7
Documentation/devicetree/bindings/display/arm,malidp.yaml
View File

@ -71,11 +71,6 @@ properties:
- description: number of output lines for the green channel (G)
- description: number of output lines for the blue channel (B)
arm,malidp-arqos-high-level:
$ref: /schemas/types.yaml#/definitions/uint32
description:
integer describing the ARQoS levels of DP500's QoS signaling
arm,malidp-arqos-value:
$ref: /schemas/types.yaml#/definitions/uint32
description:
@ -113,7 +108,7 @@ examples:
clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
clock-names = "pxlclk", "mclk", "aclk", "pclk";
arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
arm,malidp-arqos-high-level = <0xd000d000>;
arm,malidp-arqos-value = <0xd000d000>;
port {
dp0_output: endpoint {

2
Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DPU dt properties for SC7180 target
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates

2
Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DPU dt properties for SC7280
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates

2
Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DPU dt properties for SDM845 target
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates

2
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI controller
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: "../dsi-controller.yaml#"

2
Documentation/devicetree/bindings/display/msm/dsi-phy-10nm.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 10nm PHY
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#

2
Documentation/devicetree/bindings/display/msm/dsi-phy-14nm.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 14nm PHY
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#

2
Documentation/devicetree/bindings/display/msm/dsi-phy-20nm.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 20nm PHY
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#

2
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DSI 28nm PHY
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
allOf:
- $ref: dsi-phy-common.yaml#

2
Documentation/devicetree/bindings/display/msm/dsi-phy-common.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Description of Qualcomm Display DSI PHY common dt properties
maintainers:
- Krishna Manikandan <mkrishn@codeaurora.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
This defines the DSI PHY dt properties which are common for all

2
Documentation/devicetree/bindings/hwmon/vexpress.txt
View File

@ -9,7 +9,7 @@ Requires node properties:
"arm,vexpress-power"
"arm,vexpress-energy"
- "arm,vexpress-sysreg,func" when controlled via vexpress-sysreg
(see Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
(see Documentation/devicetree/bindings/arm/vexpress-config.yaml
for more details)
Optional node properties:

3
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml
View File

@ -150,7 +150,6 @@ allOf:
description: 5 memory controller channels and 1 for stream-id registers
reg-names:
maxItems: 6
items:
- const: sid
- const: broadcast
@ -170,7 +169,6 @@ allOf:
description: 17 memory controller channels and 1 for stream-id registers
reg-names:
minItems: 18
items:
- const: sid
- const: broadcast
@ -202,7 +200,6 @@ allOf:
description: 17 memory controller channels and 1 for stream-id registers
reg-names:
minItems: 18
items:
- const: sid
- const: broadcast

2
Documentation/devicetree/bindings/mfd/maxim,max77714.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: MAX77714 PMIC with GPIO, RTC and watchdog from Maxim Integrated.
maintainers:
- Luca Ceresoli <luca@lucaceresoli.net>
- Luca Ceresoli <luca.ceresoli@bootlin.com>
description: |
MAX77714 is a Power Management IC with 4 buck regulators, 9

1
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
View File

@ -148,7 +148,6 @@ allOf:
items:
- description: Xenon IP registers
- description: Armada 3700 SoC PHY PAD Voltage Control register
minItems: 2
marvell,pad-type:
$ref: /schemas/types.yaml#/definitions/string

1
Documentation/devicetree/bindings/nvme/apple,nvme-ans.yaml
View File

@ -55,7 +55,6 @@ properties:
maxItems: 1
apple,sart:
maxItems: 1
$ref: /schemas/types.yaml#/definitions/phandle
description: |
Reference to the SART address filter.

2
Documentation/devicetree/bindings/phy/phy-stih407-usb.txt
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@ -9,7 +9,7 @@ Required properties:
- resets : list of phandle and reset specifier pairs. There should be two entries, one
for the whole phy and one for the port
- reset-names : list of reset signal names. Should be "global" and "port"
See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
See: Documentation/devicetree/bindings/reset/reset.txt
Example:

2
Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml
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@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm QMP USB3 DP PHY controller
maintainers:
- Manu Gautam <mgautam@codeaurora.org>
- Wesley Cheng <quic_wcheng@quicinc.com>
properties:
compatible:

2
Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml
View File

@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm QUSB2 phy controller
maintainers:
- Manu Gautam <mgautam@codeaurora.org>
- Wesley Cheng <quic_wcheng@quicinc.com>
description:
QUSB2 controller supports LS/FS/HS usb connectivity on Qualcomm chipsets.

2
Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
View File

@ -7,7 +7,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm Synopsys Femto High-Speed USB PHY V2
maintainers:
- Wesley Cheng <wcheng@codeaurora.org>
- Wesley Cheng <quic_wcheng@quicinc.com>
description: |
Qualcomm High-Speed USB PHY

2
Documentation/devicetree/bindings/pinctrl/pinctrl-rk805.txt
View File

@ -27,7 +27,7 @@ Required properties:
- pins: List of pins. Valid values of pins properties are: gpio0, gpio1.
First 2 properties must be added in the RK805 PMIC node, documented in
Documentation/devicetree/bindings/mfd/rk808.txt
Documentation/devicetree/bindings/mfd/rockchip,rk808.yaml
Optional properties:
-------------------

26
Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml
View File

@ -32,31 +32,37 @@ patternProperties:
groups:
description: The pin group to select.
enum: [
# common
i2c, spi, wdt,
# For MT7620 SoC
ephy, i2c, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi, spi refclk,
uartf, uartlite, wdt, wled,
ephy, mdio, nd_sd, pa, pcie, rgmii1, rgmii2, spi refclk,
uartf, uartlite, wled,
# For MT7628 and MT7688 SoCs
gpio, i2c, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,
gpio, i2s, p0led_an, p0led_kn, p1led_an, p1led_kn, p2led_an,
p2led_kn, p3led_an, p3led_kn, p4led_an, p4led_kn, perst, pwm0,
pwm1, refclk, sdmode, spi, spi cs1, spis, uart0, uart1, uart2,
wdt, wled_an, wled_kn,
pwm1, refclk, sdmode, spi cs1, spis, uart0, uart1, uart2,
wled_an, wled_kn,
]
function:
description: The mux function to select.
enum: [
# common
gpio, i2c, refclk, spi,
# For MT7620 SoC
ephy, gpio, gpio i2s, gpio uartf, i2c, i2s uartf, mdio, nand, pa,
pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf, refclk,
rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite, wdt refclk,
ephy, gpio i2s, gpio uartf, i2s uartf, mdio, nand, pa,
pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,
rgmii1, rgmii2, sd, spi refclk, uartf, uartlite, wdt refclk,
wdt rst, wled,
# For MT7628 and MT7688 SoCs
antenna, debug, gpio, i2c, i2s, jtag, p0led_an, p0led_kn,
antenna, debug, i2s, jtag, p0led_an, p0led_kn,
p1led_an, p1led_kn, p2led_an, p2led_kn, p3led_an, p3led_kn,
p4led_an, p4led_kn, pcie, pcm, perst, pwm, pwm0, pwm1, pwm_uart2,
refclk, rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi, spi cs1,
rsvd, sdxc, sdxc d5 d4, sdxc d6, sdxc d7, spi cs1,
spis, sw_r, uart0, uart1, uart2, utif, wdt, wled_an, wled_kn, -,
]

29
Documentation/devicetree/bindings/pinctrl/ralink,rt305x-pinctrl.yaml
View File

@ -33,32 +33,29 @@ patternProperties:
groups:
description: The pin group to select.
enum: [
# common
i2c, jtag, led, mdio, rgmii, spi, spi_cs1, uartf, uartlite,
# For RT3050, RT3052 and RT3350 SoCs
i2c, jtag, mdio, rgmii, sdram, spi, uartf, uartlite,
sdram,
# For RT3352 SoC
i2c, jtag, led, lna, mdio, pa, rgmii, spi, spi_cs1, uartf,
uartlite,
# For RT5350 SoC
i2c, jtag, led, spi, spi_cs1, uartf, uartlite,
lna, pa
]
function:
description: The mux function to select.
enum: [
# For RT3050, RT3052 and RT3350 SoCs
gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, mdio, pcm gpio,
pcm i2s, pcm uartf, rgmii, sdram, spi, uartf, uartlite,
# For RT3352 SoC
gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, lna, mdio,
pa, pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi_cs1, uartf,
# common
gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, mdio,
pcm gpio, pcm i2s, pcm uartf, rgmii, spi, spi_cs1, uartf,
uartlite, wdg_cs1,
# For RT5350 SoC
gpio, gpio i2s, gpio uartf, i2c, i2s uartf, jtag, led, pcm gpio,
pcm i2s, pcm uartf, spi, spi_cs1, uartf, uartlite, wdg_cs1,
# For RT3050, RT3052 and RT3350 SoCs
sdram,
# For RT3352 SoC
lna, pa
]
required:

2
Documentation/devicetree/bindings/power/supply/maxim,max77976.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Maxim Integrated MAX77976 Battery charger
maintainers:
- Luca Ceresoli <luca@lucaceresoli.net>
- Luca Ceresoli <luca.ceresoli@bootlin.com>
description: |
The Maxim MAX77976 is a 19Vin / 5.5A, 1-Cell Li+ battery charger

2
Documentation/devicetree/bindings/regulator/qcom,usb-vbus-regulator.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: The Qualcomm PMIC VBUS output regulator driver
maintainers:
- Wesley Cheng <wcheng@codeaurora.org>
- Wesley Cheng <quic_wcheng@quicinc.com>
description: |
This regulator driver controls the VBUS output by the Qualcomm PMIC. This

2
Documentation/devicetree/bindings/regulator/vexpress.txt
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@ -4,7 +4,7 @@ Versatile Express voltage regulators
Requires node properties:
- "compatible" value: "arm,vexpress-volt"
- "arm,vexpress-sysreg,func" when controlled via vexpress-sysreg
(see Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
(see Documentation/devicetree/bindings/arm/vexpress-config.yaml
for more details)
Required regulator properties:

2
Documentation/devicetree/bindings/usb/dwc3-st.txt
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@ -13,7 +13,7 @@ Required properties:
- resets : list of phandle and reset specifier pairs. There should be two entries, one
for the powerdown and softreset lines of the usb3 IP
- reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
See: Documentation/devicetree/bindings/reset/reset.txt
- #address-cells, #size-cells : should be '1' if the device has sub-nodes

2
Documentation/devicetree/bindings/usb/ehci-st.txt
View File

@ -17,7 +17,7 @@ See: Documentation/devicetree/bindings/clock/clock-bindings.txt
- resets : phandle + reset specifier pairs to the powerdown and softreset lines
of the USB IP
- reset-names : should be "power" and "softreset"
See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
See: Documentation/devicetree/bindings/reset/reset.txt
Example:

2
Documentation/devicetree/bindings/usb/ohci-st.txt
View File

@ -15,7 +15,7 @@ See: Documentation/devicetree/bindings/clock/clock-bindings.txt
- resets : phandle to the powerdown and reset controller for the USB IP
- reset-names : should be "power" and "softreset".
See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
See: Documentation/devicetree/bindings/reset/reset.txt
Example:

2
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SuperSpeed DWC3 USB SoC controller
maintainers:
- Manu Gautam <mgautam@codeaurora.org>
- Wesley Cheng <quic_wcheng@quicinc.com>
properties:
compatible:

3
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -143,6 +143,9 @@ patternProperties:
description: ASPEED Technology Inc.
"^asus,.*":
description: AsusTek Computer Inc.
"^atheros,.*":
description: Qualcomm Atheros, Inc. (deprecated, use qca)
deprecated: true
"^atlas,.*":
description: Atlas Scientific LLC
"^atmel,.*":

1
Documentation/devicetree/bindings/watchdog/allwinner,sun4i-a10-wdt.yaml
View File

@ -64,7 +64,6 @@ if:
then:
properties:
clocks:
minItems: 2
items:
- description: High-frequency oscillator input, divided internally
- description: Low-frequency oscillator input

12
MAINTAINERS
View File

@ -1507,7 +1507,7 @@ F: drivers/clocksource/arm_arch_timer.c
ARM HDLCD DRM DRIVER
M: Liviu Dudau <liviu.dudau@arm.com>
S: Supported
F: Documentation/devicetree/bindings/display/arm,hdlcd.txt
F: Documentation/devicetree/bindings/display/arm,hdlcd.yaml
F: drivers/gpu/drm/arm/hdlcd_*
ARM INTEGRATOR, VERSATILE AND REALVIEW SUPPORT
@ -1542,7 +1542,7 @@ M: Mihail Atanassov <mihail.atanassov@arm.com>
L: Mali DP Maintainers <malidp@foss.arm.com>
S: Supported
T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/arm,komeda.txt
F: Documentation/devicetree/bindings/display/arm,komeda.yaml
F: Documentation/gpu/komeda-kms.rst
F: drivers/gpu/drm/arm/display/include/
F: drivers/gpu/drm/arm/display/komeda/
@ -1564,7 +1564,7 @@ M: Brian Starkey <brian.starkey@arm.com>
L: Mali DP Maintainers <malidp@foss.arm.com>
S: Supported
T: git git://anongit.freedesktop.org/drm/drm-misc
F: Documentation/devicetree/bindings/display/arm,malidp.txt
F: Documentation/devicetree/bindings/display/arm,malidp.yaml
F: Documentation/gpu/afbc.rst
F: drivers/gpu/drm/arm/
@ -2009,7 +2009,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://github.com/ulli-kroll/linux.git
F: Documentation/devicetree/bindings/arm/gemini.yaml
F: Documentation/devicetree/bindings/net/cortina,gemini-ethernet.txt
F: Documentation/devicetree/bindings/net/cortina,gemini-ethernet.yaml
F: Documentation/devicetree/bindings/pinctrl/cortina,gemini-pinctrl.txt
F: Documentation/devicetree/bindings/rtc/faraday,ftrtc010.yaml
F: arch/arm/boot/dts/gemini*
@ -6085,7 +6085,7 @@ M: Sakari Ailus <sakari.ailus@linux.intel.com>
L: linux-media@vger.kernel.org
S: Maintained
T: git git://linuxtv.org/media_tree.git
F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.txt
F: Documentation/devicetree/bindings/media/i2c/dongwoon,dw9807-vcm.yaml
F: drivers/media/i2c/dw9807-vcm.c
DOUBLETALK DRIVER
@ -19235,7 +19235,7 @@ F: arch/arc/plat-axs10x
SYNOPSYS AXS10x RESET CONTROLLER DRIVER
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Supported
F: Documentation/devicetree/bindings/reset/snps,axs10x-reset.txt
F: Documentation/devicetree/bindings/reset/snps,axs10x-reset.yaml
F: drivers/reset/reset-axs10x.c
SYNOPSYS CREG GPIO DRIVER