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arm64: dts: allwinner: h6: Add RSB controller node

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The H6 SoC contains an undocumented but fully functional RSB controller.
Add support for it. The MMIO register address matches other SoCs of the
same generation, and the IRQ matches a hole in the documented IRQ list.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
[wens@csie.org: Use raw numbers instead of macros for clock/reset index]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Samuel Holland 2021-01-03 04:00:06 -06:00 committed by Chen-Yu Tsai
parent 8837e845a2
commit aaad900757
1 changed files with 19 additions and 0 deletions
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19
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
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@ -956,6 +956,11 @@
pins = "PL9";
function = "s_cir_rx";
};
r_rsb_pins: r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";
};
};
r_ir: ir@7040000 {
@ -986,6 +991,20 @@
#size-cells = <0>;
};
r_rsb: rsb@7083000 {
compatible = "allwinner,sun8i-a23-rsb";
reg = <0x07083000 0x400>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu 13>;
clock-frequency = <3000000>;
resets = <&r_ccu 7>;
pinctrl-names = "default";
pinctrl-0 = <&r_rsb_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ths: thermal-sensor@5070400 {
compatible = "allwinner,sun50i-h6-ths";
reg = <0x05070400 0x100>;