can: tcan4x5x: tcan4x5x_regmap: set reg_stride to 4
This patch sets the regmap stide to 4, as the chip only supports access on 32 bit alligned access. Reviewed-by: Dan Murphy <dmurphy@ti.com> Tested-by: Sean Nyekjaer <sean@geanix.com> Link: https://lore.kernel.org/r/20201215231746.1132907-13-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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@ -55,6 +55,7 @@ static int tcan4x5x_regmap_read(void *context,
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static const struct regmap_config tcan4x5x_regmap = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.cache_type = REGCACHE_NONE,
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.max_register = TCAN4X5X_MAX_REGISTER,
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