arm64: dts: qcom: sdm660: Add required nodes for DSI1
Configure the second DSI host/phy and account for them in the mmcc node. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210728222542.54269-29-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -141,12 +141,105 @@
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compatible = "qcom,gpucc-sdm660";
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};
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&mdp {
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ports {
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port@1 {
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reg = <1>;
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mdp5_intf2_out: endpoint {
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remote-endpoint = <&dsi1_in>;
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};
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};
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};
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};
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&mdss {
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dsi1: dsi@c996000 {
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compatible = "qcom,mdss-dsi-ctrl";
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reg = <0x0c996000 0x400>;
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reg-names = "dsi_ctrl";
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/* DSI1 shares the OPP table with DSI0 */
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operating-points-v2 = <&dsi_opp_table>;
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power-domains = <&rpmpd SDM660_VDDCX>;
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interrupt-parent = <&mdss>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
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assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
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<&mmcc PCLK1_CLK_SRC>;
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assigned-clock-parents = <&dsi1_phy 0>,
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<&dsi1_phy 1>;
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clocks = <&mmcc MDSS_MDP_CLK>,
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<&mmcc MDSS_BYTE1_CLK>,
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<&mmcc MDSS_BYTE1_INTF_CLK>,
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<&mmcc MNOC_AHB_CLK>,
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<&mmcc MDSS_AHB_CLK>,
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<&mmcc MDSS_AXI_CLK>,
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<&mmcc MISC_AHB_CLK>,
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<&mmcc MDSS_PCLK1_CLK>,
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<&mmcc MDSS_ESC1_CLK>;
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clock-names = "mdp_core",
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"byte",
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"byte_intf",
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"mnoc",
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"iface",
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"bus",
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"core_mmss",
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"pixel",
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"core";
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phys = <&dsi1_phy>;
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phy-names = "dsi";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dsi1_in: endpoint {
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remote-endpoint = <&mdp5_intf2_out>;
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};
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};
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port@1 {
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reg = <1>;
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dsi1_out: endpoint {
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};
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};
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};
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};
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dsi1_phy: dsi-phy@c996400 {
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compatible = "qcom,dsi-phy-14nm-660";
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reg = <0x0c996400 0x100>,
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<0x0c996500 0x300>,
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<0x0c996800 0x188>;
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reg-names = "dsi_phy",
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"dsi_phy_lane",
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"dsi_pll";
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#clock-cells = <1>;
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#phy-cells = <0>;
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clocks = <&mmcc MDSS_AHB_CLK>, <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "iface", "ref";
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};
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};
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&mmcc {
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compatible = "qcom,mmcc-sdm660";
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/*
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* 660 has one more dsi host/phy, which - when implemented
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* and tested - should be added to the clocks property.
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*/
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
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<&sleep_clk>,
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<&gcc GCC_MMSS_GPLL0_CLK>,
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<&gcc GCC_MMSS_GPLL0_DIV_CLK>,
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<&dsi0_phy 1>,
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<&dsi0_phy 0>,
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<&dsi1_phy 1>,
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<&dsi1_phy 0>,
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<0>,
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<0>;
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};
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&tlmm {
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