arm/arm64: KVM: Enforce Break-Before-Make on Stage-2 page tables
commit d4b9e0790aa764c0b01e18d4e8d33e93ba36d51f upstream. The ARM architecture mandates that when changing a page table entry from a valid entry to another valid entry, an invalid entry is first written, TLB invalidated, and only then the new entry being written. The current code doesn't respect this, directly writing the new entry and only then invalidating TLBs. Let's fix it up. Reported-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -886,11 +886,14 @@ static int stage2_set_pmd_huge(struct kvm *kvm, struct kvm_mmu_memory_cache
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VM_BUG_ON(pmd_present(*pmd) && pmd_pfn(*pmd) != pmd_pfn(*new_pmd));
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old_pmd = *pmd;
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kvm_set_pmd(pmd, *new_pmd);
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if (pmd_present(old_pmd))
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if (pmd_present(old_pmd)) {
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pmd_clear(pmd);
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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else
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} else {
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get_page(virt_to_page(pmd));
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}
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kvm_set_pmd(pmd, *new_pmd);
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return 0;
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}
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@ -939,12 +942,14 @@ static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
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/* Create 2nd stage page table mapping - Level 3 */
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old_pte = *pte;
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kvm_set_pte(pte, *new_pte);
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if (pte_present(old_pte))
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if (pte_present(old_pte)) {
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kvm_set_pte(pte, __pte(0));
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kvm_tlb_flush_vmid_ipa(kvm, addr);
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else
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} else {
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get_page(virt_to_page(pte));
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}
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kvm_set_pte(pte, *new_pte);
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return 0;
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}
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