iv/linux
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

irqchip/sifive-plic: Improve locking safety by using irqsave/irqrestore

Browse Source 
Now that PLIC driver is probed as a regular platform driver, the lock
dependency validator complains about the safety of handler->enable_lock
usage:

[    0.956775]  Possible interrupt unsafe locking scenario:

[    0.956998]        CPU0                    CPU1
[    0.957247]        ----                    ----
[    0.957439]   lock(&handler->enable_lock);
[    0.957607]                                local_irq_disable();
[    0.957793]                                lock(&irq_desc_lock_class);
[    0.958021]                                lock(&handler->enable_lock);
[    0.958246]   <Interrupt>
[    0.958342]     lock(&irq_desc_lock_class);
[    0.958501]
                *** DEADLOCK ***

To address above, use raw_spin_lock_irqsave/unlock_irqrestore() instead
of raw_spin_lock/unlock().

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240222094006.1030709-8-apatel@ventanamicro.com
This commit is contained in:
Anup Patel 2024-02-22 15:09:55 +05:30 committed by Thomas Gleixner
parent 9565210647
commit abb7205794
1 changed files with 10 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/irqchip/irq-sifive-plic.c
View File

@ -103,9 +103,11 @@ static void __plic_toggle(void __iomem *enable_base, int hwirq, int enable)
static void plic_toggle(struct plic_handler *handler, int hwirq, int enable) static void plic_toggle(struct plic_handler *handler, int hwirq, int enable)
{ {
raw_spin_lock(&handler->enable_lock); unsigned long flags;
raw_spin_lock_irqsave(&handler->enable_lock, flags);
__plic_toggle(handler->enable_base, hwirq, enable); __plic_toggle(handler->enable_base, hwirq, enable);
raw_spin_unlock(&handler->enable_lock); raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
} }
static inline void plic_irq_toggle(const struct cpumask *mask, static inline void plic_irq_toggle(const struct cpumask *mask,
@ -236,6 +238,7 @@ static int plic_irq_set_type(struct irq_data *d, unsigned int type)
static int plic_irq_suspend(void) static int plic_irq_suspend(void)
{ {
unsigned int i, cpu; unsigned int i, cpu;
unsigned long flags;
u32 __iomem *reg; u32 __iomem *reg;
struct plic_priv *priv; struct plic_priv *priv;
@ -253,12 +256,12 @@ static int plic_irq_suspend(void)
if (!handler->present) if (!handler->present)
continue; continue;
raw_spin_lock(&handler->enable_lock); raw_spin_lock_irqsave(&handler->enable_lock, flags);
for (i = 0; i < DIV_ROUND_UP(priv->nr_irqs, 32); i++) { for (i = 0; i < DIV_ROUND_UP(priv->nr_irqs, 32); i++) {
reg = handler->enable_base + i * sizeof(u32); reg = handler->enable_base + i * sizeof(u32);
handler->enable_save[i] = readl(reg); handler->enable_save[i] = readl(reg);
} }
raw_spin_unlock(&handler->enable_lock); raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
} }
return 0; return 0;
@ -267,6 +270,7 @@ static int plic_irq_suspend(void)
static void plic_irq_resume(void) static void plic_irq_resume(void)
{ {
unsigned int i, index, cpu; unsigned int i, index, cpu;
unsigned long flags;
u32 __iomem *reg; u32 __iomem *reg;
struct plic_priv *priv; struct plic_priv *priv;
@ -284,12 +288,12 @@ static void plic_irq_resume(void)
if (!handler->present) if (!handler->present)
continue; continue;
raw_spin_lock(&handler->enable_lock); raw_spin_lock_irqsave(&handler->enable_lock, flags);
for (i = 0; i < DIV_ROUND_UP(priv->nr_irqs, 32); i++) { for (i = 0; i < DIV_ROUND_UP(priv->nr_irqs, 32); i++) {
reg = handler->enable_base + i * sizeof(u32); reg = handler->enable_base + i * sizeof(u32);
writel(handler->enable_save[i], reg); writel(handler->enable_save[i], reg);
} }
raw_spin_unlock(&handler->enable_lock); raw_spin_unlock_irqrestore(&handler->enable_lock, flags);
} }
} }