drm/gma500: Give MMU code it's own header file
Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@gmail.com>
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Patrik Jakobsson
parent
64a4aff283
commit
ac1b01b0ba
@ -18,6 +18,7 @@
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#include <drm/drmP.h>
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#include "psb_drv.h"
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#include "psb_reg.h"
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#include "mmu.h"
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/*
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* Code for the SGX MMU:
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@ -47,50 +48,6 @@
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* but on average it should be fast.
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*/
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struct psb_mmu_driver {
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/* protects driver- and pd structures. Always take in read mode
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* before taking the page table spinlock.
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*/
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struct rw_semaphore sem;
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/* protects page tables, directory tables and pt tables.
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* and pt structures.
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*/
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spinlock_t lock;
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atomic_t needs_tlbflush;
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atomic_t *msvdx_mmu_invaldc;
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struct psb_mmu_pd *default_pd;
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uint32_t bif_ctrl;
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int has_clflush;
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int clflush_add;
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unsigned long clflush_mask;
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struct drm_device *dev;
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};
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struct psb_mmu_pd;
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struct psb_mmu_pt {
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struct psb_mmu_pd *pd;
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uint32_t index;
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uint32_t count;
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struct page *p;
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uint32_t *v;
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};
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struct psb_mmu_pd {
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struct psb_mmu_driver *driver;
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int hw_context;
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struct psb_mmu_pt **tables;
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struct page *p;
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struct page *dummy_pt;
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struct page *dummy_page;
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uint32_t pd_mask;
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uint32_t invalid_pde;
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uint32_t invalid_pte;
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};
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static inline uint32_t psb_mmu_pt_index(uint32_t offset)
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{
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return (offset >> PSB_PTE_SHIFT) & 0x3FF;
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93
drivers/gpu/drm/gma500/mmu.h
Normal file
93
drivers/gpu/drm/gma500/mmu.h
Normal file
@ -0,0 +1,93 @@
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/**************************************************************************
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* Copyright (c) 2007-2011, Intel Corporation.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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**************************************************************************/
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#ifndef __MMU_H
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#define __MMU_H
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struct psb_mmu_driver {
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/* protects driver- and pd structures. Always take in read mode
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* before taking the page table spinlock.
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*/
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struct rw_semaphore sem;
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/* protects page tables, directory tables and pt tables.
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* and pt structures.
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*/
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spinlock_t lock;
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atomic_t needs_tlbflush;
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atomic_t *msvdx_mmu_invaldc;
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struct psb_mmu_pd *default_pd;
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uint32_t bif_ctrl;
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int has_clflush;
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int clflush_add;
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unsigned long clflush_mask;
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struct drm_device *dev;
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};
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struct psb_mmu_pd;
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struct psb_mmu_pt {
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struct psb_mmu_pd *pd;
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uint32_t index;
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uint32_t count;
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struct page *p;
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uint32_t *v;
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};
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struct psb_mmu_pd {
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struct psb_mmu_driver *driver;
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int hw_context;
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struct psb_mmu_pt **tables;
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struct page *p;
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struct page *dummy_pt;
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struct page *dummy_page;
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uint32_t pd_mask;
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uint32_t invalid_pde;
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uint32_t invalid_pte;
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};
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extern struct psb_mmu_driver *psb_mmu_driver_init(struct drm_device *dev,
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int trap_pagefaults,
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int invalid_type,
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atomic_t *msvdx_mmu_invaldc);
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extern void psb_mmu_driver_takedown(struct psb_mmu_driver *driver);
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extern struct psb_mmu_pd *psb_mmu_get_default_pd(struct psb_mmu_driver
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*driver);
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extern struct psb_mmu_pd *psb_mmu_alloc_pd(struct psb_mmu_driver *driver,
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int trap_pagefaults,
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int invalid_type);
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extern void psb_mmu_free_pagedir(struct psb_mmu_pd *pd);
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extern void psb_mmu_flush(struct psb_mmu_driver *driver);
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extern void psb_mmu_remove_pfn_sequence(struct psb_mmu_pd *pd,
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unsigned long address,
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uint32_t num_pages);
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extern int psb_mmu_insert_pfn_sequence(struct psb_mmu_pd *pd,
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uint32_t start_pfn,
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unsigned long address,
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uint32_t num_pages, int type);
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extern int psb_mmu_virtual_to_pfn(struct psb_mmu_pd *pd, uint32_t virtual,
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unsigned long *pfn);
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extern void psb_mmu_set_pd_context(struct psb_mmu_pd *pd, int hw_context);
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extern int psb_mmu_insert_pages(struct psb_mmu_pd *pd, struct page **pages,
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unsigned long address, uint32_t num_pages,
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uint32_t desired_tile_stride,
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uint32_t hw_tile_stride, int type);
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extern void psb_mmu_remove_pages(struct psb_mmu_pd *pd,
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unsigned long address, uint32_t num_pages,
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uint32_t desired_tile_stride,
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uint32_t hw_tile_stride);
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#endif
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@ -33,6 +33,7 @@
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#include "power.h"
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#include "opregion.h"
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#include "oaktrail.h"
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#include "mmu.h"
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/* Append new drm mode definition here, align with libdrm definition */
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#define DRM_MODE_SCALE_NO_SCALE 2
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@ -713,8 +714,6 @@ struct psb_ops {
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struct psb_mmu_driver;
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extern int drm_crtc_probe_output_modes(struct drm_device *dev, int, int);
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extern int drm_pick_crtcs(struct drm_device *dev);
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@ -723,48 +722,6 @@ static inline struct drm_psb_private *psb_priv(struct drm_device *dev)
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return (struct drm_psb_private *) dev->dev_private;
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}
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/*
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* MMU stuff.
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*/
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extern struct psb_mmu_driver *psb_mmu_driver_init(struct drm_device *dev,
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int trap_pagefaults,
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int invalid_type,
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atomic_t *msvdx_mmu_invaldc);
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extern void psb_mmu_driver_takedown(struct psb_mmu_driver *driver);
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extern struct psb_mmu_pd *psb_mmu_get_default_pd(struct psb_mmu_driver
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*driver);
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extern void psb_mmu_mirror_gtt(struct psb_mmu_pd *pd, uint32_t mmu_offset,
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uint32_t gtt_start, uint32_t gtt_pages);
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extern struct psb_mmu_pd *psb_mmu_alloc_pd(struct psb_mmu_driver *driver,
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int trap_pagefaults,
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int invalid_type);
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extern void psb_mmu_free_pagedir(struct psb_mmu_pd *pd);
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extern void psb_mmu_flush(struct psb_mmu_driver *driver);
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extern void psb_mmu_remove_pfn_sequence(struct psb_mmu_pd *pd,
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unsigned long address,
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uint32_t num_pages);
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extern int psb_mmu_insert_pfn_sequence(struct psb_mmu_pd *pd,
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uint32_t start_pfn,
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unsigned long address,
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uint32_t num_pages, int type);
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extern int psb_mmu_virtual_to_pfn(struct psb_mmu_pd *pd, uint32_t virtual,
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unsigned long *pfn);
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/*
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* Enable / disable MMU for different requestors.
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*/
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extern void psb_mmu_set_pd_context(struct psb_mmu_pd *pd, int hw_context);
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extern int psb_mmu_insert_pages(struct psb_mmu_pd *pd, struct page **pages,
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unsigned long address, uint32_t num_pages,
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uint32_t desired_tile_stride,
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uint32_t hw_tile_stride, int type);
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extern void psb_mmu_remove_pages(struct psb_mmu_pd *pd,
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unsigned long address, uint32_t num_pages,
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uint32_t desired_tile_stride,
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uint32_t hw_tile_stride);
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/*
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*psb_irq.c
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*/
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