drm/amd/display: Correct MPC split policy for DCN301
[Why] DCN301 has seamless boot enabled. With MPC split enabled at the same time, system will hang. [How] Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine enabled on DCN301, pipe split is not necessary here. Signed-off-by: Zhan Liu <zhan.liu@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = {
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.disable_clock_gate = true,
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.disable_pplib_clock_request = true,
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.disable_pplib_wm_range = true,
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.pipe_split_policy = MPC_SPLIT_DYNAMIC,
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.pipe_split_policy = MPC_SPLIT_AVOID,
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.force_single_disp_pipe_split = false,
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.disable_dcc = DCC_ENABLE,
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.vsr_support = true,
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