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staging: winbond: remove driver

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The driver hasn't been cleaned up and nobody is working to do so, so
remove it.

Signed-off-by: Kristina Martšenko <kristina.martsenko@gmail.com>
Cc: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Kristina Martšenko 2014-06-29 00:26:50 +03:00 committed by Greg Kroah-Hartman
parent c0cd6e5b1f
commit ac4ddad67a
29 changed files with 0 additions and 8758 deletions
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5
MAINTAINERS
View File

@ -8631,11 +8631,6 @@ M: Forest Bond <forest@alittletooquiet.net>
S: Odd Fixes
F: drivers/staging/vt665?/
STAGING - WINBOND IS89C35 WLAN USB DRIVER
M: Pavel Machek <pavel@ucw.cz>
S: Odd Fixes
F: drivers/staging/winbond/
STAGING - XGI Z7,Z9,Z11 PCI DISPLAY DRIVER
M: Arnaud Patard <arnaud.patard@rtp-net.org>
S: Odd Fixes

2
drivers/staging/Kconfig
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@ -30,8 +30,6 @@ source "drivers/staging/slicoss/Kconfig"
source "drivers/staging/usbip/Kconfig"
source "drivers/staging/winbond/Kconfig"
source "drivers/staging/wlan-ng/Kconfig"
source "drivers/staging/comedi/Kconfig"

1
drivers/staging/Makefile
View File

@ -7,7 +7,6 @@ obj-y += media/
obj-$(CONFIG_ET131X) += et131x/
obj-$(CONFIG_SLICOSS) += slicoss/
obj-$(CONFIG_USBIP_CORE) += usbip/
obj-$(CONFIG_W35UND) += winbond/
obj-$(CONFIG_PRISM2_USB) += wlan-ng/
obj-$(CONFIG_COMEDI) += comedi/
obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/

11
drivers/staging/winbond/Kconfig
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@ -1,11 +0,0 @@
config W35UND
tristate "IS89C35 WLAN USB driver"
depends on MAC80211 && WLAN && USB
default n
---help---
This is highly experimental driver for Winbond WIFI card.
Hardware is present in some Kohjinsha subnotebooks, and in some
stand-alone USB modules. Chipset name seems to be w89c35d.
Check <http://code.google.com/p/winbondport/> for new version.

15
drivers/staging/winbond/Makefile
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@ -1,15 +0,0 @@
w35und-y := \
mds.o \
mto.o \
phy_calibration.o \
reg.o \
wb35reg.o \
wb35rx.o \
wb35tx.o \
wbusb.o \
obj-$(CONFIG_W35UND) += w35und.o

12
drivers/staging/winbond/TODO
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@ -1,12 +0,0 @@
TODO:
- sparse cleanups
- checkpatch cleanups
- kerneldoc cleanups
- fix severeCamelCaseInfestation
- remove unused ioctls
- use cfg80211 for regulatory stuff
- fix 4k stack problems
- fix locking problems (it's done using atomics...)
Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
Pavel Machek <pavel@ucw.cz>

61
drivers/staging/winbond/core.h
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@ -1,61 +0,0 @@
#ifndef __WINBOND_CORE_H
#define __WINBOND_CORE_H
#include <linux/wireless.h>
#include <linux/types.h>
#include <linux/delay.h>
#include "wbhal.h"
#include "mto.h"
#include "mac_structures.h"
#include "mds_s.h"
#define MAX_NUM_TX_MMPDU 2
#define MAX_MMPDU_SIZE 1512
#define MAX_NUM_RX_MMPDU 6
struct mlme_frame {
s8 *pMMPDU;
u16 len;
u8 data_type;
u8 is_in_used;
u8 TxMMPDU[MAX_NUM_TX_MMPDU][MAX_MMPDU_SIZE];
u8 TxMMPDUInUse[(MAX_NUM_TX_MMPDU + 3) & ~0x03];
u16 wNumTxMMPDU;
u16 wNumTxMMPDUDiscarded;
u8 RxMMPDU[MAX_NUM_RX_MMPDU][MAX_MMPDU_SIZE];
u8 SaveRxBufSlotInUse[(MAX_NUM_RX_MMPDU + 3) & ~0x03];
u16 wNumRxMMPDU;
u16 wNumRxMMPDUDiscarded;
u16 wNumRxMMPDUInMLME; /* Number of the Rx MMPDU */
u16 reserved_1; /* in MLME. */
/* excluding the discarded */
};
#define WBLINUX_PACKET_ARRAY_SIZE (ETHERNET_TX_DESCRIPTORS*4)
#define WB_MAX_LINK_NAME_LEN 40
struct wbsoft_priv {
struct wb_local_para sLocalPara; /* Myself connected
parameters */
struct mlme_frame sMlmeFrame; /* connect to peerSTA parameters */
struct wb35_mto_params sMtoPara; /* MTO_struct ... */
struct hw_data sHwData; /*For HAL */
struct wb35_mds Mds;
u32 RxByteCount;
u32 TxByteCount;
bool enabled;
};
#endif /* __WINBOND_CORE_H */

311
drivers/staging/winbond/localpara.h
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@ -1,311 +0,0 @@
#ifndef __WINBOND_LOCALPARA_H
#define __WINBOND_LOCALPARA_H
/*
* =============================================================
* LocalPara.h -
* =============================================================
*/
#include "mac_structures.h"
/* Define the local ability */
#define LOCAL_DEFAULT_BEACON_PERIOD 100 /* ms */
#define LOCAL_DEFAULT_ATIM_WINDOW 0
#define LOCAL_DEFAULT_ERP_CAPABILITY 0x0431 /*
* 0x0001: ESS
* 0x0010: Privacy
* 0x0020: short preamble
* 0x0400: short slot time
*/
#define LOCAL_DEFAULT_LISTEN_INTERVAL 5
#define LOCAL_DEFAULT_24_CHANNEL_NUM 13 /* channel 1..13 */
#define LOCAL_DEFAULT_5_CHANNEL_NUM 8 /* channel 36..64 */
#define LOCAL_USA_24_CHANNEL_NUM 11
#define LOCAL_USA_5_CHANNEL_NUM 12
#define LOCAL_EUROPE_24_CHANNEL_NUM 13
#define LOCAL_EUROPE_5_CHANNEL_NUM 19
#define LOCAL_JAPAN_24_CHANNEL_NUM 14
#define LOCAL_JAPAN_5_CHANNEL_NUM 11
#define LOCAL_UNKNOWN_24_CHANNEL_NUM 14
#define LOCAL_UNKNOWN_5_CHANNEL_NUM 34 /* not include 165 */
#define psLOCAL (&(adapter->sLocalPara))
#define MODE_802_11_BG 0
#define MODE_802_11_A 1
#define MODE_802_11_ABG 2
#define MODE_802_11_BG_IBSS 3
#define MODE_802_11_B 4
#define MODE_AUTO 255
#define BAND_TYPE_DSSS 0
#define BAND_TYPE_OFDM_24 1
#define BAND_TYPE_OFDM_5 2
/* refer Bitmap2RateValue table */
/* the bitmap value of all the H/W supported rates: */
/* 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54 */
#define LOCAL_ALL_SUPPORTED_RATES_BITMAP 0x130c1a66
/* the bitmap value of all the H/W supported rates except to non-OFDM rates: */
/* 6, 9, 12, 18, 24, 36, 48, 54 */
#define LOCAL_OFDM_SUPPORTED_RATES_BITMAP 0x130c1240
#define LOCAL_11B_SUPPORTED_RATE_BITMAP 0x826
#define LOCAL_11B_BASIC_RATE_BITMAP 0x826
#define LOCAL_11B_OPERATION_RATE_BITMAP 0x826
#define LOCAL_11G_BASIC_RATE_BITMAP 0x826 /* 1, 2, 5.5, 11 */
#define LOCAL_11G_OPERATION_RATE_BITMAP 0x130c1240 /* 6, 9, 12, 18,
* 24, 36, 48, 54
*/
#define LOCAL_11A_BASIC_RATE_BITMAP 0x01001040 /* 6, 12, 24 */
#define LOCAL_11A_OPERATION_RATE_BITMAP 0x120c0200 /* 9, 18, 36,
* 48, 54
*/
#define PWR_ACTIVE 0
#define PWR_SAVE 1
#define PWR_TX_IDLE_CYCLE 6
/* bPreambleMode and bSlotTimeMode */
#define AUTO_MODE 0
#define LONG_MODE 1
/* Region definition */
#define REGION_AUTO 0xff
#define REGION_UNKNOWN 0
#define REGION_EUROPE 1 /* ETSI */
#define REGION_JAPAN 2 /* MKK */
#define REGION_USA 3 /* FCC */
#define REGION_FRANCE 4 /* FRANCE */
#define REGION_SPAIN 5 /* SPAIN */
#define REGION_ISRAEL 6 /* ISRAEL */
#define MAX_BSS_DESCRIPT_ELEMENT 32
#define MAX_PMKID_CandidateList 16
/*
* High byte : Event number, low byte : reason
* Event definition
* -- SME/MLME event
*/
#define EVENT_RCV_DEAUTH 0x0100
#define EVENT_JOIN_FAIL 0x0200
#define EVENT_AUTH_FAIL 0x0300
#define EVENT_ASSOC_FAIL 0x0400
#define EVENT_LOST_SIGNAL 0x0500
#define EVENT_BSS_DESCRIPT_LACK 0x0600
#define EVENT_COUNTERMEASURE 0x0700
#define EVENT_JOIN_FILTER 0x0800
/* -- TX/RX event */
#define EVENT_RX_BUFF_UNAVAILABLE 0x4100
#define EVENT_CONNECT 0x8100
#define EVENT_DISCONNECT 0x8200
#define EVENT_SCAN_REQ 0x8300
/* Reason of Event */
#define EVENT_REASON_FILTER_BASIC_RATE 0x0001
#define EVENT_REASON_FILTER_PRIVACY 0x0002
#define EVENT_REASON_FILTER_AUTH_MODE 0x0003
#define EVENT_REASON_TIMEOUT 0x00ff
/* Due to[E id][Length][OUI][Data] may be 257 bytes */
#define MAX_IE_APPEND_SIZE (256 + 4)
struct chan_info {
u8 band;
u8 ChanNo;
};
struct radio_off {
u8 boHwRadioOff;
u8 boSwRadioOff;
};
struct wb_local_para {
/* read from EPROM, manufacture set for each NetCard */
u8 PermanentAddress[MAC_ADDR_LENGTH + 2];
/* the driver will use this one actually. */
u8 ThisMacAddress[MAC_ADDR_LENGTH + 2];
u32 MTUsize; /* Ind to Uplayer, Max transmission unit size */
u8 region_INF; /* region setting from INF */
u8 region; /* real region setting of the device */
u8 Reserved_1[2];
/* power-save variables */
u8 iPowerSaveMode; /* 0 indicates on, 1 indicates off */
u8 ATIMmode;
u8 ExcludeUnencrypted;
/* Unit time count for the decision to enter PS mode */
u16 CheckCountForPS;
u8 boHasTxActivity;/* tx activity has occurred */
u8 boMacPsValid; /* Power save mode obtained
* from H/W is valid or not
*/
/* Rate */
u8 TxRateMode; /*
* Initial, input from Registry,
* may be updated by GUI
* Tx Rate Mode: auto(DTO on), max, 1M, 2M, ..
*/
u8 CurrentTxRate; /* The current Tx rate */
u8 CurrentTxRateForMng; /*
* The current Tx rate for management
* frames. It will be decided before
* connection succeeds.
*/
u8 CurrentTxFallbackRate;
/* for Rate handler */
u8 BRateSet[32]; /* basic rate set */
u8 SRateSet[32]; /* support rate set */
u8 NumOfBRate;
u8 NumOfSRate;
u8 NumOfDsssRateInSRate; /* number of DSSS rates in
* supported rate set
*/
u8 reserved1;
u32 dwBasicRateBitmap; /* bit map of basic rates */
u32 dwSupportRateBitmap; /* bit map of all support rates
* including basic and operational
* rates
*/
/* For SME/MLME handler */
u16 wOldSTAindex; /* valid when boHandover=TRUE,
* store old connected STA index
*/
u16 wConnectedSTAindex; /* Index of peerly connected AP or
* IBSS in the descriptionset.
*/
u16 Association_ID; /* The Association ID in the
* (Re)Association Response frame.
*/
u16 ListenInterval; /* The listen interval when SME invoking
* MLME_ (Re)Associate_Request().
*/
struct radio_off RadioOffStatus;
u8 Reserved0[2];
u8 boMsRadioOff; /* Ndis demands to be true when set
* Disassoc. OID and be false when
* set SSID OID.
*/
u8 bAntennaNo; /* which antenna */
u8 bConnectFlag; /* the connect status flag for
* roaming task
*/
u8 RoamStatus;
u8 reserved7[3];
struct chan_info CurrentChan; /* Current channel no. and channel band.
* It may be changed by scanning.
*/
u8 boHandover; /* Roaming, Handover to other AP. */
u8 boCCAbusy;
u16 CWMax; /* It may not be the real value
* that H/W used
*/
u8 CWMin; /* 255: set according to 802.11 spec. */
u8 reserved2;
/* 11G: */
u8 bMacOperationMode; /* operation in 802.11b or 802.11g */
u8 bSlotTimeMode; /* AUTO, s32 */
u8 bPreambleMode; /* AUTO, s32 */
u8 boNonERPpresent;
u8 boProtectMechanism; /* H/W will take the necessary action
* based on this variable
*/
u8 boShortPreamble; /* Same here */
u8 boShortSlotTime; /* Same here */
u8 reserved_3;
u32 RSN_IE_Bitmap;
u32 RSN_OUI_Type;
/* For the BSSID */
u8 HwBssid[MAC_ADDR_LENGTH + 2];
u32 HwBssidValid;
/* For scan list */
u8 BssListCount; /* Total count of valid
* descriptor indexes
*/
u8 boReceiveUncorrectInfo; /* important settings in beacon/probe
* resp. have been changed
*/
u8 NoOfJoinerInIbss;
u8 reserved_4;
/* Store the valid descriptor indexes obtained from scannings */
u8 BssListIndex[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
/*
* Save the BssDescriptor index in this IBSS.
* The index 0 is local descriptor (psLOCAL->wConnectedSTAindex).
* If CONNECTED : NoOfJoinerInIbss >= 2
* else : NoOfJoinerInIbss <= 1
*/
u8 JoinerInIbss[(MAX_BSS_DESCRIPT_ELEMENT + 3) & ~0x03];
/* General Statistics, count at Rx_handler or
* Tx_callback interrupt handler
*/
u64 GS_XMIT_OK; /* Good Frames Transmitted */
u64 GS_RCV_OK; /* Good Frames Received */
u32 GS_RCV_ERROR; /* Frames received with crc error */
u32 GS_XMIT_ERROR; /* Bad Frames Transmitted */
u32 GS_RCV_NO_BUFFER; /* Receive Buffer underrun */
u32 GS_XMIT_ONE_COLLISION; /* one collision */
u32 GS_XMIT_MORE_COLLISIONS;/* more collisions */
/*
* ================================================================
* Statistics (no matter whether it had done successfully) -wkchen
* ================================================================
*/
u32 _NumRxMSDU;
u32 _NumTxMSDU;
u32 _dot11WEPExcludedCount;
u32 _dot11WEPUndecryptableCount;
u32 _dot11FrameDuplicateCount;
struct chan_info IbssChanSetting; /* 2B. Start IBSS Channel
* setting by registry or
* WWU.
*/
u8 reserved_5[2]; /* It may not be used after
* considering RF type, region
* and modulation type.
*/
u8 reserved_6[2]; /* two variables are for wep
* key error detection
*/
u32 bWepKeyError;
u32 bToSelfPacketReceived;
u32 WepKeyDetectTimerCount;
u16 SignalLostTh;
u16 SignalRoamTh;
u8 IE_Append_data[MAX_IE_APPEND_SIZE];
u16 IE_Append_size;
u16 reserved_7;
};
#endif

71
drivers/staging/winbond/mac_structures.h
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@ -1,71 +0,0 @@
/*++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
// MAC_Structures.h
//
// This file contains the definitions and data structures used by SW-MAC.
//
// Revision Histoy
//=================
// 0.1 2002 UN00
// 0.2 20021004 PD43 CCLiu6
// 20021018 PD43 CCLiu6
// Add enum_TxRate type
// Modify enum_STAState type
// 0.3 20021023 PE23 CYLiu update MAC session struct
// 20021108
// 20021122 PD43 Austin
// Deleted some unused.
// 20021129 PD43 Austin
// 20030617 increase the 802.11g definition
//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
#ifndef _MAC_Structures_H_
#define _MAC_Structures_H_
#define MAC_ADDR_LENGTH 6
/* ========================================================
// 802.11 Frame define
//----- */
#define DOT_11_MAC_HEADER_SIZE 24
#define DOT_11_SNAP_SIZE 6
#define DOT_11_DURATION_OFFSET 2
/* Sequence control offset */
#define DOT_11_SEQUENCE_OFFSET 22
/* The start offset of 802.11 Frame// */
#define DOT_11_TYPE_OFFSET 30
#define DOT_11_DATA_OFFSET 24
#define DOT_11_DA_OFFSET 4
#define MAX_ETHERNET_PACKET_SIZE 1514
/* ----- management : Type of Bits (2, 3) and Subtype of Bits (4, 5, 6, 7) */
#define MAC_SUBTYPE_MNGMNT_ASSOC_REQUEST 0x00
#define MAC_SUBTYPE_MNGMNT_ASSOC_RESPONSE 0x10
#define MAC_SUBTYPE_MNGMNT_REASSOC_REQUEST 0x20
#define MAC_SUBTYPE_MNGMNT_REASSOC_RESPONSE 0x30
#define MAC_SUBTYPE_MNGMNT_PROBE_REQUEST 0x40
#define MAC_SUBTYPE_MNGMNT_PROBE_RESPONSE 0x50
#define MAC_SUBTYPE_MNGMNT_BEACON 0x80
#define MAC_SUBTYPE_MNGMNT_ATIM 0x90
#define MAC_SUBTYPE_MNGMNT_DISASSOCIATION 0xA0
#define MAC_SUBTYPE_MNGMNT_AUTHENTICATION 0xB0
#define MAC_SUBTYPE_MNGMNT_DEAUTHENTICATION 0xC0
#define RATE_AUTO 0
#define RATE_1M 2
#define RATE_2M 4
#define RATE_5dot5M 11
#define RATE_6M 12
#define RATE_9M 18
#define RATE_11M 22
#define RATE_12M 24
#define RATE_18M 36
#define RATE_22M 44
#define RATE_24M 48
#define RATE_33M 66
#define RATE_36M 72
#define RATE_48M 96
#define RATE_54M 108
#define RATE_MAX 255
#endif /* _MAC_Structure_H_ */

650
drivers/staging/winbond/mds.c
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@ -1,650 +0,0 @@
#include "mds_f.h"
#include "mto.h"
#include "wbhal.h"
#include "wb35tx_f.h"
unsigned char
Mds_initial(struct wbsoft_priv *adapter)
{
struct wb35_mds *pMds = &adapter->Mds;
pMds->TxPause = false;
pMds->TxRTSThreshold = DEFAULT_RTSThreshold;
pMds->TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
return hal_get_tx_buffer(&adapter->sHwData, &pMds->pTxBuffer);
}
static void Mds_DurationSet(struct wbsoft_priv *adapter,
struct wb35_descriptor *pDes, u8 *buffer)
{
struct T00_descriptor *pT00;
struct T01_descriptor *pT01;
u16 Duration, NextBodyLen, OffsetSize;
u8 Rate, i;
unsigned char CTS_on = false, RTS_on = false;
struct T00_descriptor *pNextT00;
u16 BodyLen = 0;
unsigned char boGroupAddr = false;
OffsetSize = pDes->FragmentThreshold + 32 + 3;
OffsetSize &= ~0x03;
Rate = pDes->TxRate >> 1;
if (!Rate)
Rate = 1;
pT00 = (struct T00_descriptor *)buffer;
pT01 = (struct T01_descriptor *)(buffer+4);
pNextT00 = (struct T00_descriptor *)(buffer+OffsetSize);
if (buffer[DOT_11_DA_OFFSET+8] & 0x1) /* +8 for USB hdr */
boGroupAddr = true;
/******************************************
* Set RTS/CTS mechanism
******************************************/
if (!boGroupAddr) {
/* NOTE : If the protection mode is enabled and the MSDU will
* be fragmented, the tx rates of MPDUs will all be DSSS
* rates. So it will not use CTS-to-self in this case.
* CTS-To-self will only be used when without
* fragmentation. -- 20050112 */
BodyLen = (u16)pT00->T00_frame_length; /* include 802.11 header */
BodyLen += 4; /* CRC */
if (BodyLen >= CURRENT_RTS_THRESHOLD)
RTS_on = true; /* Using RTS */
else {
if (pT01->T01_modulation_type) { /* Is using OFDM */
/* Is using protect */
if (CURRENT_PROTECT_MECHANISM)
CTS_on = true; /* Using CTS */
}
}
}
if (RTS_on || CTS_on) {
if (pT01->T01_modulation_type) { /* Is using OFDM */
/* CTS duration
* 2 SIFS + DATA transmit time + 1 ACK
* ACK Rate : 24 Mega bps
* ACK frame length = 14 bytes */
Duration = 2*DEFAULT_SIFSTIME +
2*PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION +
((BodyLen*8 + 22 + Rate*4 - 1)/(Rate*4))*Tsym +
((112 + 22 + 95)/96)*Tsym;
} else { /* DSSS */
/* CTS duration
* 2 SIFS + DATA transmit time + 1 ACK
* Rate : ?? Mega bps
* ACK frame length = 14 bytes */
if (pT01->T01_plcp_header_length) /* long preamble */
Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*2;
else
Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*2;
Duration += (((BodyLen + 14)*8 + Rate-1) / Rate +
DEFAULT_SIFSTIME*2);
}
if (RTS_on) {
if (pT01->T01_modulation_type) { /* Is using OFDM */
/* CTS + 1 SIFS + CTS duration
* CTS Rate : 24 Mega bps
* CTS frame length = 14 bytes */
Duration += (DEFAULT_SIFSTIME +
PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION +
((112 + 22 + 95)/96)*Tsym);
} else {
/* CTS + 1 SIFS + CTS duration
* CTS Rate : ?? Mega bps
* CTS frame length = 14 bytes
*/
/* long preamble */
if (pT01->T01_plcp_header_length)
Duration += LONG_PREAMBLE_PLUS_PLCPHEADER_TIME;
else
Duration += SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME;
Duration += (((112 + Rate-1) / Rate) +
DEFAULT_SIFSTIME);
}
}
/* Set the value into USB descriptor */
pT01->T01_add_rts = RTS_on ? 1 : 0;
pT01->T01_add_cts = CTS_on ? 1 : 0;
pT01->T01_rts_cts_duration = Duration;
}
/******************************************
* Fill the more fragment descriptor
******************************************/
if (boGroupAddr)
Duration = 0;
else {
for (i = pDes->FragmentCount-1; i > 0; i--) {
NextBodyLen = (u16)pNextT00->T00_frame_length;
NextBodyLen += 4; /* CRC */
if (pT01->T01_modulation_type) {
/* OFDM
* data transmit time + 3 SIFS + 2 ACK
* Rate : ??Mega bps
* ACK frame length = 14 bytes, tx rate = 24M */
Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION * 3;
Duration += (((NextBodyLen*8 + 22 + Rate*4 - 1)
/(Rate*4)) * Tsym +
(((2*14)*8 + 22 + 95)/96)*Tsym +
DEFAULT_SIFSTIME*3);
} else {
/* DSSS
* data transmit time + 2 ACK + 3 SIFS
* Rate : ??Mega bps
* ACK frame length = 14 bytes
* TODO : */
if (pT01->T01_plcp_header_length) /* long preamble */
Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME*3;
else
Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME*3;
Duration += (((NextBodyLen + (2*14))*8
+ Rate-1) / Rate +
DEFAULT_SIFSTIME*3);
}
/* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */
((u16 *)buffer)[5] = cpu_to_le16(Duration);
/* ----20061009 add by anson's endian */
pNextT00->value = cpu_to_le32(pNextT00->value);
pT01->value = cpu_to_le32(pT01->value);
/* ----end 20061009 add by anson's endian */
buffer += OffsetSize;
pT01 = (struct T01_descriptor *)(buffer+4);
/* The last fragment will not have the next fragment */
if (i != 1)
pNextT00 = (struct T00_descriptor *)(buffer+OffsetSize);
}
/*******************************************
* Fill the last fragment descriptor
*******************************************/
if (pT01->T01_modulation_type) {
/* OFDM
* 1 SIFS + 1 ACK
* Rate : 24 Mega bps
* ACK frame length = 14 bytes */
Duration = PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION;
/* The Tx rate of ACK use 24M */
Duration += (((112 + 22 + 95)/96)*Tsym +
DEFAULT_SIFSTIME);
} else {
/* DSSS
* 1 ACK + 1 SIFS
* Rate : ?? Mega bps
* ACK frame length = 14 bytes(112 bits) */
if (pT01->T01_plcp_header_length) /* long preamble */
Duration = LONG_PREAMBLE_PLUS_PLCPHEADER_TIME;
else
Duration = SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME;
Duration += ((112 + Rate-1)/Rate + DEFAULT_SIFSTIME);
}
}
/* 4 USHOR for skip 8B USB, 2USHORT=FC + Duration */
((u16 *)buffer)[5] = cpu_to_le16(Duration);
pT00->value = cpu_to_le32(pT00->value);
pT01->value = cpu_to_le32(pT01->value);
/* --end 20061009 add */
}
/* The function return the 4n size of usb pk */
static u16 Mds_BodyCopy(struct wbsoft_priv *adapter,
struct wb35_descriptor *pDes, u8 *TargetBuffer)
{
struct T00_descriptor *pT00;
struct wb35_mds *pMds = &adapter->Mds;
u8 *buffer;
u8 *src_buffer;
u8 *pctmp;
u16 Size = 0;
u16 SizeLeft, CopySize, CopyLeft, stmp;
u8 buf_index, FragmentCount = 0;
/* Copy fragment body */
buffer = TargetBuffer; /* shift 8B usb + 24B 802.11 */
SizeLeft = pDes->buffer_total_size;
buf_index = pDes->buffer_start_index;
pT00 = (struct T00_descriptor *)buffer;
while (SizeLeft) {
pT00 = (struct T00_descriptor *)buffer;
CopySize = SizeLeft;
if (SizeLeft > pDes->FragmentThreshold) {
CopySize = pDes->FragmentThreshold;
/* Set USB length */
pT00->T00_frame_length = 24 + CopySize;
} else /* Set USB length */
pT00->T00_frame_length = 24 + SizeLeft;
SizeLeft -= CopySize;
/* 1 Byte operation */
pctmp = (u8 *)(buffer + 8 + DOT_11_SEQUENCE_OFFSET);
*pctmp &= 0xf0;
*pctmp |= FragmentCount; /* 931130.5.m */
if (!FragmentCount)
pT00->T00_first_mpdu = 1;
buffer += 32; /* 8B usb + 24B 802.11 header */
Size += 32;
/* Copy into buffer */
stmp = CopySize + 3;
stmp &= ~0x03; /* 4n Alignment */
Size += stmp; /* Current 4n offset of mpdu */
while (CopySize) {
/* Copy body */
src_buffer = pDes->buffer_address[buf_index];
CopyLeft = CopySize;
if (CopySize >= pDes->buffer_size[buf_index]) {
CopyLeft = pDes->buffer_size[buf_index];
/* Get the next buffer of descriptor */
buf_index++;
buf_index %= MAX_DESCRIPTOR_BUFFER_INDEX;
} else {
u8 *pctmp = pDes->buffer_address[buf_index];
pctmp += CopySize;
pDes->buffer_address[buf_index] = pctmp;
pDes->buffer_size[buf_index] -= CopySize;
}
memcpy(buffer, src_buffer, CopyLeft);
buffer += CopyLeft;
CopySize -= CopyLeft;
}
/* 931130.5.n */
if (pMds->MicAdd) {
if (!SizeLeft) {
pMds->MicWriteAddress[pMds->MicWriteIndex] =
buffer - pMds->MicAdd;
pMds->MicWriteSize[pMds->MicWriteIndex] =
pMds->MicAdd;
pMds->MicAdd = 0;
} else if (SizeLeft < 8) { /* 931130.5.p */
pMds->MicAdd = SizeLeft;
pMds->MicWriteAddress[pMds->MicWriteIndex] =
buffer - (8 - SizeLeft);
pMds->MicWriteSize[pMds->MicWriteIndex] =
8 - SizeLeft;
pMds->MicWriteIndex++;
}
}
/* Does it need to generate the new header for next mpdu? */
if (SizeLeft) {
/* Get the next 4n start address */
buffer = TargetBuffer + Size;
/* Copy 8B USB +24B 802.11 */
memcpy(buffer, TargetBuffer, 32);
pT00 = (struct T00_descriptor *)buffer;
pT00->T00_first_mpdu = 0;
}
FragmentCount++;
}
pT00->T00_last_mpdu = 1;
pT00->T00_IsLastMpdu = 1;
buffer = (u8 *)pT00 + 8; /* +8 for USB hdr */
buffer[1] &= ~0x04; /* Clear more frag bit of 802.11 frame control */
/* Update the correct fragment number */
pDes->FragmentCount = FragmentCount;
return Size;
}
static void Mds_HeaderCopy(struct wbsoft_priv *adapter,
struct wb35_descriptor *pDes, u8 *TargetBuffer)
{
struct wb35_mds *pMds = &adapter->Mds;
u8 *src_buffer = pDes->buffer_address[0]; /* 931130.5.g */
struct T00_descriptor *pT00;
struct T01_descriptor *pT01;
u16 stmp;
u8 i, ctmp1, ctmp2, ctmpf;
u16 FragmentThreshold = CURRENT_FRAGMENT_THRESHOLD;
stmp = pDes->buffer_total_size;
/*
* Set USB header 8 byte
*/
pT00 = (struct T00_descriptor *)TargetBuffer;
TargetBuffer += 4;
pT01 = (struct T01_descriptor *)TargetBuffer;
TargetBuffer += 4;
pT00->value = 0; /* Clear */
pT01->value = 0; /* Clear */
pT00->T00_tx_packet_id = pDes->Descriptor_ID; /* Set packet ID */
pT00->T00_header_length = 24; /* Set header length */
pT01->T01_retry_abort_enable = 1; /* 921013 931130.5.h */
/* Key ID setup */
pT01->T01_wep_id = 0;
FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; /* Do not fragment */
/* Copy full data, the 1'st buffer contain all the data 931130.5.j */
/* Copy header */
memcpy(TargetBuffer, src_buffer, DOT_11_MAC_HEADER_SIZE);
pDes->buffer_address[0] = src_buffer + DOT_11_MAC_HEADER_SIZE;
pDes->buffer_total_size -= DOT_11_MAC_HEADER_SIZE;
pDes->buffer_size[0] = pDes->buffer_total_size;
/* Set fragment threshold */
FragmentThreshold -= (DOT_11_MAC_HEADER_SIZE + 4);
pDes->FragmentThreshold = FragmentThreshold;
/* Set more frag bit */
TargetBuffer[1] |= 0x04; /* Set more frag bit */
/*
* Set tx rate
*/
stmp = *(u16 *)(TargetBuffer+30); /* 2n alignment address */
/* Use basic rate */
ctmp1 = ctmpf = CURRENT_TX_RATE_FOR_MNG;
pDes->TxRate = ctmp1;
pr_debug("Tx rate =%x\n", ctmp1);
pT01->T01_modulation_type = (ctmp1%3) ? 0 : 1;
for (i = 0; i < 2; i++) {
if (i == 1)
ctmp1 = ctmpf;
/* backup the ta rate and fall back rate */
pMds->TxRate[pDes->Descriptor_ID][i] = ctmp1;
if (ctmp1 == 108)
ctmp2 = 7;
else if (ctmp1 == 96)
ctmp2 = 6; /* Rate convert for USB */
else if (ctmp1 == 72)
ctmp2 = 5;
else if (ctmp1 == 48)
ctmp2 = 4;
else if (ctmp1 == 36)
ctmp2 = 3;
else if (ctmp1 == 24)
ctmp2 = 2;
else if (ctmp1 == 18)
ctmp2 = 1;
else if (ctmp1 == 12)
ctmp2 = 0;
else if (ctmp1 == 22)
ctmp2 = 3;
else if (ctmp1 == 11)
ctmp2 = 2;
else if (ctmp1 == 4)
ctmp2 = 1;
else
ctmp2 = 0; /* if( ctmp1 == 2 ) or default */
if (i == 0)
pT01->T01_transmit_rate = ctmp2;
else
pT01->T01_fall_back_rate = ctmp2;
}
/*
* Set preamble type
*/
/* RATE_1M */
if ((pT01->T01_modulation_type == 0) && (pT01->T01_transmit_rate == 0))
pDes->PreambleMode = WLAN_PREAMBLE_TYPE_LONG;
else
pDes->PreambleMode = CURRENT_PREAMBLE_MODE;
pT01->T01_plcp_header_length = pDes->PreambleMode; /* Set preamble */
}
static void MLME_GetNextPacket(struct wbsoft_priv *adapter,
struct wb35_descriptor *desc)
{
desc->InternalUsed = desc->buffer_start_index + desc->buffer_number;
desc->InternalUsed %= MAX_DESCRIPTOR_BUFFER_INDEX;
desc->buffer_address[desc->InternalUsed] = adapter->sMlmeFrame.pMMPDU;
desc->buffer_size[desc->InternalUsed] = adapter->sMlmeFrame.len;
desc->buffer_total_size += adapter->sMlmeFrame.len;
desc->buffer_number++;
desc->Type = adapter->sMlmeFrame.data_type;
}
static void MLMEfreeMMPDUBuffer(struct wbsoft_priv *adapter, s8 *pData)
{
int i;
/* Reclaim the data buffer */
for (i = 0; i < MAX_NUM_TX_MMPDU; i++) {
if (pData == (s8 *)&(adapter->sMlmeFrame.TxMMPDU[i]))
break;
}
if (adapter->sMlmeFrame.TxMMPDUInUse[i])
adapter->sMlmeFrame.TxMMPDUInUse[i] = false;
else {
/* Something wrong
PD43 Add debug code here??? */
}
}
static void MLME_SendComplete(struct wbsoft_priv *adapter, u8 PacketID,
unsigned char SendOK)
{
/* Reclaim the data buffer */
adapter->sMlmeFrame.len = 0;
MLMEfreeMMPDUBuffer(adapter, adapter->sMlmeFrame.pMMPDU);
/* Return resource */
adapter->sMlmeFrame.is_in_used = PACKET_FREE_TO_USE;
}
void
Mds_Tx(struct wbsoft_priv *adapter)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_mds *pMds = &adapter->Mds;
struct wb35_descriptor TxDes;
struct wb35_descriptor *pTxDes = &TxDes;
u8 *XmitBufAddress;
u16 XmitBufSize, PacketSize, stmp, CurrentSize, FragmentThreshold;
u8 FillIndex, TxDesIndex, FragmentCount, FillCount;
unsigned char BufferFilled = false;
if (pMds->TxPause)
return;
if (!hal_driver_init_OK(pHwData))
return;
/* Only one thread can be run here */
if (atomic_inc_return(&pMds->TxThreadCount) != 1)
goto cleanup;
/* Start to fill the data */
do {
FillIndex = pMds->TxFillIndex;
/* Is owned by software 0:Yes 1:No */
if (pMds->TxOwner[FillIndex]) {
pr_debug("[Mds_Tx] Tx Owner is H/W.\n");
break;
}
/* Get buffer */
XmitBufAddress = pMds->pTxBuffer + (MAX_USB_TX_BUFFER * FillIndex);
XmitBufSize = 0;
FillCount = 0;
do {
PacketSize = adapter->sMlmeFrame.len;
if (!PacketSize)
break;
/* For Check the buffer resource */
FragmentThreshold = CURRENT_FRAGMENT_THRESHOLD;
/* 931130.5.b */
FragmentCount = PacketSize/FragmentThreshold + 1;
/* 931130.5.c 8:MIC */
stmp = PacketSize + FragmentCount*32 + 8;
if ((XmitBufSize + stmp) >= MAX_USB_TX_BUFFER)
break; /* buffer is not enough */
/*
* Start transmitting
*/
BufferFilled = true;
/* Leaves first u8 intact */
memset((u8 *)pTxDes + 1, 0, sizeof(struct wb35_descriptor) - 1);
TxDesIndex = pMds->TxDesIndex; /* Get the current ID */
pTxDes->Descriptor_ID = TxDesIndex;
/* Storing the information of source coming from */
pMds->TxDesFrom[TxDesIndex] = 2;
pMds->TxDesIndex++;
pMds->TxDesIndex %= MAX_USB_TX_DESCRIPTOR;
MLME_GetNextPacket(adapter, pTxDes);
/*
* Copy header. 8byte USB + 24byte 802.11Hdr.
* Set TxRate, Preamble type
*/
Mds_HeaderCopy(adapter, pTxDes, XmitBufAddress);
/* For speed up Key setting */
if (pTxDes->EapFix) {
pr_debug("35: EPA 4th frame detected. Size = %d\n",
PacketSize);
pHwData->IsKeyPreSet = 1;
}
/* Copy (fragment) frame body, and set USB, 802.11 hdr flag */
CurrentSize = Mds_BodyCopy(adapter, pTxDes, XmitBufAddress);
/* Set RTS/CTS and Normal duration field into buffer */
Mds_DurationSet(adapter, pTxDes, XmitBufAddress);
/* Shift to the next address */
XmitBufSize += CurrentSize;
XmitBufAddress += CurrentSize;
/* Get packet to transmit completed,
* 1:TESTSTA 2:MLME 3: Ndis data
*/
MLME_SendComplete(adapter, 0, true);
/* Software TSC count 20060214 */
pMds->TxTsc++;
if (pMds->TxTsc == 0)
pMds->TxTsc_2++;
FillCount++; /* 20060928 */
/*
* End of multiple MSDU copy loop.
* false = single
* true = multiple sending
*/
} while (HAL_USB_MODE_BURST(pHwData));
/* Move to the next one, if necessary */
if (BufferFilled) {
/* size setting */
pMds->TxBufferSize[FillIndex] = XmitBufSize;
/* 20060928 set Tx count */
pMds->TxCountInBuffer[FillIndex] = FillCount;
/* Set owner flag */
pMds->TxOwner[FillIndex] = 1;
pMds->TxFillIndex++;
pMds->TxFillIndex %= MAX_USB_TX_BUFFER_NUMBER;
BufferFilled = false;
} else
break;
if (!PacketSize) /* No more pk for transmitting */
break;
} while (true);
/*
* Start to send by lower module
*/
if (!pHwData->IsKeyPreSet)
Wb35Tx_start(adapter);
cleanup:
atomic_dec(&pMds->TxThreadCount);
}
void
Mds_SendComplete(struct wbsoft_priv *adapter, struct T02_descriptor *pT02)
{
struct wb35_mds *pMds = &adapter->Mds;
struct hw_data *pHwData = &adapter->sHwData;
u8 PacketId = (u8)pT02->T02_Tx_PktID;
unsigned char SendOK = true;
u8 RetryCount, TxRate;
if (pT02->T02_IgnoreResult) /* Don't care about the result */
return;
if (pT02->T02_IsLastMpdu) {
/* TODO: DTO -- get the retry count and fragment count */
/* Tx rate */
TxRate = pMds->TxRate[PacketId][0];
RetryCount = (u8)pT02->T02_MPDU_Cnt;
if (pT02->value & FLAG_ERROR_TX_MASK) {
SendOK = false;
if (pT02->T02_transmit_abort || pT02->T02_out_of_MaxTxMSDULiftTime) {
/* retry error */
pHwData->dto_tx_retry_count += (RetryCount+1);
/* [for tx debug] */
if (RetryCount < 7)
pHwData->tx_retry_count[RetryCount] += RetryCount;
else
pHwData->tx_retry_count[7] += RetryCount;
pr_debug("dto_tx_retry_count =%d\n",
pHwData->dto_tx_retry_count);
MTO_SetTxCount(adapter, TxRate, RetryCount);
}
pHwData->dto_tx_frag_count += (RetryCount+1);
/* [for tx debug] */
if (pT02->T02_transmit_abort_due_to_TBTT)
pHwData->tx_TBTT_start_count++;
if (pT02->T02_transmit_without_encryption_due_to_wep_on_false)
pHwData->tx_WepOn_false_count++;
if (pT02->T02_discard_due_to_null_wep_key)
pHwData->tx_Null_key_count++;
} else {
if (pT02->T02_effective_transmission_rate)
pHwData->tx_ETR_count++;
MTO_SetTxCount(adapter, TxRate, RetryCount);
}
/* Clear send result buffer */
pMds->TxResult[PacketId] = 0;
} else
pMds->TxResult[PacketId] |= ((u16)(pT02->value & 0x0ffff));
}

22
drivers/staging/winbond/mds_f.h
View File

@ -1,22 +0,0 @@
#ifndef __WINBOND_MDS_F_H
#define __WINBOND_MDS_F_H
#include "wbhal.h"
#include "core.h"
unsigned char Mds_initial(struct wbsoft_priv *adapter);
void Mds_Tx(struct wbsoft_priv *adapter);
void Mds_SendComplete(struct wbsoft_priv *adapter, struct T02_descriptor *pt02);
void Mds_MpduProcess(struct wbsoft_priv *adapter,
struct wb35_descriptor *prxdes);
/* For data frame sending */
u16 MDS_GetPacketSize(struct wbsoft_priv *adapter);
void MDS_GetNextPacket(struct wbsoft_priv *adapter,
struct wb35_descriptor *pdes);
void MDS_GetNextPacketComplete(struct wbsoft_priv *adapter,
struct wb35_descriptor *pdes);
void MDS_SendResult(struct wbsoft_priv *adapter, u8 packetid,
unsigned char sendok);
#endif

130
drivers/staging/winbond/mds_s.h
View File

@ -1,130 +0,0 @@
#ifndef __WINBOND_MDS_H
#define __WINBOND_MDS_H
#include <linux/timer.h>
#include <linux/types.h>
#include <linux/atomic.h>
#include "localpara.h"
#include "mac_structures.h"
/* Preamble_Type, see <SFS-802.11G-MIB-203> */
enum {
WLAN_PREAMBLE_TYPE_SHORT,
WLAN_PREAMBLE_TYPE_LONG,
};
/*****************************************************************************/
#define MAX_USB_TX_DESCRIPTOR 15 /* IS89C35 ability */
#define MAX_USB_TX_BUFFER_NUMBER 4 /* Virtual pre-buffer number of MAX_USB_TX_BUFFER */
#define MAX_USB_TX_BUFFER 4096 /* IS89C35 ability 4n alignment is required for hardware */
#define AUTH_REQUEST_PAIRWISE_ERROR 0 /* _F flag setting */
#define AUTH_REQUEST_GROUP_ERROR 1 /* _F flag setting */
#define CURRENT_FRAGMENT_THRESHOLD (adapter->Mds.TxFragmentThreshold & ~0x1)
#define CURRENT_PREAMBLE_MODE (psLOCAL->boShortPreamble ? WLAN_PREAMBLE_TYPE_SHORT : WLAN_PREAMBLE_TYPE_LONG)
#define CURRENT_TX_RATE_FOR_MNG (adapter->sLocalPara.CurrentTxRateForMng)
#define CURRENT_PROTECT_MECHANISM (psLOCAL->boProtectMechanism)
#define CURRENT_RTS_THRESHOLD (adapter->Mds.TxRTSThreshold)
#define MIB_GS_XMIT_OK_INC (adapter->sLocalPara.GS_XMIT_OK++)
#define MIB_GS_RCV_OK_INC (adapter->sLocalPara.GS_RCV_OK++)
#define MIB_GS_XMIT_ERROR_INC (adapter->sLocalPara.GS_XMIT_ERROR)
/* ---------- TX ----------------------------------- */
#define ETHERNET_TX_DESCRIPTORS MAX_USB_TX_BUFFER_NUMBER
/* ---------- RX ----------------------------------- */
#define ETHERNET_RX_DESCRIPTORS 8 /* It's not necessary to allocate more than 2 in sync indicate */
/*
* ================================================================
* Configuration default value
* ================================================================
*/
#define DEFAULT_MULTICASTLISTMAX 32 /* standard */
#define DEFAULT_TX_BURSTLENGTH 3 /* 32 Longwords */
#define DEFAULT_RX_BURSTLENGTH 3 /* 32 Longwords */
#define DEFAULT_TX_THRESHOLD 0 /* Full Packet */
#define DEFAULT_RX_THRESHOLD 0 /* Full Packet */
#define DEFAULT_MAXTXRATE 6 /* 11 Mbps (Long) */
#define DEFAULT_CHANNEL 3 /* Chennel 3 */
#define DEFAULT_RTSThreshold 2347 /* Disable RTS */
#define DEFAULT_PME 0 /* Disable */
#define DEFAULT_SIFSTIME 10
#define DEFAULT_ACKTIME_1ML 304 /* 148 + 44 + 112 */
#define DEFAULT_ACKTIME_2ML 248 /* 148 + 44 + 56 */
#define DEFAULT_FRAGMENT_THRESHOLD 2346 /* No fragment */
#define DEFAULT_PREAMBLE_LENGTH 72
#define DEFAULT_PLCPHEADERTIME_LENGTH 24
/*
* ------------------------------------------------------------------------
* 0.96 sec since time unit of the R03 for the current, W89C32 is about 60ns
* instead of 960 ns. This shall be fixed in the future W89C32
* -------------------------------------------------------------------------
*/
#define DEFAULT_MAX_RECEIVE_TIME 16440000
#define RX_BUF_SIZE 2352 /* 600 - For 301 must be multiple of 8 */
#define MAX_RX_DESCRIPTORS 18 /* Rx Layer 2 */
/* For brand-new rx system */
#define MDS_ID_IGNORE ETHERNET_RX_DESCRIPTORS
/* For Tx Packet status classify */
#define PACKET_FREE_TO_USE 0
#define PACKET_COME_FROM_NDIS 0x08
#define PACKET_COME_FROM_MLME 0x80
#define PACKET_SEND_COMPLETE 0xff
struct wb35_mds {
/* For Tx usage */
u8 TxOwner[((MAX_USB_TX_BUFFER_NUMBER + 3) & ~0x03)];
u8 *pTxBuffer;
u16 TxBufferSize[((MAX_USB_TX_BUFFER_NUMBER + 1) & ~0x01)];
u8 TxDesFrom[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];/* 1: MLME 2: NDIS control 3: NDIS data */
u8 TxCountInBuffer[((MAX_USB_TX_DESCRIPTOR + 3) & ~0x03)];
u8 TxFillIndex; /* the next index of TxBuffer can be used */
u8 TxDesIndex; /* The next index of TxDes can be used */
u8 ScanTxPause; /* data Tx pause because the scanning is progressing, but probe request Tx won't. */
u8 TxPause; /*For pause the Mds_Tx modult */
atomic_t TxThreadCount; /* For thread counting */
u16 TxResult[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)];/* Collect the sending result of Mpdu */
u8 MicRedundant[8]; /* For tmp use */
u8 *MicWriteAddress[2]; /* The start address to fill the Mic, use 2 point due to Mic maybe fragment */
u16 MicWriteSize[2];
u16 MicAdd; /* If want to add the Mic, this variable equal to 8 */
u16 MicWriteIndex; /* The number of MicWriteAddress */
u8 TxRate[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)][2]; /* [0] current tx rate, [1] fall back rate */
u8 TxInfo[((MAX_USB_TX_DESCRIPTOR + 1) & ~0x01)]; /*Store information for callback function */
/* ---- for Tx Parameter */
u16 TxFragmentThreshold; /* For frame body only */
u16 TxRTSThreshold;
u32 MaxReceiveTime;
/* depend on OS, */
u32 MulticastListNo;
u32 PacketFilter; /* Setting by NDIS, the current packet filter in use. */
u8 MulticastAddressesArray[DEFAULT_MULTICASTLISTMAX][MAC_ADDR_LENGTH];
/* COUNTERMEASURE */
u8 bMICfailCount;
u8 boCounterMeasureBlock;
u8 reserved_4[2];
u32 TxTsc;
u32 TxTsc_2;
};
#endif

167
drivers/staging/winbond/mto.c
View File

@ -1,167 +0,0 @@
/*
* ============================================================================
* MTO.C -
*
* Description:
* MAC Throughput Optimization for W89C33 802.11g WLAN STA.
*
* The following MIB attributes or internal variables will be affected
* while the MTO is being executed:
* dot11FragmentationThreshold,
* dot11RTSThreshold,
* transmission rate and PLCP preamble type,
* CCA mode,
* antenna diversity.
*
* Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
* ============================================================================
*/
#include "sme_api.h"
#include "wbhal.h"
#include "wb35reg_f.h"
#include "core.h"
#include "mto.h"
/* Declare SQ3 to rate and fragmentation threshold table */
/* Declare fragmentation threshold table */
#define MTO_MAX_FRAG_TH_LEVELS 5
#define MTO_MAX_DATA_RATE_LEVELS 12
u16 MTO_Frag_Th_Tbl[MTO_MAX_FRAG_TH_LEVELS] = {
256, 384, 512, 768, 1536
};
/*
* Declare data rate table:
* The following table will be changed at anytime if the operation rate
* supported by AP don't match the table
*/
static u8 MTO_Data_Rate_Tbl[MTO_MAX_DATA_RATE_LEVELS] = {
2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108
};
/* this record the retry rate at different data rate */
static int retryrate_rec[MTO_MAX_DATA_RATE_LEVELS];
static u8 boSparseTxTraffic;
/*
* ===========================================================================
* MTO_Init --
*
* Description:
* Initialize MTO parameters.
*
* This function should be invoked during system initialization.
*
* Arguments:
* adapter - The pointer to the Miniport adapter Context
* ===========================================================================
*/
void MTO_Init(struct wbsoft_priv *adapter)
{
int i;
MTO_PREAMBLE_TYPE() = MTO_PREAMBLE_SHORT; /* for test */
MTO_CNT_ANT(0) = 0;
MTO_CNT_ANT(1) = 0;
MTO_SQ_ANT(0) = 0;
MTO_SQ_ANT(1) = 0;
MTO_AGING_TIMEOUT() = 0;
/* The following parameters should be initialized to the values set by user */
MTO_RATE_LEVEL() = 0;
MTO_FRAG_TH_LEVEL() = 4;
MTO_RTS_THRESHOLD() = MTO_FRAG_TH() + 1;
MTO_RTS_THRESHOLD_SETUP() = MTO_FRAG_TH() + 1;
MTO_RATE_CHANGE_ENABLE() = 1;
MTO_FRAG_CHANGE_ENABLE() = 0;
MTO_POWER_CHANGE_ENABLE() = 1;
MTO_PREAMBLE_CHANGE_ENABLE() = 1;
MTO_RTS_CHANGE_ENABLE() = 0;
for (i = 0; i < MTO_MAX_DATA_RATE_LEVELS; i++)
retryrate_rec[i] = 5;
MTO_TXFLOWCOUNT() = 0;
/* --------- DTO threshold parameters ------------- */
MTOPARA_PERIODIC_CHECK_CYCLE() = 10;
MTOPARA_RSSI_TH_FOR_ANTDIV() = 10;
MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() = 50;
MTOPARA_TXRATE_INC_TH() = 10;
MTOPARA_TXRATE_DEC_TH() = 30;
MTOPARA_TXRATE_EQ_TH() = 40;
MTOPARA_TXRATE_BACKOFF() = 12;
MTOPARA_TXRETRYRATE_REDUCE() = 6;
if (MTO_TXPOWER_FROM_EEPROM == 0xff) {
switch (MTO_HAL()->phy_type) {
case RF_AIROHA_2230:
case RF_AIROHA_2230S:
MTOPARA_TXPOWER_INDEX() = 46; /* MAX-8 @@ Only for AL 2230 */
break;
case RF_AIROHA_7230:
MTOPARA_TXPOWER_INDEX() = 49;
break;
case RF_WB_242:
MTOPARA_TXPOWER_INDEX() = 10;
break;
case RF_WB_242_1:
MTOPARA_TXPOWER_INDEX() = 24;
break;
}
} else { /* follow the setting from EEPROM */
MTOPARA_TXPOWER_INDEX() = MTO_TXPOWER_FROM_EEPROM;
}
RFSynthesizer_SetPowerIndex(MTO_HAL(), (u8) MTOPARA_TXPOWER_INDEX());
/* ------------------------------------------------ */
/* For RSSI turning -- Cancel load from EEPROM */
MTO_DATA().RSSI_high = -41;
MTO_DATA().RSSI_low = -60;
}
/* ===========================================================================
* Description:
* If we enable DTO, we will ignore the tx count with different tx rate
* from DTO rate. This is because when we adjust DTO tx rate, there could
* be some packets in the tx queue with previous tx rate
*/
void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 tx_rate, u8 index)
{
MTO_TXFLOWCOUNT()++;
if ((MTO_ENABLE == 1) && (MTO_RATE_CHANGE_ENABLE() == 1)) {
if (tx_rate == MTO_DATA_RATE()) {
if (index == 0) {
if (boSparseTxTraffic)
MTO_HAL()->dto_tx_frag_count += MTOPARA_PERIODIC_CHECK_CYCLE();
else
MTO_HAL()->dto_tx_frag_count += 1;
} else {
if (index < 8) {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
} else {
MTO_HAL()->dto_tx_retry_count += 7;
MTO_HAL()->dto_tx_frag_count += 7;
}
}
} else if (MTO_DATA_RATE() > 48 && tx_rate == 48) {
/* for reducing data rate scheme, do not calculate different data rate. 3 is the reducing data rate at retry. */
if (index < 3) {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
} else {
MTO_HAL()->dto_tx_retry_count += 3;
MTO_HAL()->dto_tx_frag_count += 3;
}
}
} else {
MTO_HAL()->dto_tx_retry_count += index;
MTO_HAL()->dto_tx_frag_count += (index + 1);
}
}

134
drivers/staging/winbond/mto.h
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@ -1,134 +0,0 @@
/*
* ==================================================================
* MTO.H
*
* Copyright (c) 2003 Winbond Electronics Corp. All rights reserved.
* ==================================================================
*/
#ifndef __MTO_H__
#define __MTO_H__
#include <linux/types.h>
struct wbsoft_priv;
#define MTO_PREAMBLE_LONG WLAN_PREAMBLE_TYPE_LONG
#define MTO_PREAMBLE_SHORT WLAN_PREAMBLE_TYPE_SHORT
/* Defines the parameters used in the MAC Throughput Optimization algorithm */
struct wb35_mto_params {
u32 TxFlowCount; /* to judge what kind the tx flow(sparse or busy) is */
/* --------- DTO threshold parameters ------------- */
u16 DTO_PeriodicCheckCycle;
u16 DTO_RssiThForAntDiv;
u16 DTO_TxCountThForCalcNewRate;
u16 DTO_TxRateIncTh;
u16 DTO_TxRateDecTh;
u16 DTO_TxRateEqTh;
u16 DTO_TxRateBackOff;
u16 DTO_TxRetryRateReduce;
u16 DTO_TxPowerIndex; /* 0 ~ 31 */
u16 reserved_1;
/* ------------------------------------------------ */
u8 PowerChangeEnable;
u8 AntDiversityEnable;
u8 CCA_Mode;
u8 CCA_Mode_Setup;
u8 Preamble_Type;
u8 PreambleChangeEnable;
u8 DataRateLevel;
u8 DataRateChangeEnable;
u8 FragThresholdLevel;
u8 FragThresholdChangeEnable;
u16 RTSThreshold;
u16 RTSThreshold_Setup;
u32 AvgIdleSlot;
u32 Pr_Interf;
u32 AvgGapBtwnInterf;
u8 RTSChangeEnable;
u8 Ant_sel;
u8 aging_timeout;
u8 reserved_2;
u32 Cnt_Ant[2];
u32 SQ_Ant[2];
u8 FallbackRateLevel;
u8 OfdmRateLevel;
u8 RatePolicy;
u8 reserved_3[3];
/* For RSSI turning */
s32 RSSI_high;
s32 RSSI_low;
};
#define MTO_DATA() (adapter->sMtoPara)
#define MTO_HAL() (&adapter->sHwData)
#define MTO_SET_PREAMBLE_TYPE(x) /* Turbo mark LM_PREAMBLE_TYPE(&pcore_data->lm_data) = (x) */
#define MTO_ENABLE (adapter->sLocalPara.TxRateMode == RATE_AUTO)
#define MTO_TXPOWER_FROM_EEPROM (adapter->sHwData.PowerIndexFromEEPROM)
#define LOCAL_ANTENNA_NO() (adapter->sLocalPara.bAntennaNo)
#define LOCAL_IS_CONNECTED() (adapter->sLocalPara.wConnectedSTAindex != 0)
#define MTO_INITTXRATE_MODE (adapter->sHwData.SoftwareSet&0x2) /* bit 1 */
#define MTO_POWER_CHANGE_ENABLE() MTO_DATA().PowerChangeEnable
#define MTO_CCA_MODE() MTO_DATA().CCA_Mode
#define MTO_CCA_MODE_SETUP() MTO_DATA().CCA_Mode_Setup
#define MTO_PREAMBLE_TYPE() MTO_DATA().Preamble_Type
#define MTO_PREAMBLE_CHANGE_ENABLE() MTO_DATA().PreambleChangeEnable
#define MTO_RATE_LEVEL() MTO_DATA().DataRateLevel
#define MTO_OFDM_RATE_LEVEL() MTO_DATA().OfdmRateLevel
#define MTO_RATE_CHANGE_ENABLE() MTO_DATA().DataRateChangeEnable
#define MTO_FRAG_TH_LEVEL() MTO_DATA().FragThresholdLevel
#define MTO_FRAG_CHANGE_ENABLE() MTO_DATA().FragThresholdChangeEnable
#define MTO_RTS_THRESHOLD() MTO_DATA().RTSThreshold
#define MTO_RTS_CHANGE_ENABLE() MTO_DATA().RTSChangeEnable
#define MTO_RTS_THRESHOLD_SETUP() MTO_DATA().RTSThreshold_Setup
#define MTO_AVG_IDLE_SLOT() MTO_DATA().AvgIdleSlot
#define MTO_PR_INTERF() MTO_DATA().Pr_Interf
#define MTO_AVG_GAP_BTWN_INTERF() MTO_DATA().AvgGapBtwnInterf
#define MTO_CNT_ANT(x) MTO_DATA().Cnt_Ant[(x)]
#define MTO_SQ_ANT(x) MTO_DATA().SQ_Ant[(x)]
#define MTO_AGING_TIMEOUT() MTO_DATA().aging_timeout
#define MTO_TXFLOWCOUNT() MTO_DATA().TxFlowCount
/* --------- DTO threshold parameters ------------- */
#define MTOPARA_PERIODIC_CHECK_CYCLE() MTO_DATA().DTO_PeriodicCheckCycle
#define MTOPARA_RSSI_TH_FOR_ANTDIV() MTO_DATA().DTO_RssiThForAntDiv
#define MTOPARA_TXCOUNT_TH_FOR_CALC_RATE() MTO_DATA().DTO_TxCountThForCalcNewRate
#define MTOPARA_TXRATE_INC_TH() MTO_DATA().DTO_TxRateIncTh
#define MTOPARA_TXRATE_DEC_TH() MTO_DATA().DTO_TxRateDecTh
#define MTOPARA_TXRATE_EQ_TH() MTO_DATA().DTO_TxRateEqTh
#define MTOPARA_TXRATE_BACKOFF() MTO_DATA().DTO_TxRateBackOff
#define MTOPARA_TXRETRYRATE_REDUCE() MTO_DATA().DTO_TxRetryRateReduce
#define MTOPARA_TXPOWER_INDEX() MTO_DATA().DTO_TxPowerIndex
/* ------------------------------------------------ */
extern u16 MTO_Frag_Th_Tbl[];
#define MTO_DATA_RATE() MTO_Data_Rate_Tbl[MTO_RATE_LEVEL()]
#define MTO_FRAG_TH() MTO_Frag_Th_Tbl[MTO_FRAG_TH_LEVEL()]
void MTO_Init(struct wbsoft_priv *);
void MTO_SetTxCount(struct wbsoft_priv *adapter, u8 t0, u8 index);
#endif /* __MTO_H__ */

1317
drivers/staging/winbond/phy_calibration.c
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85
drivers/staging/winbond/phy_calibration.h
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@ -1,85 +0,0 @@
#ifndef __WINBOND_PHY_CALIBRATION_H
#define __WINBOND_PHY_CALIBRATION_H
#include "wbhal.h"
#define REG_AGC_CTRL1 0x1000
#define REG_AGC_CTRL2 0x1004
#define REG_AGC_CTRL3 0x1008
#define REG_AGC_CTRL4 0x100C
#define REG_AGC_CTRL5 0x1010
#define REG_AGC_CTRL6 0x1014
#define REG_AGC_CTRL7 0x1018
#define REG_AGC_CTRL8 0x101C
#define REG_AGC_CTRL9 0x1020
#define REG_AGC_CTRL10 0x1024
#define REG_CCA_CTRL 0x1028
#define REG_A_ACQ_CTRL 0x102C
#define REG_B_ACQ_CTRL 0x1030
#define REG_A_TXRX_CTRL 0x1034
#define REG_B_TXRX_CTRL 0x1038
#define REG_A_TX_COEF3 0x103C
#define REG_A_TX_COEF2 0x1040
#define REG_A_TX_COEF1 0x1044
#define REG_B_TX_COEF2 0x1048
#define REG_B_TX_COEF1 0x104C
#define REG_MODE_CTRL 0x1050
#define REG_CALIB_DATA 0x1054
#define REG_IQ_ALPHA 0x1058
#define REG_DC_CANCEL 0x105C
#define REG_WTO_READ 0x1060
#define REG_OFFSET_READ 0x1064
#define REG_CALIB_READ1 0x1068
#define REG_CALIB_READ2 0x106C
#define REG_A_FREQ_EST 0x1070
#define MASK_AMER_OFF_REG BIT(31)
#define MASK_BMER_OFF_REG BIT(31)
#define MASK_LNA_FIX_GAIN (BIT(3) | BIT(4))
#define MASK_AGC_FIX BIT(1)
#define MASK_AGC_FIX_GAIN 0xFF00
#define MASK_ADC_DC_CAL_STR BIT(10)
#define MASK_CALIB_START BIT(4)
#define MASK_IQCAL_TONE_SEL (BIT(3) | BIT(2))
#define MASK_IQCAL_MODE (BIT(1) | BIT(0))
#define MASK_TX_CAL_0 0xF0000000
#define TX_CAL_0_SHIFT 28
#define MASK_TX_CAL_1 0x0F000000
#define TX_CAL_1_SHIFT 24
#define MASK_TX_CAL_2 0x00F00000
#define TX_CAL_2_SHIFT 20
#define MASK_TX_CAL_3 0x000F0000
#define TX_CAL_3_SHIFT 16
#define MASK_RX_CAL_0 0x0000F000
#define RX_CAL_0_SHIFT 12
#define MASK_RX_CAL_1 0x00000F00
#define RX_CAL_1_SHIFT 8
#define MASK_RX_CAL_2 0x000000F0
#define RX_CAL_2_SHIFT 4
#define MASK_RX_CAL_3 0x0000000F
#define RX_CAL_3_SHIFT 0
#define MASK_CANCEL_DC_I 0x3E0
#define CANCEL_DC_I_SHIFT 5
#define MASK_CANCEL_DC_Q 0x01F
#define CANCEL_DC_Q_SHIFT 0
#define MASK_ADC_DC_CAL_I(x) (((x) & 0x0003FE00) >> 9)
#define MASK_ADC_DC_CAL_Q(x) ((x) & 0x000001FF)
#define MASK_IQCAL_TONE_I 0x00001FFF
#define SHIFT_IQCAL_TONE_I(x) ((x) >> 0)
#define MASK_IQCAL_TONE_Q 0x03FFE000
#define SHIFT_IQCAL_TONE_Q(x) ((x) >> 13)
void phy_set_rf_data(struct hw_data *pHwData, u32 index, u32 value);
void phy_calibration_winbond(struct hw_data *phw_data, u32 frequency);
#define phy_init_rf(_A) /* RFSynthesizer_initial(_A) */
#endif

2328
drivers/staging/winbond/reg.c
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191
drivers/staging/winbond/sme_api.h
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@ -1,191 +0,0 @@
/*
* sme_api.h
*
* Copyright(C) 2002 Winbond Electronics Corp.
*/
#ifndef __SME_API_H__
#define __SME_API_H__
#include <linux/types.h>
#include "localpara.h"
/****************** CONSTANT AND MACRO SECTION ******************************/
#define MEDIA_STATE_DISCONNECTED 0
#define MEDIA_STATE_CONNECTED 1
/* ARRAY CHECK */
#define MAX_POWER_TO_DB 32
/****************** TYPE DEFINITION SECTION *********************************/
/****************** EXPORTED FUNCTION DECLARATION SECTION *******************/
/* OID_802_11_BSSID */
s8 sme_get_bssid(void *pcore_data, u8 *pbssid);
s8 sme_get_desired_bssid(void *pcore_data, u8 *pbssid); /* Unused */
s8 sme_set_desired_bssid(void *pcore_data, u8 *pbssid);
/* OID_802_11_SSID */
s8 sme_get_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);
s8 sme_get_desired_ssid(void *pcore_data, u8 *pssid, u8 *pssid_len);/* Unused */
s8 sme_set_desired_ssid(void *pcore_data, u8 *pssid, u8 ssid_len);
/* OID_802_11_INFRASTRUCTURE_MODE */
s8 sme_get_bss_type(void *pcore_data, u8 *pbss_type);
s8 sme_get_desired_bss_type(void *pcore_data, u8 *pbss_type); /* Unused */
s8 sme_set_desired_bss_type(void *pcore_data, u8 bss_type);
/* OID_802_11_FRAGMENTATION_THRESHOLD */
s8 sme_get_fragment_threshold(void *pcore_data, u32 *pthreshold);
s8 sme_set_fragment_threshold(void *pcore_data, u32 threshold);
/* OID_802_11_RTS_THRESHOLD */
s8 sme_get_rts_threshold(void *pcore_data, u32 *pthreshold);
s8 sme_set_rts_threshold(void *pcore_data, u32 threshold);
/* OID_802_11_CONFIGURATION */
s8 sme_get_beacon_period(void *pcore_data, u16 *pbeacon_period);
s8 sme_set_beacon_period(void *pcore_data, u16 beacon_period);
s8 sme_get_atim_window(void *pcore_data, u16 *patim_window);
s8 sme_set_atim_window(void *pcore_data, u16 atim_window);
s8 sme_get_current_channel(void *pcore_data, u8 *pcurrent_channel);
s8 sme_get_current_band(void *pcore_data, u8 *pcurrent_band);
s8 sme_set_current_channel(void *pcore_data, u8 current_channel);
/* OID_802_11_BSSID_LIST */
s8 sme_get_scan_bss_count(void *pcore_data, u8 *pcount);
s8 sme_get_scan_bss(void *pcore_data, u8 index, void **ppbss);
s8 sme_get_connected_bss(void *pcore_data, void **ppbss_now);
/* OID_802_11_AUTHENTICATION_MODE */
s8 sme_get_auth_mode(void *pcore_data, u8 *pauth_mode);
s8 sme_set_auth_mode(void *pcore_data, u8 auth_mode);
/* OID_802_11_WEP_STATUS / OID_802_11_ENCRYPTION_STATUS */
s8 sme_get_wep_mode(void *pcore_data, u8 *pwep_mode);
s8 sme_set_wep_mode(void *pcore_data, u8 wep_mode);
/* OID_GEN_VENDOR_ID */
/* OID_802_3_PERMANENT_ADDRESS */
s8 sme_get_permanent_mac_addr(void *pcore_data, u8 *pmac_addr);
/* OID_802_3_CURRENT_ADDRESS */
s8 sme_get_current_mac_addr(void *pcore_data, u8 *pmac_addr);
/* OID_802_11_NETWORK_TYPE_IN_USE */
s8 sme_get_network_type_in_use(void *pcore_data, u8 *ptype);
s8 sme_set_network_type_in_use(void *pcore_data, u8 type);
/* OID_802_11_SUPPORTED_RATES */
s8 sme_get_supported_rate(void *pcore_data, u8 *prates);
/* OID_802_11_ADD_WEP */
s8 sme_set_add_wep(void *pcore_data, u32 key_index, u32 key_len,
u8 *Address, u8 *key);
/* OID_802_11_REMOVE_WEP */
s8 sme_set_remove_wep(void *pcre_data, u32 key_index);
/* OID_802_11_DISASSOCIATE */
s8 sme_set_disassociate(void *pcore_data);
/* OID_802_11_POWER_MODE */
s8 sme_get_power_mode(void *pcore_data, u8 *pmode);
s8 sme_set_power_mode(void *pcore_data, u8 mode);
/* OID_802_11_BSSID_LIST_SCAN */
s8 sme_set_bssid_list_scan(void *pcore_data, void *pscan_para);
/* OID_802_11_RELOAD_DEFAULTS */
s8 sme_set_reload_defaults(void *pcore_data, u8 reload_type);
/*------------------------- non-standard ----------------------------------*/
s8 sme_get_connect_status(void *pcore_data, u8 *pstatus);
/*--------------------------------------------------------------------------*/
void sme_get_encryption_status(void *pcore_data, u8 *EncryptStatus);
void sme_set_encryption_status(void *pcore_data, u8 EncryptStatus);
s8 sme_add_key(void *pcore_data,
u32 key_index,
u8 key_len,
u8 key_type,
u8 *key_bssid,
u8 *ptx_tsc,
u8 *prx_tsc,
u8 *key_material);
void sme_remove_default_key(void *pcore_data, int index);
void sme_remove_mapping_key(void *pcore_data, u8 *pmac_addr);
void sme_clear_all_mapping_key(void *pcore_data);
void sme_clear_all_default_key(void *pcore_data);
s8 sme_set_preamble_mode(void *pcore_data, u8 mode);
s8 sme_get_preamble_mode(void *pcore_data, u8 *mode);
s8 sme_get_preamble_type(void *pcore_data, u8 *type);
s8 sme_set_slottime_mode(void *pcore_data, u8 mode);
s8 sme_get_slottime_mode(void *pcore_data, u8 *mode);
s8 sme_get_slottime_type(void *pcore_data, u8 *type);
s8 sme_set_txrate_policy(void *pcore_data, u8 policy);
s8 sme_get_txrate_policy(void *pcore_data, u8 *policy);
s8 sme_get_cwmin_value(void *pcore_data, u8 *cwmin);
s8 sme_get_cwmax_value(void *pcore_data, u16 *cwmax);
s8 sme_get_ms_radio_mode(void *pcore_data, u8 *pMsRadioOff);
s8 sme_set_ms_radio_mode(void *pcore_data, u8 boMsRadioOff);
void sme_get_tx_power_level(void *pcore_data, u32 *TxPower);
u8 sme_set_tx_power_level(void *pcore_data, u32 TxPower);
void sme_get_antenna_count(void *pcore_data, u32 *AntennaCount);
void sme_get_rx_antenna(void *pcore_data, u32 *RxAntenna);
u8 sme_set_rx_antenna(void *pcore_data, u32 RxAntenna);
void sme_get_tx_antenna(void *pcore_data, u32 *TxAntenna);
s8 sme_set_tx_antenna(void *pcore_data, u32 TxAntenna);
s8 sme_set_IBSS_chan(void *pcore_data, struct chan_info chan);
s8 sme_set_IE_append(void *pcore_data, u8 *buffer, u16 buf_len);
/* ================== Local functions ====================== */
static const u32 PowerDbToMw[] = {
56, /* mW, MAX - 0, 17.5 dbm */
40, /* mW, MAX - 1, 16.0 dbm */
30, /* mW, MAX - 2, 14.8 dbm */
20, /* mW, MAX - 3, 13.0 dbm */
15, /* mW, MAX - 4, 11.8 dbm */
12, /* mW, MAX - 5, 10.6 dbm */
9, /* mW, MAX - 6, 9.4 dbm */
7, /* mW, MAX - 7, 8.3 dbm */
5, /* mW, MAX - 8, 6.4 dbm */
4, /* mW, MAX - 9, 5.3 dbm */
3, /* mW, MAX - 10, 4.0 dbm */
2, /* mW, MAX - 11, ? dbm */
2, /* mW, MAX - 12, ? dbm */
2, /* mW, MAX - 13, ? dbm */
2, /* mW, MAX - 14, ? dbm */
2, /* mW, MAX - 15, ? dbm */
2, /* mW, MAX - 16, ? dbm */
2, /* mW, MAX - 17, ? dbm */
2, /* mW, MAX - 18, ? dbm */
1, /* mW, MAX - 19, ? dbm */
1, /* mW, MAX - 20, ? dbm */
1, /* mW, MAX - 21, ? dbm */
1, /* mW, MAX - 22, ? dbm */
1, /* mW, MAX - 23, ? dbm */
1, /* mW, MAX - 24, ? dbm */
1, /* mW, MAX - 25, ? dbm */
1, /* mW, MAX - 26, ? dbm */
1, /* mW, MAX - 27, ? dbm */
1, /* mW, MAX - 28, ? dbm */
1, /* mW, MAX - 29, ? dbm */
1, /* mW, MAX - 30, ? dbm */
1 /* mW, MAX - 31, ? dbm */
};
#endif /* __SME_API_H__ */

806
drivers/staging/winbond/wb35reg.c
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#include "wb35reg_f.h"
#include "phy_calibration.h"
#include <linux/usb.h>
#include <linux/slab.h>
/*
* true : read command process successfully
* false : register not support
* RegisterNo : start base
* pRegisterData : data point
* NumberOfData : number of register data
* Flag : AUTO_INCREMENT - RegisterNo will auto increment 4
* NO_INCREMENT - Function will write data into the same register
*/
unsigned char Wb35Reg_BurstWrite(struct hw_data *pHwData, u16 RegisterNo,
u32 *pRegisterData, u8 NumberOfData, u8 Flag)
{
struct wb35_reg *reg = &pHwData->reg;
struct urb *urb = NULL;
struct wb35_reg_queue *reg_queue = NULL;
u16 UrbSize;
struct usb_ctrlrequest *dr;
u16 i, DataSize = NumberOfData * 4;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
/* Trying to use burst write function if use new hardware */
UrbSize = sizeof(struct wb35_reg_queue) + DataSize + sizeof(struct usb_ctrlrequest);
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
if (reg_queue == NULL)
return false;
urb = usb_alloc_urb(0, GFP_ATOMIC);
if (urb == NULL) {
kfree(reg_queue);
return false;
}
reg_queue->DIRECT = 2; /* burst write register */
reg_queue->INDEX = RegisterNo;
reg_queue->pBuffer = (u32 *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
memcpy(reg_queue->pBuffer, pRegisterData, DataSize);
/* the function for reversing register data from little endian to big endian */
for (i = 0; i < NumberOfData; i++)
reg_queue->pBuffer[i] = cpu_to_le32(reg_queue->pBuffer[i]);
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue) + DataSize);
dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
dr->bRequest = 0x04; /* USB or vendor-defined request code, burst mode */
dr->wValue = cpu_to_le16(Flag); /* 0: Register number auto-increment, 1: No auto increment */
dr->wIndex = cpu_to_le16(RegisterNo);
dr->wLength = cpu_to_le16(DataSize);
reg_queue->Next = NULL;
reg_queue->pUsbReq = dr;
reg_queue->urb = urb;
spin_lock_irq(&reg->EP0VM_spin_lock);
if (reg->reg_first == NULL)
reg->reg_first = reg_queue;
else
reg->reg_last->Next = reg_queue;
reg->reg_last = reg_queue;
spin_unlock_irq(&reg->EP0VM_spin_lock);
/* Start EP0VM */
Wb35Reg_EP0VM_start(pHwData);
return true;
}
void Wb35Reg_Update(struct hw_data *pHwData, u16 RegisterNo, u32 RegisterValue)
{
struct wb35_reg *reg = &pHwData->reg;
switch (RegisterNo) {
case 0x3b0:
reg->U1B0 = RegisterValue;
break;
case 0x3bc:
reg->U1BC_LEDConfigure = RegisterValue;
break;
case 0x400:
reg->D00_DmaControl = RegisterValue;
break;
case 0x800:
reg->M00_MacControl = RegisterValue;
break;
case 0x804:
reg->M04_MulticastAddress1 = RegisterValue;
break;
case 0x808:
reg->M08_MulticastAddress2 = RegisterValue;
break;
case 0x824:
reg->M24_MacControl = RegisterValue;
break;
case 0x828:
reg->M28_MacControl = RegisterValue;
break;
case 0x82c:
reg->M2C_MacControl = RegisterValue;
break;
case 0x838:
reg->M38_MacControl = RegisterValue;
break;
case 0x840:
reg->M40_MacControl = RegisterValue;
break;
case 0x844:
reg->M44_MacControl = RegisterValue;
break;
case 0x848:
reg->M48_MacControl = RegisterValue;
break;
case 0x84c:
reg->M4C_MacStatus = RegisterValue;
break;
case 0x860:
reg->M60_MacControl = RegisterValue;
break;
case 0x868:
reg->M68_MacControl = RegisterValue;
break;
case 0x870:
reg->M70_MacControl = RegisterValue;
break;
case 0x874:
reg->M74_MacControl = RegisterValue;
break;
case 0x878:
reg->M78_ERPInformation = RegisterValue;
break;
case 0x87C:
reg->M7C_MacControl = RegisterValue;
break;
case 0x880:
reg->M80_MacControl = RegisterValue;
break;
case 0x884:
reg->M84_MacControl = RegisterValue;
break;
case 0x888:
reg->M88_MacControl = RegisterValue;
break;
case 0x898:
reg->M98_MacControl = RegisterValue;
break;
case 0x100c:
reg->BB0C = RegisterValue;
break;
case 0x102c:
reg->BB2C = RegisterValue;
break;
case 0x1030:
reg->BB30 = RegisterValue;
break;
case 0x103c:
reg->BB3C = RegisterValue;
break;
case 0x1048:
reg->BB48 = RegisterValue;
break;
case 0x104c:
reg->BB4C = RegisterValue;
break;
case 0x1050:
reg->BB50 = RegisterValue;
break;
case 0x1054:
reg->BB54 = RegisterValue;
break;
case 0x1058:
reg->BB58 = RegisterValue;
break;
case 0x105c:
reg->BB5C = RegisterValue;
break;
case 0x1060:
reg->BB60 = RegisterValue;
break;
}
}
/*
* true : read command process successfully
* false : register not support
*/
unsigned char Wb35Reg_WriteSync(struct hw_data *pHwData, u16 RegisterNo,
u32 RegisterValue)
{
struct wb35_reg *reg = &pHwData->reg;
int ret = -1;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
RegisterValue = cpu_to_le32(RegisterValue);
/* update the register by send usb message */
reg->SyncIoPause = 1;
/* Wait until EP0VM stop */
while (reg->EP0vm_state != VM_STOP)
msleep(10);
/* Sync IoCallDriver */
reg->EP0vm_state = VM_RUNNING;
ret = usb_control_msg(pHwData->udev,
usb_sndctrlpipe(pHwData->udev, 0),
0x03,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
0x0, RegisterNo, &RegisterValue, 4, HZ * 100);
reg->EP0vm_state = VM_STOP;
reg->SyncIoPause = 0;
Wb35Reg_EP0VM_start(pHwData);
if (ret < 0) {
pr_debug("EP0 Write register usb message sending error\n");
pHwData->SurpriseRemove = 1;
return false;
}
return true;
}
/*
* true : read command process successfully
* false : register not support
*/
unsigned char Wb35Reg_Write(struct hw_data *pHwData, u16 RegisterNo,
u32 RegisterValue)
{
struct wb35_reg *reg = &pHwData->reg;
struct usb_ctrlrequest *dr;
struct urb *urb = NULL;
struct wb35_reg_queue *reg_queue = NULL;
u16 UrbSize;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
/* update the register by send urb request */
UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
if (reg_queue == NULL)
return false;
urb = usb_alloc_urb(0, GFP_ATOMIC);
if (urb == NULL) {
kfree(reg_queue);
return false;
}
reg_queue->DIRECT = 1; /* burst write register */
reg_queue->INDEX = RegisterNo;
reg_queue->VALUE = cpu_to_le32(RegisterValue);
reg_queue->RESERVED_VALID = false;
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
dr->wValue = cpu_to_le16(0x0);
dr->wIndex = cpu_to_le16(RegisterNo);
dr->wLength = cpu_to_le16(4);
/* Enter the sending queue */
reg_queue->Next = NULL;
reg_queue->pUsbReq = dr;
reg_queue->urb = urb;
spin_lock_irq(&reg->EP0VM_spin_lock);
if (reg->reg_first == NULL)
reg->reg_first = reg_queue;
else
reg->reg_last->Next = reg_queue;
reg->reg_last = reg_queue;
spin_unlock_irq(&reg->EP0VM_spin_lock);
/* Start EP0VM */
Wb35Reg_EP0VM_start(pHwData);
return true;
}
/*
* This command will be executed with a user defined value. When it completes,
* this value is useful. For example, hal_set_current_channel will use it.
* true : read command process successfully
* false : register not supported
*/
unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *pHwData,
u16 RegisterNo,
u32 RegisterValue,
s8 *pValue,
s8 Len)
{
struct wb35_reg *reg = &pHwData->reg;
struct usb_ctrlrequest *dr;
struct urb *urb = NULL;
struct wb35_reg_queue *reg_queue = NULL;
u16 UrbSize;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
/* update the register by send urb request */
UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
if (reg_queue == NULL)
return false;
urb = usb_alloc_urb(0, GFP_ATOMIC);
if (urb == NULL) {
kfree(reg_queue);
return false;
}
reg_queue->DIRECT = 1; /* burst write register */
reg_queue->INDEX = RegisterNo;
reg_queue->VALUE = cpu_to_le32(RegisterValue);
/* NOTE : Users must guarantee the size of value will not exceed the buffer size. */
memcpy(reg_queue->RESERVED, pValue, Len);
reg_queue->RESERVED_VALID = true;
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
dr->bRequestType = USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE;
dr->bRequest = 0x03; /* USB or vendor-defined request code, burst mode */
dr->wValue = cpu_to_le16(0x0);
dr->wIndex = cpu_to_le16(RegisterNo);
dr->wLength = cpu_to_le16(4);
/* Enter the sending queue */
reg_queue->Next = NULL;
reg_queue->pUsbReq = dr;
reg_queue->urb = urb;
spin_lock_irq(&reg->EP0VM_spin_lock);
if (reg->reg_first == NULL)
reg->reg_first = reg_queue;
else
reg->reg_last->Next = reg_queue;
reg->reg_last = reg_queue;
spin_unlock_irq(&reg->EP0VM_spin_lock);
/* Start EP0VM */
Wb35Reg_EP0VM_start(pHwData);
return true;
}
/*
* true : read command process successfully
* false : register not support
* pRegisterValue : It must be a resident buffer due to
* asynchronous read register.
*/
unsigned char Wb35Reg_ReadSync(struct hw_data *pHwData, u16 RegisterNo,
u32 *pRegisterValue)
{
struct wb35_reg *reg = &pHwData->reg;
u32 *pltmp = pRegisterValue;
int ret = -1;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
/* Read the register by send usb message */
reg->SyncIoPause = 1;
/* Wait until EP0VM stop */
while (reg->EP0vm_state != VM_STOP)
msleep(10);
reg->EP0vm_state = VM_RUNNING;
ret = usb_control_msg(pHwData->udev,
usb_rcvctrlpipe(pHwData->udev, 0),
0x01,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
0x0, RegisterNo, pltmp, 4, HZ * 100);
*pRegisterValue = cpu_to_le32(*pltmp);
reg->EP0vm_state = VM_STOP;
Wb35Reg_Update(pHwData, RegisterNo, *pRegisterValue);
reg->SyncIoPause = 0;
Wb35Reg_EP0VM_start(pHwData);
if (ret < 0) {
pr_debug("EP0 Read register usb message sending error\n");
pHwData->SurpriseRemove = 1;
return false;
}
return true;
}
/*
* true : read command process successfully
* false : register not support
* pRegisterValue : It must be a resident buffer due to
* asynchronous read register.
*/
unsigned char Wb35Reg_Read(struct hw_data *pHwData, u16 RegisterNo,
u32 *pRegisterValue)
{
struct wb35_reg *reg = &pHwData->reg;
struct usb_ctrlrequest *dr;
struct urb *urb;
struct wb35_reg_queue *reg_queue;
u16 UrbSize;
/* Module shutdown */
if (pHwData->SurpriseRemove)
return false;
/* update the variable by send Urb to read register */
UrbSize = sizeof(struct wb35_reg_queue) + sizeof(struct usb_ctrlrequest);
reg_queue = kzalloc(UrbSize, GFP_ATOMIC);
if (reg_queue == NULL)
return false;
urb = usb_alloc_urb(0, GFP_ATOMIC);
if (urb == NULL) {
kfree(reg_queue);
return false;
}
reg_queue->DIRECT = 0; /* read register */
reg_queue->INDEX = RegisterNo;
reg_queue->pBuffer = pRegisterValue;
dr = (struct usb_ctrlrequest *)((u8 *)reg_queue + sizeof(struct wb35_reg_queue));
dr->bRequestType = USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN;
dr->bRequest = 0x01; /* USB or vendor-defined request code, burst mode */
dr->wValue = cpu_to_le16(0x0);
dr->wIndex = cpu_to_le16(RegisterNo);
dr->wLength = cpu_to_le16(4);
/* Enter the sending queue */
reg_queue->Next = NULL;
reg_queue->pUsbReq = dr;
reg_queue->urb = urb;
spin_lock_irq(&reg->EP0VM_spin_lock);
if (reg->reg_first == NULL)
reg->reg_first = reg_queue;
else
reg->reg_last->Next = reg_queue;
reg->reg_last = reg_queue;
spin_unlock_irq(&reg->EP0VM_spin_lock);
/* Start EP0VM */
Wb35Reg_EP0VM_start(pHwData);
return true;
}
void Wb35Reg_EP0VM_start(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
if (atomic_inc_return(&reg->RegFireCount) == 1) {
reg->EP0vm_state = VM_RUNNING;
Wb35Reg_EP0VM(pHwData);
} else
atomic_dec(&reg->RegFireCount);
}
void Wb35Reg_EP0VM(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
struct urb *urb;
struct usb_ctrlrequest *dr;
u32 *pBuffer;
int ret = -1;
struct wb35_reg_queue *reg_queue;
if (reg->SyncIoPause)
goto cleanup;
if (pHwData->SurpriseRemove)
goto cleanup;
/* Get the register data and send to USB through Irp */
spin_lock_irq(&reg->EP0VM_spin_lock);
reg_queue = reg->reg_first;
spin_unlock_irq(&reg->EP0VM_spin_lock);
if (!reg_queue)
goto cleanup;
/* Get an Urb, send it */
urb = (struct urb *)reg_queue->urb;
dr = reg_queue->pUsbReq;
urb = reg_queue->urb;
pBuffer = reg_queue->pBuffer;
if (reg_queue->DIRECT == 1) /* output */
pBuffer = &reg_queue->VALUE;
usb_fill_control_urb(urb, pHwData->udev,
REG_DIRECTION(pHwData->udev, reg_queue),
(u8 *)dr, pBuffer, cpu_to_le16(dr->wLength),
Wb35Reg_EP0VM_complete, (void *)pHwData);
reg->EP0vm_state = VM_RUNNING;
ret = usb_submit_urb(urb, GFP_ATOMIC);
if (ret < 0) {
pr_debug("EP0 Irp sending error\n");
goto cleanup;
}
return;
cleanup:
reg->EP0vm_state = VM_STOP;
atomic_dec(&reg->RegFireCount);
}
void Wb35Reg_EP0VM_complete(struct urb *urb)
{
struct hw_data *pHwData = (struct hw_data *)urb->context;
struct wb35_reg *reg = &pHwData->reg;
struct wb35_reg_queue *reg_queue;
/* Variable setting */
reg->EP0vm_state = VM_COMPLETED;
reg->EP0VM_status = urb->status;
if (pHwData->SurpriseRemove) { /* Let WbWlanHalt to handle surprise remove */
reg->EP0vm_state = VM_STOP;
atomic_dec(&reg->RegFireCount);
} else {
/* Complete to send, remove the URB from the first */
spin_lock_irq(&reg->EP0VM_spin_lock);
reg_queue = reg->reg_first;
if (reg_queue == reg->reg_last)
reg->reg_last = NULL;
reg->reg_first = reg->reg_first->Next;
spin_unlock_irq(&reg->EP0VM_spin_lock);
if (reg->EP0VM_status) {
pr_debug("EP0 IoCompleteRoutine return error\n");
reg->EP0vm_state = VM_STOP;
pHwData->SurpriseRemove = 1;
} else {
/* Success. Update the result */
/* Start the next send */
Wb35Reg_EP0VM(pHwData);
}
kfree(reg_queue);
}
usb_free_urb(urb);
}
void Wb35Reg_destroy(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
struct urb *urb;
struct wb35_reg_queue *reg_queue;
Uxx_power_off_procedure(pHwData);
/* Wait for Reg operation completed */
do {
msleep(10); /* Delay for waiting function enter */
} while (reg->EP0vm_state != VM_STOP);
msleep(10); /* Delay for waiting function enter */
/* Release all the data in RegQueue */
spin_lock_irq(&reg->EP0VM_spin_lock);
reg_queue = reg->reg_first;
while (reg_queue) {
if (reg_queue == reg->reg_last)
reg->reg_last = NULL;
reg->reg_first = reg->reg_first->Next;
urb = reg_queue->urb;
spin_unlock_irq(&reg->EP0VM_spin_lock);
if (urb) {
usb_free_urb(urb);
kfree(reg_queue);
} else {
pr_debug("EP0 queue release error\n");
}
spin_lock_irq(&reg->EP0VM_spin_lock);
reg_queue = reg->reg_first;
}
spin_unlock_irq(&reg->EP0VM_spin_lock);
}
/*
* =======================================================================
* The function can be run in passive-level only.
* =========================================================================
*/
unsigned char Wb35Reg_initial(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
u32 ltmp;
u32 SoftwareSet, VCO_trim, TxVga, Region_ScanInterval;
/* Spin lock is acquired for read and write IRP command */
spin_lock_init(&reg->EP0VM_spin_lock);
/* Getting RF module type from EEPROM */
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x080d0000); /* Start EEPROM access + Read + address(0x0d) */
Wb35Reg_ReadSync(pHwData, 0x03b4, &ltmp);
/* Update RF module type and determine the PHY type by inf or EEPROM */
reg->EEPROMPhyType = (u8)(ltmp & 0xff);
/*
* 0 V MAX2825, 1 V MAX2827, 2 V MAX2828, 3 V MAX2829
* 16V AL2230, 17 - AL7230, 18 - AL2230S
* 32 Reserved
* 33 - W89RF242(TxVGA 0~19), 34 - W89RF242(TxVGA 0~34)
*/
if (reg->EEPROMPhyType != RF_DECIDE_BY_INF) {
if ((reg->EEPROMPhyType == RF_MAXIM_2825) ||
(reg->EEPROMPhyType == RF_MAXIM_2827) ||
(reg->EEPROMPhyType == RF_MAXIM_2828) ||
(reg->EEPROMPhyType == RF_MAXIM_2829) ||
(reg->EEPROMPhyType == RF_MAXIM_V1) ||
(reg->EEPROMPhyType == RF_AIROHA_2230) ||
(reg->EEPROMPhyType == RF_AIROHA_2230S) ||
(reg->EEPROMPhyType == RF_AIROHA_7230) ||
(reg->EEPROMPhyType == RF_WB_242) ||
(reg->EEPROMPhyType == RF_WB_242_1))
pHwData->phy_type = reg->EEPROMPhyType;
}
/* Power On procedure running. The relative parameter will be set according to phy_type */
Uxx_power_on_procedure(pHwData);
/* Reading MAC address */
Uxx_ReadEthernetAddress(pHwData);
/* Read VCO trim for RF parameter */
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08200000);
Wb35Reg_ReadSync(pHwData, 0x03b4, &VCO_trim);
/* Read Antenna On/Off of software flag */
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08210000);
Wb35Reg_ReadSync(pHwData, 0x03b4, &SoftwareSet);
/* Read TXVGA */
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x08100000);
Wb35Reg_ReadSync(pHwData, 0x03b4, &TxVga);
/* Get Scan interval setting from EEPROM offset 0x1c */
Wb35Reg_WriteSync(pHwData, 0x03b4, 0x081d0000);
Wb35Reg_ReadSync(pHwData, 0x03b4, &Region_ScanInterval);
/* Update Ethernet address */
memcpy(pHwData->CurrentMacAddress, pHwData->PermanentMacAddress, ETH_ALEN);
/* Update software variable */
pHwData->SoftwareSet = (u16)(SoftwareSet & 0xffff);
TxVga &= 0x000000ff;
pHwData->PowerIndexFromEEPROM = (u8)TxVga;
pHwData->VCO_trim = (u8)VCO_trim & 0xff;
if (pHwData->VCO_trim == 0xff)
pHwData->VCO_trim = 0x28;
reg->EEPROMRegion = (u8)(Region_ScanInterval >> 8);
if (reg->EEPROMRegion < 1 || reg->EEPROMRegion > 6)
reg->EEPROMRegion = REGION_AUTO;
/* For Get Tx VGA from EEPROM */
GetTxVgaFromEEPROM(pHwData);
/* Set Scan Interval */
pHwData->Scan_Interval = (u8)(Region_ScanInterval & 0xff) * 10;
if ((pHwData->Scan_Interval == 2550) || (pHwData->Scan_Interval < 10)) /* Is default setting 0xff * 10 */
pHwData->Scan_Interval = SCAN_MAX_CHNL_TIME;
/* Initial register */
RFSynthesizer_initial(pHwData);
BBProcessor_initial(pHwData); /* Async write, must wait until complete */
Wb35Reg_phy_calibration(pHwData);
Mxx_initial(pHwData);
Dxx_initial(pHwData);
if (pHwData->SurpriseRemove)
return false;
else
return true; /* Initial fail */
}
/*
* ================================================================
* CardComputeCrc --
*
* Description:
* Runs the AUTODIN II CRC algorithm on the buffers Buffer length.
*
* Arguments:
* Buffer - the input buffer
* Length - the length of Buffer
*
* Return Value:
* The 32-bit CRC value.
* ===================================================================
*/
u32 CardComputeCrc(u8 *Buffer, u32 Length)
{
u32 Crc, Carry;
u32 i, j;
u8 CurByte;
Crc = 0xffffffff;
for (i = 0; i < Length; i++) {
CurByte = Buffer[i];
for (j = 0; j < 8; j++) {
Carry = ((Crc & 0x80000000) ? 1 : 0) ^ (CurByte & 0x01);
Crc <<= 1;
CurByte >>= 1;
if (Carry)
Crc = (Crc ^ 0x04c11db6) | Carry;
}
}
return Crc;
}
/*
* ==================================================================
* BitReverse --
* Reverse the bits in the input argument, dwData, which is
* regarded as a string of bits with the length, DataLength.
*
* Arguments:
* dwData :
* DataLength :
*
* Return:
* The converted value.
* ==================================================================
*/
u32 BitReverse(u32 dwData, u32 DataLength)
{
u32 HalfLength, i, j;
u32 BitA, BitB;
if (DataLength <= 0)
return 0; /* No conversion is done. */
dwData = dwData & (0xffffffff >> (32 - DataLength));
HalfLength = DataLength / 2;
for (i = 0, j = DataLength - 1; i < HalfLength; i++, j--) {
BitA = GetBit(dwData, i);
BitB = GetBit(dwData, j);
if (BitA && !BitB) {
dwData = ClearBit(dwData, i);
dwData = SetBit(dwData, j);
} else if (!BitA && BitB) {
dwData = SetBit(dwData, i);
dwData = ClearBit(dwData, j);
} else {
/* Do nothing since these two bits are of the save values. */
}
}
return dwData;
}
void Wb35Reg_phy_calibration(struct hw_data *pHwData)
{
u32 BB3c, BB54;
if ((pHwData->phy_type == RF_WB_242) ||
(pHwData->phy_type == RF_WB_242_1)) {
phy_calibration_winbond(pHwData, 2412); /* Sync operation */
Wb35Reg_ReadSync(pHwData, 0x103c, &BB3c);
Wb35Reg_ReadSync(pHwData, 0x1054, &BB54);
pHwData->BB3c_cal = BB3c;
pHwData->BB54_cal = BB54;
RFSynthesizer_initial(pHwData);
BBProcessor_initial(pHwData); /* Async operation */
Wb35Reg_WriteSync(pHwData, 0x103c, BB3c);
Wb35Reg_WriteSync(pHwData, 0x1054, BB54);
}
}

65
drivers/staging/winbond/wb35reg_f.h
View File

@ -1,65 +0,0 @@
#ifndef __WINBOND_WB35REG_F_H
#define __WINBOND_WB35REG_F_H
#include "wbhal.h"
/*
* ====================================
* Interface function declare
* ====================================
*/
unsigned char Wb35Reg_initial(struct hw_data *hw_data);
void Uxx_power_on_procedure(struct hw_data *hw_data);
void Uxx_power_off_procedure(struct hw_data *hw_data);
void Uxx_ReadEthernetAddress(struct hw_data *hw_data);
void Dxx_initial(struct hw_data *hw_data);
void Mxx_initial(struct hw_data *hw_data);
void RFSynthesizer_initial(struct hw_data *hw_data);
void RFSynthesizer_SwitchingChannel(struct hw_data *hw_data, struct chan_info channel);
void BBProcessor_initial(struct hw_data *hw_data);
void BBProcessor_RateChanging(struct hw_data *hw_data, u8 rate);
u8 RFSynthesizer_SetPowerIndex(struct hw_data *hw_data, u8 power_index);
u8 RFSynthesizer_SetMaxim2828_24Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2828_50Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2827_24Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2827_50Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetMaxim2825Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetAiroha2230Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetAiroha7230Power(struct hw_data *, u8 index);
u8 RFSynthesizer_SetWinbond242Power(struct hw_data *, u8 index);
void GetTxVgaFromEEPROM(struct hw_data *hw_data);
void EEPROMTxVgaAdjust(struct hw_data *hw_data);
#define RFWriteControlData(_A, _V) Wb35Reg_Write(_A, 0x0864, _V)
void Wb35Reg_destroy(struct hw_data *hw_data);
unsigned char Wb35Reg_Read(struct hw_data *hw_data, u16 register_no, u32 *register_value);
unsigned char Wb35Reg_ReadSync(struct hw_data *hw_data, u16 register_no, u32 *register_value);
unsigned char Wb35Reg_Write(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char Wb35Reg_WriteSync(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char Wb35Reg_WriteWithCallbackValue(struct hw_data *hw_data,
u16 register_no,
u32 register_value,
s8 *value,
s8 len);
unsigned char Wb35Reg_BurstWrite(struct hw_data *hw_data,
u16 register_no,
u32 *register_data,
u8 number_of_data,
u8 flag);
void Wb35Reg_EP0VM(struct hw_data *hw_data);
void Wb35Reg_EP0VM_start(struct hw_data *hw_data);
void Wb35Reg_EP0VM_complete(struct urb *urb);
u32 BitReverse(u32 data, u32 data_length);
void CardGetMulticastBit(u8 address[MAC_ADDR_LENGTH], u8 *byte, u8 *value);
u32 CardComputeCrc(u8 *buffer, u32 length);
void Wb35Reg_phy_calibration(struct hw_data *hw_data);
void Wb35Reg_Update(struct hw_data *hw_data, u16 register_no, u32 register_value);
unsigned char adjust_TXVGA_for_iq_mag(struct hw_data *hw_data);
#endif

240
drivers/staging/winbond/wb35reg_s.h
View File

@ -1,240 +0,0 @@
#ifndef __WINBOND_WB35REG_S_H
#define __WINBOND_WB35REG_S_H
#include <linux/spinlock.h>
#include <linux/types.h>
#include <linux/atomic.h>
struct hw_data;
/* =========================================================================
*
* HAL setting function
*
* ========================================
* |Uxx| |Dxx| |Mxx| |BB| |RF|
* ========================================
* | |
* Wb35Reg_Read Wb35Reg_Write
*
* ----------------------------------------
* WbUsb_CallUSBDASync supplied By WbUsb module
* ==========================================================================
*/
#define GetBit(dwData, i) (dwData & (0x00000001 << i))
#define SetBit(dwData, i) (dwData | (0x00000001 << i))
#define ClearBit(dwData, i) (dwData & ~(0x00000001 << i))
#define IGNORE_INCREMENT 0
#define AUTO_INCREMENT 0
#define NO_INCREMENT 1
#define REG_DIRECTION(_x, _y) ((_y)->DIRECT == 0 ? usb_rcvctrlpipe(_x, 0) : usb_sndctrlpipe(_x, 0))
#define REG_BUF_SIZE(_x) ((_x)->bRequest == 0x04 ? cpu_to_le16((_x)->wLength) : 4)
#define BB48_DEFAULT_AL2230_11B 0x0033447c
#define BB4C_DEFAULT_AL2230_11B 0x0A00FEFF
#define BB48_DEFAULT_AL2230_11G 0x00332C1B
#define BB4C_DEFAULT_AL2230_11G 0x0A00FEFF
#define BB48_DEFAULT_WB242_11B 0x00292315 /* backoff 2dB */
#define BB4C_DEFAULT_WB242_11B 0x0800FEFF /* backoff 2dB */
#define BB48_DEFAULT_WB242_11G 0x00453B24
#define BB4C_DEFAULT_WB242_11G 0x0E00FEFF
/*
* ====================================
* Default setting for Mxx
* ====================================
*/
#define DEFAULT_CWMIN 31 /* (M2C) CWmin. Its value is in the range 0-31. */
#define DEFAULT_CWMAX 1023 /* (M2C) CWmax. Its value is in the range 0-1023. */
#define DEFAULT_AID 1 /* (M34) AID. Its value is in the range 1-2007. */
#define DEFAULT_RATE_RETRY_LIMIT 2 /* (M38) as named */
#define DEFAULT_LONG_RETRY_LIMIT 7 /* (M38) LongRetryLimit. Its value is in the range 0-15. */
#define DEFAULT_SHORT_RETRY_LIMIT 7 /* (M38) ShortRetryLimit. Its value is in the range 0-15. */
#define DEFAULT_PIFST 25 /* (M3C) PIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_EIFST 354 /* (M3C) EIFS Time. Its value is in the range 0-1048575. */
#define DEFAULT_DIFST 45 /* (M3C) DIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_SIFST 5 /* (M3C) SIFS Time. Its value is in the range 0-65535. */
#define DEFAULT_OSIFST 10 /* (M3C) Original SIFS Time. Its value is in the range 0-15. */
#define DEFAULT_ATIMWD 0 /* (M40) ATIM Window. Its value is in the range 0-65535. */
#define DEFAULT_SLOT_TIME 20 /* (M40) ($) SlotTime. Its value is in the range 0-255. */
#define DEFAULT_MAX_TX_MSDU_LIFE_TIME 512 /* (M44) MaxTxMSDULifeTime. Its value is in the range 0-4294967295. */
#define DEFAULT_BEACON_INTERVAL 500 /* (M48) Beacon Interval. Its value is in the range 0-65535. */
#define DEFAULT_PROBE_DELAY_TIME 200 /* (M48) Probe Delay Time. Its value is in the range 0-65535. */
#define DEFAULT_PROTOCOL_VERSION 0 /* (M4C) */
#define DEFAULT_MAC_POWER_STATE 2 /* (M4C) 2: MAC at power active */
#define DEFAULT_DTIM_ALERT_TIME 0
struct wb35_reg_queue {
struct urb *urb;
void *pUsbReq;
void *Next;
union {
u32 VALUE;
u32 *pBuffer;
};
u8 RESERVED[4]; /* space reserved for communication */
u16 INDEX; /* For storing the register index */
u8 RESERVED_VALID; /* Indicate whether the RESERVED space is valid at this command. */
u8 DIRECT; /* 0:In 1:Out */
};
/*
* ====================================
* Internal variable for module
* ====================================
*/
#define MAX_SQ3_FILTER_SIZE 5
struct wb35_reg {
/*
* ============================
* Register Bank backup
* ============================
*/
u32 U1B0; /* bit16 record the h/w radio on/off status */
u32 U1BC_LEDConfigure;
u32 D00_DmaControl;
u32 M00_MacControl;
union {
struct {
u32 M04_MulticastAddress1;
u32 M08_MulticastAddress2;
};
u8 Multicast[8]; /* contents of card multicast registers */
};
u32 M24_MacControl;
u32 M28_MacControl;
u32 M2C_MacControl;
u32 M38_MacControl;
u32 M3C_MacControl;
u32 M40_MacControl;
u32 M44_MacControl;
u32 M48_MacControl;
u32 M4C_MacStatus;
u32 M60_MacControl;
u32 M68_MacControl;
u32 M70_MacControl;
u32 M74_MacControl;
u32 M78_ERPInformation;
u32 M7C_MacControl;
u32 M80_MacControl;
u32 M84_MacControl;
u32 M88_MacControl;
u32 M98_MacControl;
/* Baseband register */
u32 BB0C; /* Used for LNA calculation */
u32 BB2C;
u32 BB30; /* 11b acquisition control register */
u32 BB3C;
u32 BB48;
u32 BB4C;
u32 BB50; /* mode control register */
u32 BB54;
u32 BB58; /* IQ_ALPHA */
u32 BB5C; /* For test */
u32 BB60; /* for WTO read value */
/* VM */
spinlock_t EP0VM_spin_lock; /* 4B */
u32 EP0VM_status; /* $$ */
struct wb35_reg_queue *reg_first;
struct wb35_reg_queue *reg_last;
atomic_t RegFireCount;
/* Hardware status */
u8 EP0vm_state;
u8 mac_power_save;
u8 EEPROMPhyType; /*
* 0 ~ 15 for Maxim (0 ĄV MAX2825, 1 ĄV MAX2827, 2 ĄV MAX2828, 3 ĄV MAX2829),
* 16 ~ 31 for Airoha (16 ĄV AL2230, 11 - AL7230)
* 32 ~ Reserved
* 33 ~ 47 For WB242 ( 33 - WB242, 34 - WB242 with new Txvga 0.5 db step)
* 48 ~ 255 ARE RESERVED.
*/
u8 EEPROMRegion; /* Region setting in EEPROM */
u32 SyncIoPause; /* If user use the Sync Io to access Hw, then pause the async access */
u8 LNAValue[4]; /* Table for speed up running */
u32 SQ3_filter[MAX_SQ3_FILTER_SIZE];
u32 SQ3_index;
};
/* =====================================================================
* Function declaration
* =====================================================================
*/
void hal_remove_mapping_key(struct hw_data *hw_data, u8 *mac_addr);
void hal_remove_default_key(struct hw_data *hw_data, u32 index);
unsigned char hal_set_mapping_key(struct hw_data *adapter, u8 *mac_addr,
u8 null_key, u8 wep_on, u8 *tx_tsc,
u8 *rx_tsc, u8 key_type, u8 key_len,
u8 *key_data);
unsigned char hal_set_default_key(struct hw_data *adapter, u8 index,
u8 null_key, u8 wep_on, u8 *tx_tsc,
u8 *rx_tsc, u8 key_type, u8 key_len,
u8 *key_data);
void hal_clear_all_default_key(struct hw_data *hw_data);
void hal_clear_all_group_key(struct hw_data *hw_data);
void hal_clear_all_mapping_key(struct hw_data *hw_data);
void hal_clear_all_key(struct hw_data *hw_data);
void hal_set_power_save_mode(struct hw_data *hw_data, unsigned char power_save,
unsigned char wakeup, unsigned char dtim);
void hal_get_power_save_mode(struct hw_data *hw_data, u8 *in_pwr_save);
void hal_set_slot_time(struct hw_data *hw_data, u8 type);
#define hal_set_atim_window(_A, _ATM)
void hal_start_bss(struct hw_data *hw_data, u8 mac_op_mode);
/* 0:BSS STA 1:IBSS STA */
void hal_join_request(struct hw_data *hw_data, u8 bss_type);
void hal_stop_sync_bss(struct hw_data *hw_data);
void hal_resume_sync_bss(struct hw_data *hw_data);
void hal_set_aid(struct hw_data *hw_data, u16 aid);
void hal_set_bssid(struct hw_data *hw_data, u8 *bssid);
void hal_get_bssid(struct hw_data *hw_data, u8 *bssid);
void hal_set_listen_interval(struct hw_data *hw_data, u16 listen_interval);
void hal_set_cap_info(struct hw_data *hw_data, u16 capability_info);
void hal_set_ssid(struct hw_data *hw_data, u8 *ssid, u8 ssid_len);
void hal_start_tx0(struct hw_data *hw_data);
#define hal_get_cwmin(_A) ((_A)->cwmin)
void hal_set_cwmax(struct hw_data *hw_data, u16 cwin_max);
#define hal_get_cwmax(_A) ((_A)->cwmax)
void hal_set_rsn_wpa(struct hw_data *hw_data, u32 *rsn_ie_bitmap,
u32 *rsn_oui_type , unsigned char desired_auth_mode);
void hal_set_connect_info(struct hw_data *hw_data, unsigned char bo_connect);
u8 hal_get_est_sq3(struct hw_data *hw_data, u8 count);
void hal_descriptor_indicate(struct hw_data *hw_data,
struct wb35_descriptor *des);
u8 hal_get_antenna_number(struct hw_data *hw_data);
u32 hal_get_bss_pk_cnt(struct hw_data *hw_data);
#define hal_get_region_from_EEPROM(_A) ((_A)->reg.EEPROMRegion)
#define hal_get_tx_buffer(_A, _B) Wb35Tx_get_tx_buffer(_A, _B)
#define hal_software_set(_A) (_A->SoftwareSet)
#define hal_driver_init_OK(_A) (_A->IsInitOK)
#define hal_rssi_boundary_high(_A) (_A->RSSI_high)
#define hal_rssi_boundary_low(_A) (_A->RSSI_low)
#define hal_scan_interval(_A) (_A->Scan_Interval)
#define PHY_DEBUG(msg, args...)
/* return 100ms count */
#define hal_get_time_count(_P) (_P->time_count / 10)
#define hal_ibss_disconnect(_A) (hal_stop_sync_bss(_A))
#endif

358
drivers/staging/winbond/wb35rx.c
View File

@ -1,358 +0,0 @@
/*
* ============================================================================
* Copyright (c) 1996-2002 Winbond Electronic Corporation
*
* Module Name:
* Wb35Rx.c
*
* Abstract:
* Processing the Rx message from down layer
*
* ============================================================================
*/
#include <linux/usb.h>
#include <linux/slab.h>
#include "core.h"
#include "wb35rx_f.h"
static void packet_came(struct ieee80211_hw *hw, char *pRxBufferAddress,
int PacketSize)
{
struct wbsoft_priv *priv = hw->priv;
struct sk_buff *skb;
struct ieee80211_rx_status rx_status = {0};
if (!priv->enabled)
return;
skb = dev_alloc_skb(PacketSize);
if (!skb) {
printk("Not enough memory for packet, FIXME\n");
return;
}
memcpy(skb_put(skb, PacketSize), pRxBufferAddress, PacketSize);
memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
ieee80211_rx_irqsafe(hw, skb);
}
static void Wb35Rx_adjust(struct wb35_descriptor *pRxDes)
{
u32 *pRxBufferAddress;
u32 DecryptionMethod;
u32 i;
u16 BufferSize;
DecryptionMethod = pRxDes->R01.R01_decryption_method;
pRxBufferAddress = pRxDes->buffer_address[0];
BufferSize = pRxDes->buffer_size[0];
/* Adjust the last part of data. Only data left */
BufferSize -= 4; /* For CRC-32 */
if (DecryptionMethod)
BufferSize -= 4;
if (DecryptionMethod == 3) /* For CCMP */
BufferSize -= 4;
/* Adjust the IV field which after 802.11 header and ICV field. */
if (DecryptionMethod == 1) { /* For WEP */
for (i = 6; i > 0; i--)
pRxBufferAddress[i] = pRxBufferAddress[i - 1];
pRxDes->buffer_address[0] = pRxBufferAddress + 1;
BufferSize -= 4; /* 4 byte for IV */
} else if (DecryptionMethod) { /* For TKIP and CCMP */
for (i = 7; i > 1; i--)
pRxBufferAddress[i] = pRxBufferAddress[i - 2];
/* Update the descriptor, shift 8 byte */
pRxDes->buffer_address[0] = pRxBufferAddress + 2;
BufferSize -= 8; /* 8 byte for IV + ICV */
}
pRxDes->buffer_size[0] = BufferSize;
}
static u16 Wb35Rx_indicate(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_descriptor RxDes;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
u16 PacketSize;
u16 stmp, BufferSize, stmp2 = 0;
u32 RxBufferId;
/* Only one thread be allowed to run into the following */
do {
RxBufferId = pWb35Rx->RxProcessIndex;
if (pWb35Rx->RxOwner[RxBufferId]) /* Owner by VM */
break;
pWb35Rx->RxProcessIndex++;
pWb35Rx->RxProcessIndex %= MAX_USB_RX_BUFFER_NUMBER;
pRxBufferAddress = pWb35Rx->pDRx;
BufferSize = pWb35Rx->RxBufferSize[RxBufferId];
/* Parse the bulkin buffer */
while (BufferSize >= 4) {
/* Is ending? */
if ((cpu_to_le32(*(u32 *)pRxBufferAddress) & 0x0fffffff) ==
RX_END_TAG)
break;
/* Get the R00 R01 first */
RxDes.R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
PacketSize = (u16)RxDes.R00.R00_receive_byte_count;
RxDes.R01.value = le32_to_cpu(*((u32 *)(pRxBufferAddress + 4)));
/* For new DMA 4k */
if ((PacketSize & 0x03) > 0)
PacketSize -= 4;
/* Basic check for Rx length. Is length valid? */
if (PacketSize > MAX_PACKET_SIZE) {
pr_debug("Serious ERROR : Rx data size too long, size =%d\n",
PacketSize);
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->Ep3ErrorCount2++;
break;
}
/*
* Wb35Rx_indicate() is called synchronously so it isn't
* necessary to set "RxDes.Desctriptor_ID = RxBufferID;"
*/
/* subtract 8 byte for 35's USB header length */
BufferSize -= 8;
pRxBufferAddress += 8;
RxDes.buffer_address[0] = pRxBufferAddress;
RxDes.buffer_size[0] = PacketSize;
RxDes.buffer_number = 1;
RxDes.buffer_start_index = 0;
RxDes.buffer_total_size = RxDes.buffer_size[0];
Wb35Rx_adjust(&RxDes);
packet_came(hw, pRxBufferAddress, PacketSize);
/* Move RxBuffer point to the next */
stmp = PacketSize + 3;
stmp &= ~0x03; /* 4n alignment */
pRxBufferAddress += stmp;
BufferSize -= stmp;
stmp2 += stmp;
}
/* Reclaim resource */
pWb35Rx->RxOwner[RxBufferId] = 1;
} while (true);
return stmp2;
}
static void Wb35Rx(struct ieee80211_hw *hw);
static void Wb35Rx_Complete(struct urb *urb)
{
struct ieee80211_hw *hw = urb->context;
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
u32 SizeCheck;
u16 BulkLength;
u32 RxBufferId;
struct R00_descriptor R00;
/* Variable setting */
pWb35Rx->EP3vm_state = VM_COMPLETED;
pWb35Rx->EP3VM_status = urb->status; /* Store the last result of Irp */
RxBufferId = pWb35Rx->CurrentRxBufferId;
pRxBufferAddress = pWb35Rx->pDRx;
BulkLength = (u16)urb->actual_length;
/* The IRP is completed */
pWb35Rx->EP3vm_state = VM_COMPLETED;
if (pHwData->SurpriseRemove) /* Must be here, or RxBufferId is invalid */
goto error;
if (pWb35Rx->rx_halt)
goto error;
/* Start to process the data only in successful condition */
pWb35Rx->RxOwner[RxBufferId] = 0; /* Set the owner to driver */
R00.value = le32_to_cpu(*(u32 *)pRxBufferAddress);
/* The URB is completed, check the result */
if (pWb35Rx->EP3VM_status != 0) {
pr_debug("EP3 IoCompleteRoutine return error\n");
pWb35Rx->EP3vm_state = VM_STOP;
goto error;
}
/* For recovering. check if operating in single USB mode */
if (!HAL_USB_MODE_BURST(pHwData)) {
SizeCheck = R00.R00_receive_byte_count;
if ((SizeCheck & 0x03) > 0)
SizeCheck -= 4;
SizeCheck = (SizeCheck + 3) & ~0x03;
SizeCheck += 12; /* 8 + 4 badbeef */
if ((BulkLength > 1600) ||
(SizeCheck > 1600) ||
(BulkLength != SizeCheck) ||
(BulkLength == 0)) { /* Add for fail Urb */
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->Ep3ErrorCount2++;
}
}
/* Indicating the receiving data */
pWb35Rx->ByteReceived += BulkLength;
pWb35Rx->RxBufferSize[RxBufferId] = BulkLength;
if (!pWb35Rx->RxOwner[RxBufferId])
Wb35Rx_indicate(hw);
kfree(pWb35Rx->pDRx);
/* Do the next receive */
Wb35Rx(hw);
return;
error:
pWb35Rx->RxOwner[RxBufferId] = 1; /* Set the owner to hardware */
atomic_dec(&pWb35Rx->RxFireCounter);
pWb35Rx->EP3vm_state = VM_STOP;
}
/* This function cannot reentrain */
static void Wb35Rx(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u8 *pRxBufferAddress;
struct urb *urb = pWb35Rx->RxUrb;
int retv;
u32 RxBufferId;
/* Issuing URB */
if (pHwData->SurpriseRemove)
goto error;
if (pWb35Rx->rx_halt)
goto error;
/* Get RxBuffer's ID */
RxBufferId = pWb35Rx->RxBufferId;
if (!pWb35Rx->RxOwner[RxBufferId]) {
/* It's impossible to run here. */
pr_debug("Rx driver fifo unavailable\n");
goto error;
}
/* Update buffer point, then start to bulkin the data from USB */
pWb35Rx->RxBufferId++;
pWb35Rx->RxBufferId %= MAX_USB_RX_BUFFER_NUMBER;
pWb35Rx->CurrentRxBufferId = RxBufferId;
pWb35Rx->pDRx = kzalloc(MAX_USB_RX_BUFFER, GFP_ATOMIC);
if (!pWb35Rx->pDRx) {
dev_info(&hw->wiphy->dev, "w35und: Rx memory alloc failed\n");
goto error;
}
pRxBufferAddress = pWb35Rx->pDRx;
usb_fill_bulk_urb(urb, pHwData->udev,
usb_rcvbulkpipe(pHwData->udev, 3),
pRxBufferAddress, MAX_USB_RX_BUFFER,
Wb35Rx_Complete, hw);
pWb35Rx->EP3vm_state = VM_RUNNING;
retv = usb_submit_urb(urb, GFP_ATOMIC);
if (retv != 0) {
dev_info(&hw->wiphy->dev, "Rx URB sending error\n");
goto error;
}
return;
error:
/* VM stop */
pWb35Rx->EP3vm_state = VM_STOP;
atomic_dec(&pWb35Rx->RxFireCounter);
}
void Wb35Rx_start(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Allow only one thread to run into the Wb35Rx() function */
if (atomic_inc_return(&pWb35Rx->RxFireCounter) == 1) {
pWb35Rx->EP3vm_state = VM_RUNNING;
Wb35Rx(hw);
} else
atomic_dec(&pWb35Rx->RxFireCounter);
}
static void Wb35Rx_reset_descriptor(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
u32 i;
pWb35Rx->ByteReceived = 0;
pWb35Rx->RxProcessIndex = 0;
pWb35Rx->RxBufferId = 0;
pWb35Rx->EP3vm_state = VM_STOP;
pWb35Rx->rx_halt = 0;
/* Initial the Queue. The last buffer is reserved for used
* if the Rx resource is unavailable.
*/
for (i = 0; i < MAX_USB_RX_BUFFER_NUMBER; i++)
pWb35Rx->RxOwner[i] = 1;
}
unsigned char Wb35Rx_initial(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Initial the Buffer Queue */
Wb35Rx_reset_descriptor(pHwData);
pWb35Rx->RxUrb = usb_alloc_urb(0, GFP_ATOMIC);
return !!pWb35Rx->RxUrb;
}
void Wb35Rx_stop(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
/* Canceling the Irp if already sends it out. */
if (pWb35Rx->EP3vm_state == VM_RUNNING) {
/* Only use unlink, let Wb35Rx_destroy to free them */
usb_unlink_urb(pWb35Rx->RxUrb);
pr_debug("EP3 Rx stop\n");
}
}
/* Needs process context */
void Wb35Rx_destroy(struct hw_data *pHwData)
{
struct wb35_rx *pWb35Rx = &pHwData->Wb35Rx;
do {
msleep(10); /* Delay for waiting function enter */
} while (pWb35Rx->EP3vm_state != VM_STOP);
msleep(10); /* Delay for waiting function exit */
usb_free_urb(pWb35Rx->RxUrb);
pr_debug("Wb35Rx_destroy OK\n");
}

15
drivers/staging/winbond/wb35rx_f.h
View File

@ -1,15 +0,0 @@
#ifndef __WINBOND_WB35RX_F_H
#define __WINBOND_WB35RX_F_H
#include <net/mac80211.h>
#include "wbhal.h"
/*
* Interface function declaration
*/
unsigned char Wb35Rx_initial(struct hw_data *pHwData);
void Wb35Rx_destroy(struct hw_data *pHwData);
void Wb35Rx_stop(struct hw_data *pHwData);
void Wb35Rx_start(struct ieee80211_hw *hw);
#endif

44
drivers/staging/winbond/wb35rx_s.h
View File

@ -1,44 +0,0 @@
#ifndef __WINBOND_35RX_S_H
#define __WINBOND_35RX_S_H
/* Definition for this module used */
#define MAX_USB_RX_BUFFER 4096 /* This parameter must be 4096 931130.4.f */
#define MAX_USB_RX_BUFFER_NUMBER ETHERNET_RX_DESCRIPTORS /* Maximum 254, 255 is RESERVED ID */
#define RX_INTERFACE 0 /* Interface 1 */
#define RX_PIPE 2 /* Pipe 3 */
#define MAX_PACKET_SIZE 1600 /* 1568 = 8 + 1532 + 4 + 24(IV EIV MIC ICV CRC) for check DMA data 931130.4.g */
#define RX_END_TAG 0x0badbeef
/*
* Internal variable for module
*/
struct wb35_rx {
u32 ByteReceived; /* For calculating throughput of BulkIn */
atomic_t RxFireCounter;/* Does Wb35Rx module fire? */
u8 RxBuffer[MAX_USB_RX_BUFFER_NUMBER][((MAX_USB_RX_BUFFER+3) & ~0x03)];
u16 RxBufferSize[((MAX_USB_RX_BUFFER_NUMBER+1) & ~0x01)];
u8 RxOwner[((MAX_USB_RX_BUFFER_NUMBER+3) & ~0x03)]; /* Ownership of buffer 0:SW 1:HW */
u32 RxProcessIndex; /* The next index to process */
u32 RxBufferId;
u32 EP3vm_state;
u32 rx_halt; /* For VM stopping */
u16 MoreDataSize;
u16 PacketSize;
u32 CurrentRxBufferId; /* For complete routine usage */
u32 Rx3UrbCancel;
u32 LastR1; /* For RSSI reporting */
struct urb *RxUrb;
u32 Ep3ErrorCount2; /* 20060625.1 Usbd for Rx DMA error count */
int EP3VM_status;
u8 *pDRx;
};
#endif /* __WINBOND_35RX_S_H */

290
drivers/staging/winbond/wb35tx.c
View File

@ -1,290 +0,0 @@
/*
* Copyright (c) 1996-2002 Winbond Electronic Corporation
*
* Module Name:
* Wb35Tx.c
*
* Abstract:
* Processing the Tx message and put into down layer
*
*/
#include <linux/usb.h>
#include <linux/gfp.h>
#include "wb35tx_f.h"
#include "mds_f.h"
unsigned char
Wb35Tx_get_tx_buffer(struct hw_data *pHwData, u8 **pBuffer)
{
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
*pBuffer = pWb35Tx->TxBuffer[0];
return true;
}
static void Wb35Tx(struct wbsoft_priv *adapter);
static void Wb35Tx_complete(struct urb *pUrb)
{
struct wbsoft_priv *adapter = pUrb->context;
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
struct wb35_mds *pMds = &adapter->Mds;
printk("wb35: tx complete\n");
/* Variable setting */
pWb35Tx->EP4vm_state = VM_COMPLETED;
pWb35Tx->EP4VM_status = pUrb->status; /* Store the last result of Irp */
/* Set the owner. Free the owner bit always. */
pMds->TxOwner[pWb35Tx->TxSendIndex] = 0;
pWb35Tx->TxSendIndex++;
pWb35Tx->TxSendIndex %= MAX_USB_TX_BUFFER_NUMBER;
if (pHwData->SurpriseRemove) /* Let WbWlanHalt handle surprise remove */
goto error;
if (pWb35Tx->tx_halt)
goto error;
/* The URB is completed, check the result */
if (pWb35Tx->EP4VM_status != 0) {
dev_err(&pUrb->dev->dev, "URB submission failed\n");
pWb35Tx->EP4vm_state = VM_STOP;
goto error;
}
Mds_Tx(adapter);
Wb35Tx(adapter);
return;
error:
atomic_dec(&pWb35Tx->TxFireCounter);
pWb35Tx->EP4vm_state = VM_STOP;
}
static void Wb35Tx(struct wbsoft_priv *adapter)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
u8 *pTxBufferAddress;
struct wb35_mds *pMds = &adapter->Mds;
struct urb *pUrb = (struct urb *)pWb35Tx->Tx4Urb;
int retv;
u32 SendIndex;
if (pHwData->SurpriseRemove)
goto cleanup;
if (pWb35Tx->tx_halt)
goto cleanup;
/* Ownership checking */
SendIndex = pWb35Tx->TxSendIndex;
/* No more data need to be sent, return immediately */
if (!pMds->TxOwner[SendIndex])
goto cleanup;
pTxBufferAddress = pWb35Tx->TxBuffer[SendIndex];
/* Issuing URB */
usb_fill_bulk_urb(pUrb, pHwData->udev,
usb_sndbulkpipe(pHwData->udev, 4),
pTxBufferAddress, pMds->TxBufferSize[SendIndex],
Wb35Tx_complete, adapter);
pWb35Tx->EP4vm_state = VM_RUNNING;
retv = usb_submit_urb(pUrb, GFP_ATOMIC);
if (retv < 0) {
dev_err(&pUrb->dev->dev, "EP4 Tx Irp sending error\n");
goto cleanup;
}
/* Check if driver needs issue Irp for EP2 */
pWb35Tx->TxFillCount += pMds->TxCountInBuffer[SendIndex];
if (pWb35Tx->TxFillCount > 12)
Wb35Tx_EP2VM_start(adapter);
pWb35Tx->ByteTransfer += pMds->TxBufferSize[SendIndex];
return;
cleanup:
pWb35Tx->EP4vm_state = VM_STOP;
atomic_dec(&pWb35Tx->TxFireCounter);
}
void Wb35Tx_start(struct wbsoft_priv *adapter)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
/* Allow only one thread to run into function */
if (atomic_inc_return(&pWb35Tx->TxFireCounter) == 1) {
pWb35Tx->EP4vm_state = VM_RUNNING;
Wb35Tx(adapter);
} else
atomic_dec(&pWb35Tx->TxFireCounter);
}
unsigned char Wb35Tx_initial(struct hw_data *pHwData)
{
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
pWb35Tx->Tx4Urb = usb_alloc_urb(0, GFP_ATOMIC);
if (!pWb35Tx->Tx4Urb)
return false;
pWb35Tx->Tx2Urb = usb_alloc_urb(0, GFP_ATOMIC);
if (!pWb35Tx->Tx2Urb) {
usb_free_urb(pWb35Tx->Tx4Urb);
return false;
}
return true;
}
void Wb35Tx_stop(struct hw_data *pHwData)
{
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
/* Try to cancel the Trp of EP2 */
if (pWb35Tx->EP2vm_state == VM_RUNNING)
/* Only use unlink, let Wb35Tx_destroy free them */
usb_unlink_urb(pWb35Tx->Tx2Urb);
pr_debug("EP2 Tx stop\n");
/* Try to cancel the Irp of EP4 */
if (pWb35Tx->EP4vm_state == VM_RUNNING)
/* Only use unlink, let Wb35Tx_destroy free them */
usb_unlink_urb(pWb35Tx->Tx4Urb);
pr_debug("EP4 Tx stop\n");
}
void Wb35Tx_destroy(struct hw_data *pHwData)
{
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
/* Wait for VM stop */
do {
msleep(10); /* Delay for waiting function enter 940623.1.a */
} while ((pWb35Tx->EP2vm_state != VM_STOP) && (pWb35Tx->EP4vm_state != VM_STOP));
msleep(10); /* Delay for waiting function enter 940623.1.b */
usb_free_urb(pWb35Tx->Tx4Urb);
usb_free_urb(pWb35Tx->Tx2Urb);
pr_debug("Wb35Tx_destroy OK\n");
}
void Wb35Tx_CurrentTime(struct wbsoft_priv *adapter, u32 TimeCount)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
bool Trigger = false;
if (pWb35Tx->TxTimer > TimeCount)
Trigger = true;
else if (TimeCount > (pWb35Tx->TxTimer+500))
Trigger = true;
if (Trigger) {
pWb35Tx->TxTimer = TimeCount;
Wb35Tx_EP2VM_start(adapter);
}
}
static void Wb35Tx_EP2VM(struct wbsoft_priv *adapter);
static void Wb35Tx_EP2VM_complete(struct urb *pUrb)
{
struct wbsoft_priv *adapter = pUrb->context;
struct hw_data *pHwData = &adapter->sHwData;
struct T02_descriptor T02, TSTATUS;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
u32 *pltmp = (u32 *)pWb35Tx->EP2_buf;
u32 i;
u16 InterruptInLength;
/* Variable setting */
pWb35Tx->EP2vm_state = VM_COMPLETED;
pWb35Tx->EP2VM_status = pUrb->status;
/* For Linux 2.4. Interrupt will always trigger */
if (pHwData->SurpriseRemove) /* Let WbWlanHalt handle surprise remove */
goto error;
if (pWb35Tx->tx_halt)
goto error;
/* The Urb is completed, check the result */
if (pWb35Tx->EP2VM_status != 0) {
dev_err(&pUrb->dev->dev, "EP2 IoCompleteRoutine return error\n");
pWb35Tx->EP2vm_state = VM_STOP;
goto error;
}
/* Update the Tx result */
InterruptInLength = pUrb->actual_length;
/* Modify for minimum memory access and DWORD alignment. */
T02.value = cpu_to_le32(pltmp[0]) >> 8; /* [31:8] -> [24:0] */
InterruptInLength -= 1; /* 20051221.1.c Modify the follow for more stable */
InterruptInLength >>= 2; /* InterruptInLength/4 */
for (i = 1; i <= InterruptInLength; i++) {
T02.value |= ((cpu_to_le32(pltmp[i]) & 0xff) << 24);
TSTATUS.value = T02.value; /* 20061009 anson's endian */
Mds_SendComplete(adapter, &TSTATUS);
T02.value = cpu_to_le32(pltmp[i]) >> 8;
}
return;
error:
atomic_dec(&pWb35Tx->TxResultCount);
pWb35Tx->EP2vm_state = VM_STOP;
}
static void Wb35Tx_EP2VM(struct wbsoft_priv *adapter)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
struct urb *pUrb = (struct urb *)pWb35Tx->Tx2Urb;
u32 *pltmp = (u32 *)pWb35Tx->EP2_buf;
int retv;
if (pHwData->SurpriseRemove)
goto error;
if (pWb35Tx->tx_halt)
goto error;
/* Issuing URB */
usb_fill_int_urb(pUrb, pHwData->udev, usb_rcvintpipe(pHwData->udev, 2),
pltmp, MAX_INTERRUPT_LENGTH, Wb35Tx_EP2VM_complete,
adapter, 32);
pWb35Tx->EP2vm_state = VM_RUNNING;
retv = usb_submit_urb(pUrb, GFP_ATOMIC);
if (retv < 0) {
pr_debug("EP2 Tx Irp sending error\n");
goto error;
}
return;
error:
pWb35Tx->EP2vm_state = VM_STOP;
atomic_dec(&pWb35Tx->TxResultCount);
}
void Wb35Tx_EP2VM_start(struct wbsoft_priv *adapter)
{
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_tx *pWb35Tx = &pHwData->Wb35Tx;
/* Allow only one thread to run into function */
if (atomic_inc_return(&pWb35Tx->TxResultCount) == 1) {
pWb35Tx->EP2vm_state = VM_RUNNING;
Wb35Tx_EP2VM(adapter);
} else
atomic_dec(&pWb35Tx->TxResultCount);
}

22
drivers/staging/winbond/wb35tx_f.h
View File

@ -1,22 +0,0 @@
#ifndef __WINBOND_WB35TX_F_H
#define __WINBOND_WB35TX_F_H
#include "core.h"
/*
* ====================================
* Interface function declare
* ====================================
*/
unsigned char Wb35Tx_initial(struct hw_data *hw_data);
void Wb35Tx_destroy(struct hw_data *hw_data);
unsigned char Wb35Tx_get_tx_buffer(struct hw_data *hw_data, u8 **buffer);
void Wb35Tx_EP2VM_start(struct wbsoft_priv *adapter);
void Wb35Tx_start(struct wbsoft_priv *adapter);
void Wb35Tx_stop(struct hw_data *hw_data);
void Wb35Tx_CurrentTime(struct wbsoft_priv *adapter, u32 time_count);
#endif

39
drivers/staging/winbond/wb35tx_s.h
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@ -1,39 +0,0 @@
#ifndef __WINBOND_WB35_TX_S_H
#define __WINBOND_WB35_TX_S_H
#include "mds_s.h"
/* IS89C35 Tx related definition */
#define TX_INTERFACE 0 /* Interface 1 */
#define TX_PIPE 3 /* Endpoint 4 */
#define TX_INTERRUPT 1 /* Endpoint 2 */
#define MAX_INTERRUPT_LENGTH 64 /* It must be 64 for EP2 hardware */
/* Internal variable for module */
struct wb35_tx {
/* For Tx buffer */
u8 TxBuffer[MAX_USB_TX_BUFFER_NUMBER][MAX_USB_TX_BUFFER];
/* For Interrupt pipe */
u8 EP2_buf[MAX_INTERRUPT_LENGTH];
atomic_t TxResultCount; /* For thread control of EP2 931130.4.m */
atomic_t TxFireCounter; /* For thread control of EP4 931130.4.n */
u32 ByteTransfer;
u32 TxSendIndex; /* The next index of Mds array to be sent */
u32 EP2vm_state; /* for EP2vm state */
u32 EP4vm_state; /* for EP4vm state */
u32 tx_halt; /* Stopping VM */
struct urb *Tx4Urb;
struct urb *Tx2Urb;
int EP2VM_status;
int EP4VM_status;
u32 TxFillCount; /* 20060928 */
u32 TxTimer; /* 20060928 Add if sending packet is greater than 13 */
};
#endif

513
drivers/staging/winbond/wbhal.h
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@ -1,513 +0,0 @@
#ifndef __WINBOND_WBHAL_S_H
#define __WINBOND_WBHAL_S_H
#include <linux/types.h>
#include <linux/if_ether.h> /* for ETH_ALEN */
#define HAL_LED_SET_MASK 0x001c
#define HAL_LED_SET_SHIFT 2
/* supported RF type */
#define RF_MAXIM_2825 0
#define RF_MAXIM_2827 1
#define RF_MAXIM_2828 2
#define RF_MAXIM_2829 3
#define RF_MAXIM_V1 15
#define RF_AIROHA_2230 16
#define RF_AIROHA_7230 17
#define RF_AIROHA_2230S 18
#define RF_WB_242 33
#define RF_WB_242_1 34
#define RF_DECIDE_BY_INF 255
/*
* ----------------------------------------------------------------
* The follow define connect to upper layer
* User must modify for connection between HAL and upper layer
* ----------------------------------------------------------------
*/
/*
* ==============================
* Common define
* ==============================
*/
/* Bit 5 */
#define HAL_USB_MODE_BURST(_H) (_H->SoftwareSet & 0x20)
/* Scan interval */
#define SCAN_MAX_CHNL_TIME (50)
/* For TxL2 Frame typr recognise */
#define FRAME_TYPE_802_3_DATA 0
#define FRAME_TYPE_802_11_MANAGEMENT 1
#define FRAME_TYPE_802_11_MANAGEMENT_CHALLENGE 2
#define FRAME_TYPE_802_11_CONTROL 3
#define FRAME_TYPE_802_11_DATA 4
#define FRAME_TYPE_PROMISCUOUS 5
/* The follow definition is used for convert the frame------------ */
#define DOT_11_SEQUENCE_OFFSET 22 /* Sequence control offset */
#define DOT_3_TYPE_OFFSET 12
#define DOT_11_MAC_HEADER_SIZE 24
#define DOT_11_SNAP_SIZE 6
#define DOT_11_TYPE_OFFSET 30 /* The start offset of 802.11 Frame. Type encapsulation. */
#define DEFAULT_SIFSTIME 10
#define DEFAULT_FRAGMENT_THRESHOLD 2346 /* No fragment */
#define DEFAULT_MSDU_LIFE_TIME 0xffff
#define LONG_PREAMBLE_PLUS_PLCPHEADER_TIME (144 + 48)
#define SHORT_PREAMBLE_PLUS_PLCPHEADER_TIME (72 + 24)
#define PREAMBLE_PLUS_SIGNAL_PLUS_SIGNALEXTENSION (16 + 4 + 6)
#define Tsym 4
/* Frame Type of Bits (2, 3)----------------------------------- */
#define MAC_TYPE_MANAGEMENT 0x00
#define MAC_TYPE_CONTROL 0x04
#define MAC_TYPE_DATA 0x08
#define MASK_FRAGMENT_NUMBER 0x000F
#define SEQUENCE_NUMBER_SHIFT 4
#define HAL_WOL_TYPE_WAKEUP_FRAME 0x01
#define HAL_WOL_TYPE_MAGIC_PACKET 0x02
#define HAL_KEYTYPE_WEP40 0
#define HAL_KEYTYPE_WEP104 1
#define HAL_KEYTYPE_TKIP 2 /* 128 bit key */
#define HAL_KEYTYPE_AES_CCMP 3 /* 128 bit key */
/* For VM state */
enum {
VM_STOP = 0,
VM_RUNNING,
VM_COMPLETED
};
/*
* ================================
* Normal Key table format
* ================================
*/
/* The order of KEY index is MAPPING_KEY_START_INDEX > GROUP_KEY_START_INDEX */
#define MAX_KEY_TABLE 24 /* 24 entry for storing key data */
#define GROUP_KEY_START_INDEX 4
#define MAPPING_KEY_START_INDEX 8
/*
* =========================================
* Descriptor
* =========================================
*/
#define MAX_DESCRIPTOR_BUFFER_INDEX 8 /* Have to multiple of 2 */
#define FLAG_ERROR_TX_MASK 0x000000bf
#define FLAG_ERROR_RX_MASK 0x0000083f
#define FLAG_BAND_RX_MASK 0x10000000 /* Bit 28 */
struct R00_descriptor {
union {
u32 value;
#ifdef _BIG_ENDIAN_
struct {
u32 R00_packet_or_buffer_status:1;
u32 R00_packet_in_fifo:1;
u32 R00_RESERVED:2;
u32 R00_receive_byte_count:12;
u32 R00_receive_time_index:16;
};
#else
struct {
u32 R00_receive_time_index:16;
u32 R00_receive_byte_count:12;
u32 R00_RESERVED:2;
u32 R00_packet_in_fifo:1;
u32 R00_packet_or_buffer_status:1;
};
#endif
};
};
struct T00_descriptor {
union {
u32 value;
#ifdef _BIG_ENDIAN_
struct {
u32 T00_first_mpdu:1; /* for hardware use */
u32 T00_last_mpdu:1; /* for hardware use */
u32 T00_IsLastMpdu:1;/* 0:not 1:Yes for software used */
u32 T00_IgnoreResult:1;/* The same mechanism with T00 setting. */
u32 T00_RESERVED_ID:2;/* 3 bit ID reserved */
u32 T00_tx_packet_id:4;
u32 T00_RESERVED:4;
u32 T00_header_length:6;
u32 T00_frame_length:12;
};
#else
struct {
u32 T00_frame_length:12;
u32 T00_header_length:6;
u32 T00_RESERVED:4;
u32 T00_tx_packet_id:4;
u32 T00_RESERVED_ID:2; /* 3 bit ID reserved */
u32 T00_IgnoreResult:1; /* The same mechanism with T00 setting. */
u32 T00_IsLastMpdu:1; /* 0:not 1:Yes for software used */
u32 T00_last_mpdu:1; /* for hardware use */
u32 T00_first_mpdu:1; /* for hardware use */
};
#endif
};
};
struct R01_descriptor {
union {
u32 value;
#ifdef _BIG_ENDIAN_
struct {
u32 R01_RESERVED:3;
u32 R01_mod_type:1;
u32 R01_pre_type:1;
u32 R01_data_rate:3;
u32 R01_AGC_state:8;
u32 R01_LNA_state:2;
u32 R01_decryption_method:2;
u32 R01_mic_error:1;
u32 R01_replay:1;
u32 R01_broadcast_frame:1;
u32 R01_multicast_frame:1;
u32 R01_directed_frame:1;
u32 R01_receive_frame_antenna_selection:1;
u32 R01_frame_receive_during_atim_window:1;
u32 R01_protocol_version_error:1;
u32 R01_authentication_frame_icv_error:1;
u32 R01_null_key_to_authentication_frame:1;
u32 R01_icv_error:1;
u32 R01_crc_error:1;
};
#else
struct {
u32 R01_crc_error:1;
u32 R01_icv_error:1;
u32 R01_null_key_to_authentication_frame:1;
u32 R01_authentication_frame_icv_error:1;
u32 R01_protocol_version_error:1;
u32 R01_frame_receive_during_atim_window:1;
u32 R01_receive_frame_antenna_selection:1;
u32 R01_directed_frame:1;
u32 R01_multicast_frame:1;
u32 R01_broadcast_frame:1;
u32 R01_replay:1;
u32 R01_mic_error:1;
u32 R01_decryption_method:2;
u32 R01_LNA_state:2;
u32 R01_AGC_state:8;
u32 R01_data_rate:3;
u32 R01_pre_type:1;
u32 R01_mod_type:1;
u32 R01_RESERVED:3;
};
#endif
};
};
struct T01_descriptor {
union {
u32 value;
#ifdef _BIG_ENDIAN_
struct {
u32 T01_rts_cts_duration:16;
u32 T01_fall_back_rate:3;
u32 T01_add_rts:1;
u32 T01_add_cts:1;
u32 T01_modulation_type:1;
u32 T01_plcp_header_length:1;
u32 T01_transmit_rate:3;
u32 T01_wep_id:2;
u32 T01_add_challenge_text:1;
u32 T01_inhibit_crc:1;
u32 T01_loop_back_wep_mode:1;
u32 T01_retry_abort_enable:1;
};
#else
struct {
u32 T01_retry_abort_enable:1;
u32 T01_loop_back_wep_mode:1;
u32 T01_inhibit_crc:1;
u32 T01_add_challenge_text:1;
u32 T01_wep_id:2;
u32 T01_transmit_rate:3;
u32 T01_plcp_header_length:1;
u32 T01_modulation_type:1;
u32 T01_add_cts:1;
u32 T01_add_rts:1;
u32 T01_fall_back_rate:3;
u32 T01_rts_cts_duration:16;
};
#endif
};
};
struct T02_descriptor {
union {
u32 value;
#ifdef _BIG_ENDIAN_
struct {
u32 T02_IsLastMpdu:1; /* The same mechanism with T00 setting */
u32 T02_IgnoreResult:1; /* The same mechanism with T00 setting. */
u32 T02_RESERVED_ID:2; /* The same mechanism with T00 setting */
u32 T02_Tx_PktID:4;
u32 T02_MPDU_Cnt:4;
u32 T02_RTS_Cnt:4;
u32 T02_RESERVED:7;
u32 T02_transmit_complete:1;
u32 T02_transmit_abort_due_to_TBTT:1;
u32 T02_effective_transmission_rate:1;
u32 T02_transmit_without_encryption_due_to_wep_on_false:1;
u32 T02_discard_due_to_null_wep_key:1;
u32 T02_RESERVED_1:1;
u32 T02_out_of_MaxTxMSDULiftTime:1;
u32 T02_transmit_abort:1;
u32 T02_transmit_fail:1;
};
#else
struct {
u32 T02_transmit_fail:1;
u32 T02_transmit_abort:1;
u32 T02_out_of_MaxTxMSDULiftTime:1;
u32 T02_RESERVED_1:1;
u32 T02_discard_due_to_null_wep_key:1;
u32 T02_transmit_without_encryption_due_to_wep_on_false:1;
u32 T02_effective_transmission_rate:1;
u32 T02_transmit_abort_due_to_TBTT:1;
u32 T02_transmit_complete:1;
u32 T02_RESERVED:7;
u32 T02_RTS_Cnt:4;
u32 T02_MPDU_Cnt:4;
u32 T02_Tx_PktID:4;
u32 T02_RESERVED_ID:2; /* The same mechanism with T00 setting */
u32 T02_IgnoreResult:1; /* The same mechanism with T00 setting. */
u32 T02_IsLastMpdu:1; /* The same mechanism with T00 setting */
};
#endif
};
};
struct wb35_descriptor { /* Skip length = 8 DWORD */
/* ID for descriptor ---, The field doesn't be cleard in the operation of Descriptor definition */
u8 Descriptor_ID;
/* ----------------------The above region doesn't be cleared by DESCRIPTOR_RESET------ */
u8 RESERVED[3];
u16 FragmentThreshold;
u8 InternalUsed; /* Only can be used by operation of descriptor definition */
u8 Type; /* 0: 802.3 1:802.11 data frame 2:802.11 management frame */
u8 PreambleMode;/* 0: short 1:long */
u8 TxRate;
u8 FragmentCount;
u8 EapFix; /* For speed up key install */
/* For R00 and T00 ------------------------------ */
union {
struct R00_descriptor R00;
struct T00_descriptor T00;
};
/* For R01 and T01 ------------------------------ */
union {
struct R01_descriptor R01;
struct T01_descriptor T01;
};
/* For R02 and T02 ------------------------------ */
union {
u32 R02;
struct T02_descriptor T02;
};
/* For R03 and T03 ------------------------------ */
/* For software used */
union {
u32 R03;
u32 T03;
struct {
u8 buffer_number;
u8 buffer_start_index;
u16 buffer_total_size;
};
};
/* For storing the buffer */
u16 buffer_size[MAX_DESCRIPTOR_BUFFER_INDEX];
void *buffer_address[MAX_DESCRIPTOR_BUFFER_INDEX];
};
#define MAX_TXVGA_EEPROM 9 /* How many word(u16) of EEPROM will be used for TxVGA */
#define MAX_RF_PARAMETER 32
struct txvga_for_50 {
u8 ChanNo;
u8 TxVgaValue;
};
/*
* ==============================================
* Device related include
* ==============================================
*/
#include "wb35reg_s.h"
#include "wb35tx_s.h"
#include "wb35rx_s.h"
/* For Hal using ============================================ */
struct hw_data {
/* For compatible with 33 */
u32 revision;
u32 BB3c_cal; /* The value for Tx calibration comes from EEPROM */
u32 BB54_cal; /* The value for Rx calibration comes from EEPROM */
/* For surprise remove */
u32 SurpriseRemove; /* 0: Normal 1: Surprise remove */
u8 IsKeyPreSet;
u8 CalOneTime;
u8 VCO_trim;
u32 FragCount;
u32 DMAFix; /* V1_DMA_FIX The variable can be removed if driver want to save mem space for V2. */
/*
* ===============================================
* Definition for MAC address
* ===============================================
*/
u8 PermanentMacAddress[ETH_ALEN + 2]; /* The Ethernet addr that are stored in EEPROM. + 2 to 8-byte alignment */
u8 CurrentMacAddress[ETH_ALEN + 2]; /* The Enthernet addr that are in used. + 2 to 8-byte alignment */
/*
* =========================================
* Definition for 802.11
* =========================================
*/
u8 *bssid_pointer; /* Used by hal_get_bssid for return value */
u8 bssid[8]; /* Only 6 byte will be used. 8 byte is required for read buffer */
u8 ssid[32]; /* maximum ssid length is 32 byte */
u16 AID;
u8 ssid_length;
u8 Channel;
u16 ListenInterval;
u16 CapabilityInformation;
u16 BeaconPeriod;
u16 ProbeDelay;
u8 bss_type;/* 0: IBSS_NET or 1:ESS_NET */
u8 preamble;/* 0: short preamble, 1: long preamble */
u8 slot_time_select; /* 9 or 20 value */
u8 phy_type; /* Phy select */
u32 phy_para[MAX_RF_PARAMETER];
u32 phy_number;
u32 CurrentRadioSw; /* 0:On 1:Off */
u32 CurrentRadioHw; /* 0:On 1:Off */
u8 *power_save_point; /* Used by hal_get_power_save_mode for return value */
u8 cwmin;
u8 desired_power_save;
u8 dtim; /* Is running dtim */
u8 mapping_key_replace_index; /* In Key table, the next index be replaced */
u16 MaxReceiveLifeTime;
u16 FragmentThreshold;
u16 FragmentThreshold_tmp;
u16 cwmax;
u8 Key_slot[MAX_KEY_TABLE][8]; /* Ownership record for key slot. For Alignment */
u32 Key_content[MAX_KEY_TABLE][12]; /* 10DW for each entry + 2 for burst command (Off and On valid bit) */
u8 CurrentDefaultKeyIndex;
u32 CurrentDefaultKeyLength;
/*
* ==================================================
* Variable for each module
* ==================================================
*/
struct usb_device *udev;
struct wb35_reg reg; /* Need Wb35Reg.h */
struct wb35_tx Wb35Tx; /* Need Wb35Tx.h */
struct wb35_rx Wb35Rx; /* Need Wb35Rx.h */
struct timer_list LEDTimer; /* For LED */
u32 LEDpoint; /* For LED */
u32 dto_tx_retry_count;
u32 dto_tx_frag_count;
u32 rx_ok_count[13]; /* index=0: total rx ok */
u32 rx_err_count[13]; /* index=0: total rx err */
/* for Tx debug */
u32 tx_TBTT_start_count;
u32 tx_ETR_count;
u32 tx_WepOn_false_count;
u32 tx_Null_key_count;
u32 tx_retry_count[8];
u8 PowerIndexFromEEPROM; /* For 2412MHz */
u8 power_index;
u8 IsWaitJoinComplete; /* TRUE: set join request */
u8 band;
u16 SoftwareSet;
u16 Reserved_s;
u32 IsInitOK; /* 0: Driver starting 1: Driver init OK */
/* For Phy calibration */
s32 iq_rsdl_gain_tx_d2;
s32 iq_rsdl_phase_tx_d2;
u32 txvga_setting_for_cal;
u8 TxVgaSettingInEEPROM[(((MAX_TXVGA_EEPROM * 2) + 3) & ~0x03)]; /* For EEPROM value */
u8 TxVgaFor24[16]; /* Max is 14, 2 for alignment */
struct txvga_for_50 TxVgaFor50[36]; /* 35 channels in 5G. 35x2 = 70 byte. 2 for alignments */
u16 Scan_Interval;
u16 RESERVED6;
/* LED control */
u32 LED_control;
/*
* LED_control 4 byte: Gray_Led_1[3] Gray_Led_0[2] Led[1] Led[0]
* Gray_Led
* For Led gray setting
* Led
* 0: normal control,
* LED behavior will decide by EEPROM setting
* 1: Turn off specific LED
* 2: Always on specific LED
* 3: slow blinking specific LED
* 4: fast blinking specific LED
* 5: WPS led control is set. Led0 is Red, Led1 id Green
*
* Led[1] is parameter for WPS LED mode
* 1:InProgress
* 2: Error
* 3: Session overlap
* 4: Success control
*/
u32 LED_LinkOn; /* Turn LED on control */
u32 LED_Scanning; /* Let LED in scan process control */
u32 LED_Blinking; /* Temp variable for shining */
u32 RxByteCountLast;
u32 TxByteCountLast;
/* For global timer */
u32 time_count; /* TICK_TIME_100ms 1 = 100ms */
};
#endif

853
drivers/staging/winbond/wbusb.c
View File

@ -1,853 +0,0 @@
/*
* Copyright 2008 Pavel Machek <pavel@ucw.cz>
*
* Distribute under GPLv2.
*
* The original driver was written by:
* Jeff Lee <YY_Lee@issc.com.tw>
*
* and was adapted to the 2.6 kernel by:
* Costantino Leandro (Rxart Desktop) <le_costantino@pixartargentina.com.ar>
*/
#include <net/mac80211.h>
#include <linux/usb.h>
#include <linux/module.h>
#include "core.h"
#include "mds_f.h"
#include "mto.h"
#include "wbhal.h"
#include "wb35reg_f.h"
#include "wb35tx_f.h"
#include "wb35rx_f.h"
MODULE_DESCRIPTION("IS89C35 802.11bg WLAN USB Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION("0.1");
static const struct usb_device_id wb35_table[] = {
{ USB_DEVICE(0x0416, 0x0035) },
{ USB_DEVICE(0x18E8, 0x6201) },
{ USB_DEVICE(0x18E8, 0x6206) },
{ USB_DEVICE(0x18E8, 0x6217) },
{ USB_DEVICE(0x18E8, 0x6230) },
{ USB_DEVICE(0x18E8, 0x6233) },
{ USB_DEVICE(0x1131, 0x2035) },
{ 0, }
};
MODULE_DEVICE_TABLE(usb, wb35_table);
static struct ieee80211_rate wbsoft_rates[] = {
{ .bitrate = 10, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
};
static struct ieee80211_channel wbsoft_channels[] = {
{ .center_freq = 2412 },
};
static struct ieee80211_supported_band wbsoft_band_2GHz = {
.channels = wbsoft_channels,
.n_channels = ARRAY_SIZE(wbsoft_channels),
.bitrates = wbsoft_rates,
.n_bitrates = ARRAY_SIZE(wbsoft_rates),
};
static void hal_set_beacon_period(struct hw_data *pHwData, u16 beacon_period)
{
u32 tmp;
if (pHwData->SurpriseRemove)
return;
pHwData->BeaconPeriod = beacon_period;
tmp = pHwData->BeaconPeriod << 16;
tmp |= pHwData->ProbeDelay;
Wb35Reg_Write(pHwData, 0x0848, tmp);
}
static int wbsoft_add_interface(struct ieee80211_hw *dev,
struct ieee80211_vif *vif)
{
struct wbsoft_priv *priv = dev->priv;
hal_set_beacon_period(&priv->sHwData, vif->bss_conf.beacon_int);
return 0;
}
static void wbsoft_remove_interface(struct ieee80211_hw *dev,
struct ieee80211_vif *vif)
{
}
static void wbsoft_stop(struct ieee80211_hw *hw)
{
}
static int wbsoft_get_stats(struct ieee80211_hw *hw,
struct ieee80211_low_level_stats *stats)
{
return 0;
}
static u64 wbsoft_prepare_multicast(struct ieee80211_hw *hw,
struct netdev_hw_addr_list *mc_list)
{
return netdev_hw_addr_list_count(mc_list);
}
static void wbsoft_configure_filter(struct ieee80211_hw *dev,
unsigned int changed_flags,
unsigned int *total_flags,
u64 multicast)
{
unsigned int new_flags;
new_flags = 0;
if (*total_flags & FIF_PROMISC_IN_BSS)
new_flags |= FIF_PROMISC_IN_BSS;
else if ((*total_flags & FIF_ALLMULTI) || (multicast > 32))
new_flags |= FIF_ALLMULTI;
dev->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS;
*total_flags = new_flags;
}
static void wbsoft_tx(struct ieee80211_hw *dev,
struct ieee80211_tx_control *control,
struct sk_buff *skb)
{
struct wbsoft_priv *priv = dev->priv;
if (priv->sMlmeFrame.is_in_used != PACKET_FREE_TO_USE) {
priv->sMlmeFrame.wNumTxMMPDUDiscarded++;
kfree_skb(skb);
return;
}
priv->sMlmeFrame.is_in_used = PACKET_COME_FROM_MLME;
priv->sMlmeFrame.pMMPDU = skb->data;
priv->sMlmeFrame.data_type = FRAME_TYPE_802_11_MANAGEMENT;
priv->sMlmeFrame.len = skb->len;
priv->sMlmeFrame.wNumTxMMPDU++;
/*
* H/W will enter power save by set the register. S/W don't send null
* frame with PWRMgt bit enbled to enter power save now.
*/
Mds_Tx(priv);
}
static int wbsoft_start(struct ieee80211_hw *dev)
{
struct wbsoft_priv *priv = dev->priv;
priv->enabled = true;
return 0;
}
static void hal_set_radio_mode(struct hw_data *pHwData, unsigned char radio_off)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
if (radio_off) { /* disable Baseband receive off */
pHwData->CurrentRadioSw = 1; /* off */
reg->M24_MacControl &= 0xffffffbf;
} else {
pHwData->CurrentRadioSw = 0; /* on */
reg->M24_MacControl |= 0x00000040;
}
Wb35Reg_Write(pHwData, 0x0824, reg->M24_MacControl);
}
static void hal_set_current_channel_ex(struct hw_data *pHwData, struct chan_info channel)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
RFSynthesizer_SwitchingChannel(pHwData, channel); /* Switch channel */
pHwData->Channel = channel.ChanNo;
pHwData->band = channel.band;
reg->M28_MacControl &= ~0xff; /* Clean channel information field */
reg->M28_MacControl |= channel.ChanNo;
Wb35Reg_WriteWithCallbackValue(pHwData, 0x0828, reg->M28_MacControl,
(s8 *) &channel,
sizeof(struct chan_info));
}
static void hal_set_current_channel(struct hw_data *pHwData, struct chan_info channel)
{
hal_set_current_channel_ex(pHwData, channel);
}
static void hal_set_accept_broadcast(struct hw_data *pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
reg->M00_MacControl &= ~0x02000000; /* The HW value */
if (enable)
reg->M00_MacControl |= 0x02000000; /* The HW value */
Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
}
/* For wep key error detection, we need to accept broadcast packets to be received temporary. */
static void hal_set_accept_promiscuous(struct hw_data *pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
if (enable) {
reg->M00_MacControl |= 0x00400000;
Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
} else {
reg->M00_MacControl &= ~0x00400000;
Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
}
}
static void hal_set_accept_multicast(struct hw_data *pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
reg->M00_MacControl &= ~0x01000000; /* The HW value */
if (enable)
reg->M00_MacControl |= 0x01000000; /* The HW value */
Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
}
static void hal_set_accept_beacon(struct hw_data *pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return;
if (!enable) /* Due to SME and MLME are not suitable for 35 */
return;
reg->M00_MacControl &= ~0x04000000; /* The HW value */
if (enable)
reg->M00_MacControl |= 0x04000000; /* The HW value */
Wb35Reg_Write(pHwData, 0x0800, reg->M00_MacControl);
}
static int wbsoft_config(struct ieee80211_hw *dev, u32 changed)
{
struct wbsoft_priv *priv = dev->priv;
struct chan_info ch;
/* Should use channel_num, or something, as that is already pre-translated */
ch.band = 1;
ch.ChanNo = 1;
hal_set_current_channel(&priv->sHwData, ch);
hal_set_accept_broadcast(&priv->sHwData, 1);
hal_set_accept_promiscuous(&priv->sHwData, 1);
hal_set_accept_multicast(&priv->sHwData, 1);
hal_set_accept_beacon(&priv->sHwData, 1);
hal_set_radio_mode(&priv->sHwData, 0);
return 0;
}
static u64 wbsoft_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
{
return 0;
}
static const struct ieee80211_ops wbsoft_ops = {
.tx = wbsoft_tx,
.start = wbsoft_start,
.stop = wbsoft_stop,
.add_interface = wbsoft_add_interface,
.remove_interface = wbsoft_remove_interface,
.config = wbsoft_config,
.prepare_multicast = wbsoft_prepare_multicast,
.configure_filter = wbsoft_configure_filter,
.get_stats = wbsoft_get_stats,
.get_tsf = wbsoft_get_tsf,
};
static void hal_set_ethernet_address(struct hw_data *pHwData, u8 *current_address)
{
u32 ltmp[2];
if (pHwData->SurpriseRemove)
return;
memcpy(pHwData->CurrentMacAddress, current_address, ETH_ALEN);
ltmp[0] = cpu_to_le32(*(u32 *) pHwData->CurrentMacAddress);
ltmp[1] = cpu_to_le32(*(u32 *) (pHwData->CurrentMacAddress + 4)) & 0xffff;
Wb35Reg_BurstWrite(pHwData, 0x03e8, ltmp, 2, AUTO_INCREMENT);
}
static void hal_get_permanent_address(struct hw_data *pHwData, u8 *pethernet_address)
{
if (pHwData->SurpriseRemove)
return;
memcpy(pethernet_address, pHwData->PermanentMacAddress, 6);
}
static void hal_stop(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
pHwData->Wb35Rx.rx_halt = 1;
Wb35Rx_stop(pHwData);
pHwData->Wb35Tx.tx_halt = 1;
Wb35Tx_stop(pHwData);
reg->D00_DmaControl &= ~0xc0000000; /* Tx Off, Rx Off */
Wb35Reg_Write(pHwData, 0x0400, reg->D00_DmaControl);
}
static unsigned char hal_idle(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
if (!pHwData->SurpriseRemove && reg->EP0vm_state != VM_STOP)
return false;
return true;
}
u8 hal_get_antenna_number(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
if ((reg->BB2C & BIT(11)) == 0)
return 0;
else
return 1;
}
/* 0 : radio on; 1: radio off */
static u8 hal_get_hw_radio_off(struct hw_data *pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove)
return 1;
/* read the bit16 of register U1B0 */
Wb35Reg_Read(pHwData, 0x3b0, &reg->U1B0);
if ((reg->U1B0 & 0x00010000)) {
pHwData->CurrentRadioHw = 1;
return 1;
} else {
pHwData->CurrentRadioHw = 0;
return 0;
}
}
static u8 LED_GRAY[20] = {
0, 3, 4, 6, 8, 10, 11, 12, 13, 14, 15, 14, 13, 12, 11, 10, 8, 6, 4, 2
};
static u8 LED_GRAY2[30] = {
7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 15, 14, 13, 12, 11, 10, 9, 8
};
static void hal_led_control(unsigned long data)
{
struct wbsoft_priv *adapter = (struct wbsoft_priv *)data;
struct hw_data *pHwData = &adapter->sHwData;
struct wb35_reg *reg = &pHwData->reg;
u32 LEDSet = (pHwData->SoftwareSet & HAL_LED_SET_MASK) >> HAL_LED_SET_SHIFT;
u32 TimeInterval = 500, ltmp, ltmp2;
ltmp = 0;
if (pHwData->SurpriseRemove)
return;
if (pHwData->LED_control) {
ltmp2 = pHwData->LED_control & 0xff;
if (ltmp2 == 5) { /* 5 is WPS mode */
TimeInterval = 100;
ltmp2 = (pHwData->LED_control >> 8) & 0xff;
switch (ltmp2) {
case 1: /* [0.2 On][0.1 Off]... */
pHwData->LED_Blinking %= 3;
ltmp = 0x1010; /* Led 1 & 0 Green and Red */
if (pHwData->LED_Blinking == 2) /* Turn off */
ltmp = 0;
break;
case 2: /* [0.1 On][0.1 Off]... */
pHwData->LED_Blinking %= 2;
ltmp = 0x0010; /* Led 0 red color */
if (pHwData->LED_Blinking) /* Turn off */
ltmp = 0;
break;
case 3: /* [0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.1 On][0.1 Off][0.5 Off]... */
pHwData->LED_Blinking %= 15;
ltmp = 0x0010; /* Led 0 red color */
if ((pHwData->LED_Blinking >= 9) || (pHwData->LED_Blinking % 2)) /* Turn off 0.6 sec */
ltmp = 0;
break;
case 4: /* [300 On][ off ] */
ltmp = 0x1000; /* Led 1 Green color */
if (pHwData->LED_Blinking >= 3000)
ltmp = 0; /* led maybe on after 300sec * 32bit counter overlap. */
break;
}
pHwData->LED_Blinking++;
reg->U1BC_LEDConfigure = ltmp;
if (LEDSet != 7) { /* Only 111 mode has 2 LEDs on PCB. */
reg->U1BC_LEDConfigure |= (ltmp & 0xff) << 8; /* Copy LED result to each LED control register */
reg->U1BC_LEDConfigure |= (ltmp & 0xff00) >> 8;
}
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure);
}
} else if (pHwData->CurrentRadioSw || pHwData->CurrentRadioHw) { /* If radio off */
if (reg->U1BC_LEDConfigure & 0x1010) {
reg->U1BC_LEDConfigure &= ~0x1010;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure);
}
} else {
switch (LEDSet) {
case 4: /* [100] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing */
if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
/* Blinking if scanning is on progress */
if (pHwData->LED_Scanning) {
if (pHwData->LED_Blinking == 0) {
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 On */
pHwData->LED_Blinking = 1;
TimeInterval = 300;
} else {
reg->U1BC_LEDConfigure &= ~0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
} else {
/* Turn Off LED_0 */
if (reg->U1BC_LEDConfigure & 0x10) {
reg->U1BC_LEDConfigure &= ~0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
}
}
} else {
/* Turn On LED_0 */
if ((reg->U1BC_LEDConfigure & 0x10) == 0) {
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
}
}
break;
case 6: /* [110] Only 1 Led be placed on PCB and use pin 21 of IC. Use LED_0 for showing */
if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
/* Blinking if scanning is on progress */
if (pHwData->LED_Scanning) {
if (pHwData->LED_Blinking == 0) {
reg->U1BC_LEDConfigure &= ~0xf;
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 On */
pHwData->LED_Blinking = 1;
TimeInterval = 300;
} else {
reg->U1BC_LEDConfigure &= ~0x1f;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
} else {
/* Gray blinking if in disconnect state and not scanning */
ltmp = reg->U1BC_LEDConfigure;
reg->U1BC_LEDConfigure &= ~0x1f;
if (LED_GRAY2[(pHwData->LED_Blinking % 30)]) {
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |=
LED_GRAY2[(pHwData->LED_Blinking % 30)];
}
pHwData->LED_Blinking++;
if (reg->U1BC_LEDConfigure != ltmp)
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
TimeInterval = 100;
}
} else {
/* Turn On LED_0 */
if ((reg->U1BC_LEDConfigure & 0x10) == 0) {
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_0 Off */
}
}
break;
case 5: /* [101] Only 1 Led be placed on PCB and use LED_1 for showing */
if (!pHwData->LED_LinkOn) { /* Blink only if not Link On */
/* Blinking if scanning is on progress */
if (pHwData->LED_Scanning) {
if (pHwData->LED_Blinking == 0) {
reg->U1BC_LEDConfigure |= 0x1000;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
pHwData->LED_Blinking = 1;
TimeInterval = 300;
} else {
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 Off */
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
} else {
/* Turn Off LED_1 */
if (reg->U1BC_LEDConfigure & 0x1000) {
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 Off */
}
}
} else {
/* Is transmitting/receiving ?? */
if ((adapter->RxByteCount !=
pHwData->RxByteCountLast)
|| (adapter->TxByteCount !=
pHwData->TxByteCountLast)) {
if ((reg->U1BC_LEDConfigure & 0x3000) !=
0x3000) {
reg->U1BC_LEDConfigure |= 0x3000;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
}
/* Update variable */
pHwData->RxByteCountLast =
adapter->RxByteCount;
pHwData->TxByteCountLast =
adapter->TxByteCount;
TimeInterval = 200;
} else {
/* Turn On LED_1 and blinking if transmitting/receiving */
if ((reg->U1BC_LEDConfigure & 0x3000) !=
0x1000) {
reg->U1BC_LEDConfigure &=
~0x3000;
reg->U1BC_LEDConfigure |=
0x1000;
Wb35Reg_Write(pHwData, 0x03bc, reg->U1BC_LEDConfigure); /* LED_1 On */
}
}
}
break;
default: /* Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active */
if ((reg->U1BC_LEDConfigure & 0x3000) != 0x3000) {
reg->U1BC_LEDConfigure |= 0x3000; /* LED_1 is always on and event enable */
Wb35Reg_Write(pHwData, 0x03bc,
reg->U1BC_LEDConfigure);
}
if (pHwData->LED_Blinking) {
/* Gray blinking */
reg->U1BC_LEDConfigure &= ~0x0f;
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |=
LED_GRAY[(pHwData->LED_Blinking - 1) % 20];
Wb35Reg_Write(pHwData, 0x03bc,
reg->U1BC_LEDConfigure);
pHwData->LED_Blinking += 2;
if (pHwData->LED_Blinking < 40)
TimeInterval = 100;
else {
pHwData->LED_Blinking = 0; /* Stop blinking */
reg->U1BC_LEDConfigure &= ~0x0f;
Wb35Reg_Write(pHwData, 0x03bc,
reg->U1BC_LEDConfigure);
}
break;
}
if (pHwData->LED_LinkOn) {
if (!(reg->U1BC_LEDConfigure & 0x10)) { /* Check the LED_0 */
/* Try to turn ON LED_0 after gray blinking */
reg->U1BC_LEDConfigure |= 0x10;
pHwData->LED_Blinking = 1; /* Start blinking */
TimeInterval = 50;
}
} else {
if (reg->U1BC_LEDConfigure & 0x10) { /* Check the LED_0 */
reg->U1BC_LEDConfigure &= ~0x10;
Wb35Reg_Write(pHwData, 0x03bc,
reg->U1BC_LEDConfigure);
}
}
break;
}
}
pHwData->time_count += TimeInterval;
Wb35Tx_CurrentTime(adapter, pHwData->time_count);
pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(TimeInterval);
add_timer(&pHwData->LEDTimer);
}
static int hal_init_hardware(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
u16 SoftwareSet;
pHwData->MaxReceiveLifeTime = DEFAULT_MSDU_LIFE_TIME;
pHwData->FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
if (!Wb35Reg_initial(pHwData))
goto error_reg_destroy;
if (!Wb35Tx_initial(pHwData))
goto error_tx_destroy;
if (!Wb35Rx_initial(pHwData))
goto error_rx_destroy;
init_timer(&pHwData->LEDTimer);
pHwData->LEDTimer.function = hal_led_control;
pHwData->LEDTimer.data = (unsigned long)priv;
pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(1000);
add_timer(&pHwData->LEDTimer);
SoftwareSet = hal_software_set(pHwData);
Wb35Rx_start(hw);
Wb35Tx_EP2VM_start(priv);
return 0;
error_rx_destroy:
Wb35Rx_destroy(pHwData);
error_tx_destroy:
Wb35Tx_destroy(pHwData);
error_reg_destroy:
Wb35Reg_destroy(pHwData);
pHwData->SurpriseRemove = 1;
return -EINVAL;
}
static int wb35_hw_init(struct ieee80211_hw *hw)
{
struct wbsoft_priv *priv = hw->priv;
struct hw_data *pHwData = &priv->sHwData;
u8 EEPROM_region;
u8 HwRadioOff;
u8 *pMacAddr2;
u8 *pMacAddr;
int err;
pHwData->phy_type = RF_DECIDE_BY_INF;
priv->Mds.TxRTSThreshold = DEFAULT_RTSThreshold;
priv->Mds.TxFragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD;
priv->sLocalPara.region_INF = REGION_AUTO;
priv->sLocalPara.TxRateMode = RATE_AUTO;
priv->sLocalPara.bMacOperationMode = MODE_802_11_BG;
priv->sLocalPara.MTUsize = MAX_ETHERNET_PACKET_SIZE;
priv->sLocalPara.bPreambleMode = AUTO_MODE;
priv->sLocalPara.bWepKeyError = false;
priv->sLocalPara.bToSelfPacketReceived = false;
priv->sLocalPara.WepKeyDetectTimerCount = 2 * 100; /* 2 seconds */
priv->sLocalPara.RadioOffStatus.boSwRadioOff = false;
err = hal_init_hardware(hw);
if (err)
goto error;
EEPROM_region = hal_get_region_from_EEPROM(pHwData);
if (EEPROM_region != REGION_AUTO)
priv->sLocalPara.region = EEPROM_region;
else {
if (priv->sLocalPara.region_INF != REGION_AUTO)
priv->sLocalPara.region = priv->sLocalPara.region_INF;
else
priv->sLocalPara.region = REGION_USA; /* default setting */
}
Mds_initial(priv);
/*
* If no user-defined address in the registry, use the address
* "burned" on the NIC instead.
*/
pMacAddr = priv->sLocalPara.ThisMacAddress;
pMacAddr2 = priv->sLocalPara.PermanentAddress;
/* Reading ethernet address from EEPROM */
hal_get_permanent_address(pHwData, priv->sLocalPara.PermanentAddress);
if (memcmp(pMacAddr, "\x00\x00\x00\x00\x00\x00", MAC_ADDR_LENGTH) == 0)
memcpy(pMacAddr, pMacAddr2, MAC_ADDR_LENGTH);
else {
/* Set the user define MAC address */
hal_set_ethernet_address(pHwData,
priv->sLocalPara.ThisMacAddress);
}
priv->sLocalPara.bAntennaNo = hal_get_antenna_number(pHwData);
hal_get_hw_radio_off(pHwData);
/* Waiting for HAL setting OK */
while (!hal_idle(pHwData))
msleep(10);
MTO_Init(priv);
HwRadioOff = hal_get_hw_radio_off(pHwData);
priv->sLocalPara.RadioOffStatus.boHwRadioOff = !!HwRadioOff;
hal_set_radio_mode(pHwData,
(unsigned char)(priv->sLocalPara.RadioOffStatus.
boSwRadioOff
|| priv->sLocalPara.RadioOffStatus.
boHwRadioOff));
/* Notify hal that the driver is ready now. */
hal_driver_init_OK(pHwData) = 1;
error:
return err;
}
static int wb35_probe(struct usb_interface *intf,
const struct usb_device_id *id_table)
{
struct usb_device *udev = interface_to_usbdev(intf);
struct usb_endpoint_descriptor *endpoint;
struct usb_host_interface *interface;
struct ieee80211_hw *dev;
struct wbsoft_priv *priv;
int err;
u32 ltmp;
usb_get_dev(udev);
/* Check the device if it already be opened */
err = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
0x01,
USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_IN,
0x0, 0x400, &ltmp, 4, HZ * 100);
if (err < 0)
goto error;
/* Is already initialized? */
ltmp = cpu_to_le32(ltmp);
if (ltmp) {
err = -EBUSY;
goto error;
}
dev = ieee80211_alloc_hw(sizeof(*priv), &wbsoft_ops);
if (!dev) {
err = -ENOMEM;
goto error;
}
priv = dev->priv;
priv->sHwData.udev = udev;
interface = intf->cur_altsetting;
endpoint = &interface->endpoint[0].desc;
err = wb35_hw_init(dev);
if (err)
goto error_free_hw;
SET_IEEE80211_DEV(dev, &udev->dev);
{
struct hw_data *pHwData = &priv->sHwData;
unsigned char dev_addr[MAX_ADDR_LEN];
hal_get_permanent_address(pHwData, dev_addr);
SET_IEEE80211_PERM_ADDR(dev, dev_addr);
}
dev->extra_tx_headroom = 12; /* FIXME */
dev->flags = IEEE80211_HW_SIGNAL_UNSPEC;
dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
dev->max_signal = 100;
dev->queues = 1;
dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &wbsoft_band_2GHz;
err = ieee80211_register_hw(dev);
if (err)
goto error_free_hw;
usb_set_intfdata(intf, dev);
return 0;
error_free_hw:
ieee80211_free_hw(dev);
error:
usb_put_dev(udev);
return err;
}
static void hal_halt(struct hw_data *pHwData)
{
del_timer_sync(&pHwData->LEDTimer);
/* XXX: Wait for Timer DPC exit. */
msleep(100);
Wb35Rx_destroy(pHwData);
Wb35Tx_destroy(pHwData);
Wb35Reg_destroy(pHwData);
}
static void wb35_hw_halt(struct wbsoft_priv *adapter)
{
/* Turn off Rx and Tx hardware ability */
hal_stop(&adapter->sHwData);
/* Waiting Irp completed */
msleep(100);
hal_halt(&adapter->sHwData);
}
static void wb35_disconnect(struct usb_interface *intf)
{
struct ieee80211_hw *hw = usb_get_intfdata(intf);
struct wbsoft_priv *priv = hw->priv;
wb35_hw_halt(priv);
ieee80211_stop_queues(hw);
ieee80211_unregister_hw(hw);
ieee80211_free_hw(hw);
usb_set_intfdata(intf, NULL);
usb_put_dev(interface_to_usbdev(intf));
}
static struct usb_driver wb35_driver = {
.name = "w35und",
.id_table = wb35_table,
.probe = wb35_probe,
.disconnect = wb35_disconnect,
};
module_usb_driver(wb35_driver);