diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index d8379e421848..3934fcb38d42 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -1550,13 +1550,24 @@ smu_v11_0_set_watermarks_for_clock_ranges(struct smu_context *smu, struct
 static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)
 {
 	int ret = 0;
+	struct amdgpu_device *adev = smu->adev;
 
-	mutex_lock(&smu->mutex);
-	if (enable)
-		ret = smu_send_smc_msg(smu, SMU_MSG_AllowGfxOff);
-	else
-		ret = smu_send_smc_msg(smu, SMU_MSG_DisallowGfxOff);
-	mutex_unlock(&smu->mutex);
+	switch (adev->asic_type) {
+	case CHIP_VEGA20:
+		break;
+	case CHIP_NAVI10:
+		if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
+			return 0;
+		mutex_lock(&smu->mutex);
+		if (enable)
+			ret = smu_send_smc_msg(smu, SMU_MSG_AllowGfxOff);
+		else
+			ret = smu_send_smc_msg(smu, SMU_MSG_DisallowGfxOff);
+		mutex_unlock(&smu->mutex);
+		break;
+	default:
+		break;
+	}
 
 	return ret;
 }