wireless-next patches for v6.3
Smaller pull request this time, sending this early to fix the conflict in mac80211. Nothing really special this time, only smaller changes. Note: We pulled wireless into wireless-next to fix a complicated conflict in mac80211. Major changes: mac80211/cfg80211 * enable Wi-Fi 7 (EHT) mesh support -----BEGIN PGP SIGNATURE----- iQFFBAABCgAvFiEEiBjanGPFTz4PRfLobhckVSbrbZsFAmQtVs0RHGt2YWxvQGtl cm5lbC5vcmcACgkQbhckVSbrbZvtRwgAiyCCYwhxj3BXwrtr5u4X+RCAQ/8LSrpu ju8M7DigiDVUuSX7fS99LGMOBenKLg6S4f2wtj10tKSbr0D4Qjruv6JpERDgvhIn RDJg8QBB5urGWvI6lKf0K+xWDrpPhb3RV/yCnVQU+3t/B7sLwC2pAJJmyRJNEXaB sLpAGcbQQizRhHp3gVzuxSmkqnX1KfxehN5f+AeL55U3Jw3+vKmk+Ekd/GXrDEk5 Q8CWcikTthsn2+CTekVNUgg2gQyL9fF1hRwuhPph8Tcxow2SYe3DX+Yj/So25tv/ 4Gp+GLdMOAKuPCntOE9A8YHVbA+JLlzbfOwF6g5kgREmagwW6GoyMA== =zsHH -----END PGP SIGNATURE----- Merge tag 'wireless-next-2023-04-05' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next Kalle Valo says: ==================== wireless-next patches for v6.3 Smaller pull request this time, sending this early to fix the conflict in mac80211. Nothing really special this time, only smaller changes. * enable Wi-Fi 7 (EHT) mesh support * tag 'wireless-next-2023-04-05' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next: (37 commits) wifi: rt2x00: Fix memory leak when handling surveys wifi: b43legacy: Remove the unused function prev_slot() wifi: rtw89: Remove redundant pci_clear_master wifi: rtw89: fix potential race condition between napi_init and napi_enable wifi: rtw89: config EDCCA threshold during scan to prevent TX failed wifi: rtw89: fix incorrect channel info during scan due to ppdu_sts filtering wifi: rtw89: remove superfluous H2C of join_info wifi: rtw89: set data lowest rate according to AP supported rate wifi: rtw89: add counters of register-based H2C/C2H wifi: rtw89: coex: Update Wi-Fi Bluetooth coexistence version to 7.0.1 wifi: rtw89: coex: Add report control v5 variation wifi: rtw89: coex: Update RTL8852B LNA2 hardware parameter wifi: rtw89: coex: Not to enable firmware report when WiFi is power saving wifi: rtw89: coex: Add LPS protocol radio state for RTL8852B bcma: remove unused mips_read32 function bcma: Use of_address_to_resource() wifi: mwifiex: remove unused evt_buf variable wifi: brcmsmac: ampdu: remove unused suc_mpdu variable wifi: rtlwifi: fix incorrect error codes in rtl_debugfs_set_write_reg() wifi: rtlwifi: fix incorrect error codes in rtl_debugfs_set_write_rfreg() ... ==================== Link: https://lore.kernel.org/r/20230405111037.4792BC43443@smtp.kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
commit
acd11255ca
@ -46,12 +46,6 @@ static inline bool bcma_core_mips_bcm5357b0_quirk(struct bcma_device *dev)
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dev->id.id == BCMA_CORE_USB20_HOST;
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}
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static inline u32 mips_read32(struct bcma_drv_mips *mcore,
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u16 offset)
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{
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return bcma_read32(mcore->core, offset);
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}
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static u32 bcma_core_mips_irqflag(struct bcma_device *dev)
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{
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u32 flag;
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|
@ -140,17 +140,17 @@ static struct device_node *bcma_of_find_child_device(struct device *parent,
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struct bcma_device *core)
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{
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struct device_node *node;
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u64 size;
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const __be32 *reg;
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int ret;
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if (!parent->of_node)
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return NULL;
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for_each_child_of_node(parent->of_node, node) {
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reg = of_get_address(node, 0, &size, NULL);
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if (!reg)
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struct resource res;
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ret = of_address_to_resource(node, 0, &res);
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if (ret)
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continue;
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if (of_translate_address(node, reg) == core->addr)
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if (res.start == core->addr)
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return node;
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}
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return NULL;
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@ -127,14 +127,6 @@ static inline int next_slot(struct b43legacy_dmaring *ring, int slot)
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return slot + 1;
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}
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static inline int prev_slot(struct b43legacy_dmaring *ring, int slot)
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{
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B43legacy_WARN_ON(!(slot >= 0 && slot <= ring->nr_slots - 1));
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if (slot == 0)
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return ring->nr_slots - 1;
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return slot - 1;
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}
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#ifdef CONFIG_B43LEGACY_DEBUG
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static void update_max_used_slots(struct b43legacy_dmaring *ring,
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int current_used_slots)
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|
@ -1709,23 +1709,6 @@ u16 b43legacy_radio_init2050(struct b43legacy_wldev *dev)
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return ret;
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}
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static inline
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u16 freq_r3A_value(u16 frequency)
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{
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u16 value;
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if (frequency < 5091)
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value = 0x0040;
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else if (frequency < 5321)
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value = 0x0000;
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else if (frequency < 5806)
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value = 0x0080;
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else
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value = 0x0040;
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return value;
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}
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int b43legacy_radio_selectchannel(struct b43legacy_wldev *dev,
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u8 channel,
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int synthetic_pu_workaround)
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|
@ -845,7 +845,7 @@ brcms_c_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,
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u16 seq, start_seq = 0, bindex, index, mcl;
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u8 mcs = 0;
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bool ba_recd = false, ack_recd = false;
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u8 suc_mpdu = 0, tot_mpdu = 0;
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u8 tot_mpdu = 0;
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uint supr_status;
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bool retry = true;
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u16 mimoantsel = 0;
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@ -975,7 +975,6 @@ brcms_c_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb,
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ieee80211_tx_status_irqsafe(wlc->pub->ieee_hw,
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p);
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ack_recd = true;
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suc_mpdu++;
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}
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}
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/* either retransmit or send bar if ack not recd */
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@ -1048,7 +1048,6 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw)
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struct brcms_info *wl = hw->priv;
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struct brcms_c_info *wlc = wl->wlc;
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struct ieee80211_supported_band *band;
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int has_5g = 0;
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u16 phy_type;
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hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL;
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@ -1070,7 +1069,6 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw)
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/* Assume all bands use the same phy. True for 11n devices. */
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if (wl->pub->_nbands > 1) {
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has_5g++;
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if (phy_type == PHY_TYPE_N || phy_type == PHY_TYPE_LCN) {
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band = &wlc->bandstate[BAND_5G_INDEX]->band;
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*band = brcms_band_5GHz_nphy_template;
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@ -377,19 +377,6 @@ static inline u8 _ipw_read8(struct ipw_priv *ipw, unsigned long ofs)
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_ipw_read8(ipw, ofs); \
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})
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/* 16-bit direct read (low 4K) */
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static inline u16 _ipw_read16(struct ipw_priv *ipw, unsigned long ofs)
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{
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return readw(ipw->hw_base + ofs);
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}
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/* alias to 16-bit direct read (low 4K of SRAM/regs), with debug wrapper */
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#define ipw_read16(ipw, ofs) ({ \
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IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", __FILE__, __LINE__, \
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(u32)(ofs)); \
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_ipw_read16(ipw, ofs); \
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})
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/* 32-bit direct read (low 4K) */
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static inline u32 _ipw_read32(struct ipw_priv *ipw, unsigned long ofs)
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{
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|
@ -209,7 +209,7 @@ struct ndis_80211_status_indication {
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union {
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__le32 media_stream_mode;
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__le32 radio_status;
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struct ndis_80211_auth_request auth_request[0];
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DECLARE_FLEX_ARRAY(struct ndis_80211_auth_request, auth_request);
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struct ndis_80211_pmkid_cand_list cand_list;
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} u;
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} __packed;
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@ -1972,7 +1972,7 @@ static bool rndis_bss_info_update(struct usbnet *usbdev,
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if (bssid_len < sizeof(struct ndis_80211_bssid_ex) +
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sizeof(struct ndis_80211_fixed_ies))
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return NULL;
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return false;
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fixed = (struct ndis_80211_fixed_ies *)bssid->ies;
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@ -1981,13 +1981,13 @@ static bool rndis_bss_info_update(struct usbnet *usbdev,
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(int)le32_to_cpu(bssid->ie_length));
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ie_len -= sizeof(struct ndis_80211_fixed_ies);
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if (ie_len < 0)
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return NULL;
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return false;
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/* extract data for cfg80211_inform_bss */
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channel = ieee80211_get_channel(priv->wdev.wiphy,
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KHZ_TO_MHZ(le32_to_cpu(bssid->config.ds_config)));
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if (!channel)
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return NULL;
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return false;
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signal = level_to_qual(le32_to_cpu(bssid->rssi));
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timestamp = le64_to_cpu(*(__le64 *)fixed->timestamp);
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@ -195,7 +195,6 @@ int mwifiex_11h_handle_chanrpt_ready(struct mwifiex_private *priv,
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{
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struct host_cmd_ds_chan_rpt_event *rpt_event;
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struct mwifiex_ie_types_chan_rpt_data *rpt;
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u8 *evt_buf;
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u16 event_len, tlv_len;
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rpt_event = (void *)(skb->data + sizeof(u32));
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@ -208,8 +207,6 @@ int mwifiex_11h_handle_chanrpt_ready(struct mwifiex_private *priv,
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return -1;
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}
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evt_buf = (void *)&rpt_event->tlvbuf;
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while (event_len >= sizeof(struct mwifiex_ie_types_header)) {
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rpt = (void *)&rpt_event->tlvbuf;
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tlv_len = le16_to_cpu(rpt->header.len);
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@ -231,7 +228,6 @@ int mwifiex_11h_handle_chanrpt_ready(struct mwifiex_private *priv,
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break;
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}
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evt_buf += (tlv_len + sizeof(rpt->header));
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event_len -= (tlv_len + sizeof(rpt->header));
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}
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@ -1091,6 +1091,7 @@ static void rt2x00lib_remove_hw(struct rt2x00_dev *rt2x00dev)
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}
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kfree(rt2x00dev->spec.channels_info);
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kfree(rt2x00dev->chan_survey);
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}
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static const struct ieee80211_tpt_blink rt2x00_tpt_blink[] = {
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@ -278,8 +278,8 @@ static ssize_t rtl_debugfs_set_write_reg(struct file *filp,
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tmp_len = (count > sizeof(tmp) - 1 ? sizeof(tmp) - 1 : count);
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if (!buffer || copy_from_user(tmp, buffer, tmp_len))
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return count;
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if (copy_from_user(tmp, buffer, tmp_len))
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return -EFAULT;
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tmp[tmp_len] = '\0';
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@ -287,7 +287,7 @@ static ssize_t rtl_debugfs_set_write_reg(struct file *filp,
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num = sscanf(tmp, "%x %x %x", &addr, &val, &len);
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if (num != 3)
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return count;
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return -EINVAL;
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switch (len) {
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case 1:
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@ -375,8 +375,8 @@ static ssize_t rtl_debugfs_set_write_rfreg(struct file *filp,
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tmp_len = (count > sizeof(tmp) - 1 ? sizeof(tmp) - 1 : count);
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if (!buffer || copy_from_user(tmp, buffer, tmp_len))
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return count;
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if (copy_from_user(tmp, buffer, tmp_len))
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return -EFAULT;
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tmp[tmp_len] = '\0';
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@ -386,7 +386,7 @@ static ssize_t rtl_debugfs_set_write_rfreg(struct file *filp,
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if (num != 4) {
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rtl_dbg(rtlpriv, COMP_ERR, DBG_DMESG,
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"Format is <path> <addr> <mask> <data>\n");
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return count;
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return -EINVAL;
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}
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rtl_set_rfreg(hw, path, addr, bitmask, data);
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|
@ -2831,7 +2831,7 @@ struct rtl_priv {
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* beyond this structure like:
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* rtl_pci_priv or rtl_usb_priv
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*/
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u8 priv[0] __aligned(sizeof(void *));
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u8 priv[] __aligned(sizeof(void *));
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};
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#define rtl_priv(hw) (((struct rtl_priv *)(hw)->priv))
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|
@ -89,13 +89,6 @@ static void rtw_pci_write32(struct rtw_dev *rtwdev, u32 addr, u32 val)
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writel(val, rtwpci->mmap + addr);
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}
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|
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static inline void *rtw_pci_get_tx_desc(struct rtw_pci_tx_ring *tx_ring, u8 idx)
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{
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int offset = tx_ring->r.desc_size * idx;
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|
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return tx_ring->r.head + offset;
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}
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|
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static void rtw_pci_free_tx_ring_skbs(struct rtw_dev *rtwdev,
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struct rtw_pci_tx_ring *tx_ring)
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{
|
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@ -1552,7 +1545,6 @@ static int rtw_pci_claim(struct rtw_dev *rtwdev, struct pci_dev *pdev)
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|
||||
static void rtw_pci_declaim(struct rtw_dev *rtwdev, struct pci_dev *pdev)
|
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{
|
||||
pci_clear_master(pdev);
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pci_disable_device(pdev);
|
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}
|
||||
|
||||
|
@ -9,7 +9,7 @@
|
||||
#include "ps.h"
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||||
#include "reg.h"
|
||||
|
||||
#define RTW89_COEX_VERSION 0x07000013
|
||||
#define RTW89_COEX_VERSION 0x07000113
|
||||
#define FCXDEF_STEP 50 /* MUST <= FCXMAX_STEP and match with wl fw*/
|
||||
|
||||
enum btc_fbtc_tdma_template {
|
||||
@ -148,6 +148,13 @@ static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = {
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||||
.fwlrole = 1, .frptmap = 2, .fcxctrl = 1,
|
||||
.info_buf = 1280, .max_role_num = 5,
|
||||
},
|
||||
{RTL8852B, RTW89_FW_VER_CODE(0, 29, 29, 0),
|
||||
.fcxbtcrpt = 105, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 5,
|
||||
.fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 2, .fcxgpiodbg = 1,
|
||||
.fcxbtver = 1, .fcxbtscan = 2, .fcxbtafh = 2, .fcxbtdevinfo = 1,
|
||||
.fwlrole = 1, .frptmap = 3, .fcxctrl = 1,
|
||||
.info_buf = 1800, .max_role_num = 6,
|
||||
},
|
||||
{RTL8852B, RTW89_FW_VER_CODE(0, 29, 14, 0),
|
||||
.fcxbtcrpt = 5, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 4,
|
||||
.fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1,
|
||||
@ -1022,6 +1029,11 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
||||
} else if (ver->fcxbtcrpt == 5) {
|
||||
pfinfo = &pfwinfo->rpt_ctrl.finfo.v5;
|
||||
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v5);
|
||||
} else if (ver->fcxbtcrpt == 105) {
|
||||
pfinfo = &pfwinfo->rpt_ctrl.finfo.v105;
|
||||
pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v105);
|
||||
pcinfo->req_fver = 5;
|
||||
break;
|
||||
} else {
|
||||
goto err;
|
||||
}
|
||||
@ -1263,6 +1275,33 @@ static u32 _chk_btc_report(struct rtw89_dev *rtwdev,
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG,
|
||||
pfwinfo->event[BTF_EVNT_RPT]);
|
||||
|
||||
dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
|
||||
} else if (ver->fcxbtcrpt == 105) {
|
||||
prpt->v105 = pfwinfo->rpt_ctrl.finfo.v105;
|
||||
pfwinfo->rpt_en_map = le32_to_cpu(prpt->v105.rpt_info.en);
|
||||
wl->ver_info.fw_coex = le32_to_cpu(prpt->v105.rpt_info.cx_ver);
|
||||
wl->ver_info.fw = le32_to_cpu(prpt->v105.rpt_info.fw_ver);
|
||||
dm->wl_fw_cx_offload = 0;
|
||||
|
||||
for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++)
|
||||
memcpy(&dm->gnt.band[i], &prpt->v105.gnt_val[i][0],
|
||||
sizeof(dm->gnt.band[i]));
|
||||
|
||||
btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] =
|
||||
le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_TX_V105]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] =
|
||||
le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_RX_V105]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] =
|
||||
le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_TX_V105]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] =
|
||||
le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_RX_V105]);
|
||||
btc->cx.cnt_bt[BTC_BCNT_POLUT] =
|
||||
le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_POLLUTED_V105]);
|
||||
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_BTCNT_HANG, 0);
|
||||
_chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG,
|
||||
pfwinfo->event[BTF_EVNT_RPT]);
|
||||
|
||||
dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout;
|
||||
} else {
|
||||
goto err;
|
||||
@ -1741,10 +1780,14 @@ static void rtw89_btc_fw_en_rpt(struct rtw89_dev *rtwdev,
|
||||
u32 rpt_map, bool rpt_state)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
struct rtw89_btc_wl_smap *wl_smap = &btc->cx.wl.status.map;
|
||||
struct rtw89_btc_btf_fwinfo *fwinfo = &btc->fwinfo;
|
||||
struct rtw89_btc_btf_set_report r = {0};
|
||||
u32 val, bit_map;
|
||||
|
||||
if ((wl_smap->rf_off || wl_smap->lps != BTC_LPS_OFF) && rpt_state != 0)
|
||||
return;
|
||||
|
||||
bit_map = rtw89_btc_fw_rpt_ver(rtwdev, rpt_map);
|
||||
|
||||
rtw89_debug(rtwdev, RTW89_DBG_BTC,
|
||||
@ -5728,6 +5771,11 @@ void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_sta
|
||||
wl->status.map.lps = BTC_LPS_RF_OFF;
|
||||
wl->status.map.busy = 0;
|
||||
break;
|
||||
case BTC_RFCTRL_LPS_WL_ON: /* LPS-Protocol (RFon) */
|
||||
wl->status.map.rf_off = 0;
|
||||
wl->status.map.lps = BTC_LPS_RF_ON;
|
||||
wl->status.map.busy = 0;
|
||||
break;
|
||||
case BTC_RFCTRL_WL_ON:
|
||||
default:
|
||||
wl->status.map.rf_off = 0;
|
||||
@ -5745,6 +5793,9 @@ void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_sta
|
||||
rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_ALL, false);
|
||||
if (rf_state == BTC_RFCTRL_WL_OFF)
|
||||
_write_scbd(rtwdev, BTC_WSCB_ALL, false);
|
||||
else if (rf_state == BTC_RFCTRL_LPS_WL_ON &&
|
||||
wl->status.map.lps_pre != BTC_LPS_OFF)
|
||||
_update_bt_scbd(rtwdev, true);
|
||||
}
|
||||
|
||||
btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0;
|
||||
@ -5755,7 +5806,7 @@ void rtw89_btc_ntfy_radio_state(struct rtw89_dev *rtwdev, enum btc_rfctrl rf_sta
|
||||
btc->dm.tdma_instant_excute = 0;
|
||||
|
||||
_run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE);
|
||||
|
||||
btc->dm.tdma_instant_excute = 0;
|
||||
wl->status.map.rf_off_pre = wl->status.map.rf_off;
|
||||
wl->status.map.lps_pre = wl->status.map.lps;
|
||||
}
|
||||
@ -8153,7 +8204,121 @@ static void _show_summary_v5(struct rtw89_dev *rtwdev, struct seq_file *m)
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on),
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off));
|
||||
} else {
|
||||
seq_printf(m,
|
||||
" %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d",
|
||||
"[summary]", pfwinfo->cnt_h2c,
|
||||
pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h);
|
||||
}
|
||||
|
||||
if (!pcinfo->valid || pfwinfo->len_mismch || pfwinfo->fver_mismch ||
|
||||
pfwinfo->err[BTFRE_EXCEPTION]) {
|
||||
seq_puts(m, "\n");
|
||||
seq_printf(m,
|
||||
" %-15s : WL FW rpt error!![rpt_ctrl_valid:%d/len:"
|
||||
"0x%x/ver:0x%x/ex:%d/lps=%d/rf_off=%d]",
|
||||
"[ERROR]", pcinfo->valid, pfwinfo->len_mismch,
|
||||
pfwinfo->fver_mismch, pfwinfo->err[BTFRE_EXCEPTION],
|
||||
wl->status.map.lps, wl->status.map.rf_off);
|
||||
}
|
||||
|
||||
for (i = 0; i < BTC_NCNT_NUM; i++)
|
||||
cnt_sum += dm->cnt_notify[i];
|
||||
|
||||
seq_puts(m, "\n");
|
||||
seq_printf(m,
|
||||
" %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ",
|
||||
"[notify_cnt]",
|
||||
cnt_sum, cnt[BTC_NCNT_SHOW_COEX_INFO],
|
||||
cnt[BTC_NCNT_POWER_ON], cnt[BTC_NCNT_INIT_COEX]);
|
||||
|
||||
seq_printf(m,
|
||||
"power_off=%d, radio_state=%d, role_info=%d, wl_rfk=%d, wl_sta=%d",
|
||||
cnt[BTC_NCNT_POWER_OFF], cnt[BTC_NCNT_RADIO_STATE],
|
||||
cnt[BTC_NCNT_ROLE_INFO], cnt[BTC_NCNT_WL_RFK],
|
||||
cnt[BTC_NCNT_WL_STA]);
|
||||
|
||||
seq_puts(m, "\n");
|
||||
seq_printf(m,
|
||||
" %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ",
|
||||
"[notify_cnt]",
|
||||
cnt[BTC_NCNT_SCAN_START], cnt[BTC_NCNT_SCAN_FINISH],
|
||||
cnt[BTC_NCNT_SWITCH_BAND], cnt[BTC_NCNT_SPECIAL_PACKET]);
|
||||
|
||||
seq_printf(m,
|
||||
"timer=%d, control=%d, customerize=%d",
|
||||
cnt[BTC_NCNT_TIMER], cnt[BTC_NCNT_CONTROL],
|
||||
cnt[BTC_NCNT_CUSTOMERIZE]);
|
||||
}
|
||||
|
||||
static void _show_summary_v105(struct rtw89_dev *rtwdev, struct seq_file *m)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v105 *prptctrl;
|
||||
struct rtw89_btc_rpt_cmn_info *pcinfo;
|
||||
struct rtw89_btc_cx *cx = &btc->cx;
|
||||
struct rtw89_btc_dm *dm = &btc->dm;
|
||||
struct rtw89_btc_wl_info *wl = &cx->wl;
|
||||
u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify;
|
||||
u8 i;
|
||||
|
||||
if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY))
|
||||
return;
|
||||
|
||||
seq_puts(m, "========== [Statistics] ==========\n");
|
||||
|
||||
pcinfo = &pfwinfo->rpt_ctrl.cinfo;
|
||||
if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) {
|
||||
prptctrl = &pfwinfo->rpt_ctrl.finfo.v105;
|
||||
|
||||
seq_printf(m,
|
||||
" %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d), ",
|
||||
"[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail,
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_h2c),
|
||||
pfwinfo->cnt_c2h,
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_c2h),
|
||||
le16_to_cpu(prptctrl->rpt_info.len_c2h));
|
||||
|
||||
seq_printf(m,
|
||||
"rpt_cnt=%d(fw_send:%d), rpt_map=0x%x",
|
||||
pfwinfo->event[BTF_EVNT_RPT],
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt),
|
||||
le32_to_cpu(prptctrl->rpt_info.en));
|
||||
|
||||
if (dm->error.map.wl_fw_hang)
|
||||
seq_puts(m, " (WL FW Hang!!)");
|
||||
seq_puts(m, "\n");
|
||||
seq_printf(m,
|
||||
" %-15s : send_ok:%d, send_fail:%d, recv:%d, ",
|
||||
"[mailbox]",
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv));
|
||||
|
||||
seq_printf(m,
|
||||
"A2DP_empty:%d(stop:%d, tx:%d, ack:%d, nack:%d)\n",
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack),
|
||||
le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack));
|
||||
|
||||
seq_printf(m,
|
||||
" %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d]",
|
||||
"[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ],
|
||||
cx->cnt_wl[BTC_WCNT_RFK_GO],
|
||||
cx->cnt_wl[BTC_WCNT_RFK_REJECT],
|
||||
cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]);
|
||||
|
||||
seq_printf(m,
|
||||
", bt_rfk[req:%d]",
|
||||
le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ]));
|
||||
|
||||
seq_printf(m,
|
||||
", AOAC[RF_on:%d/RF_off:%d]",
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on),
|
||||
le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off));
|
||||
} else {
|
||||
seq_printf(m,
|
||||
" %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d",
|
||||
"[summary]", pfwinfo->cnt_h2c,
|
||||
@ -8244,6 +8409,8 @@ void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m)
|
||||
_show_summary_v4(rtwdev, m);
|
||||
else if (ver->fcxbtcrpt == 5)
|
||||
_show_summary_v5(rtwdev, m);
|
||||
else if (ver->fcxbtcrpt == 105)
|
||||
_show_summary_v105(rtwdev, m);
|
||||
}
|
||||
|
||||
void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev)
|
||||
|
@ -131,6 +131,7 @@ enum btc_role_state {
|
||||
enum btc_rfctrl {
|
||||
BTC_RFCTRL_WL_OFF,
|
||||
BTC_RFCTRL_WL_ON,
|
||||
BTC_RFCTRL_LPS_WL_ON,
|
||||
BTC_RFCTRL_FW_CTRL,
|
||||
BTC_RFCTRL_MAX
|
||||
};
|
||||
|
@ -686,6 +686,33 @@ desc_bk:
|
||||
desc_info->bk = true;
|
||||
}
|
||||
|
||||
static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_core_tx_request *tx_req)
|
||||
{
|
||||
struct ieee80211_vif *vif = tx_req->vif;
|
||||
struct ieee80211_sta *sta = tx_req->sta;
|
||||
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
|
||||
struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
|
||||
enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx;
|
||||
const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx);
|
||||
u16 lowest_rate;
|
||||
|
||||
if (rate_pattern->enable)
|
||||
return rate_pattern->rate;
|
||||
|
||||
if (vif->p2p)
|
||||
lowest_rate = RTW89_HW_RATE_OFDM6;
|
||||
else if (chan->band_type == RTW89_BAND_2G)
|
||||
lowest_rate = RTW89_HW_RATE_CCK1;
|
||||
else
|
||||
lowest_rate = RTW89_HW_RATE_OFDM6;
|
||||
|
||||
if (!sta->deflink.supp_rates[chan->band_type])
|
||||
return lowest_rate;
|
||||
|
||||
return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate;
|
||||
}
|
||||
|
||||
static void
|
||||
rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_core_tx_request *tx_req)
|
||||
@ -694,8 +721,6 @@ rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
|
||||
struct ieee80211_sta *sta = tx_req->sta;
|
||||
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
|
||||
struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta);
|
||||
struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern;
|
||||
const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0);
|
||||
struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info;
|
||||
struct sk_buff *skb = tx_req->skb;
|
||||
u8 tid, tid_indicate;
|
||||
@ -719,14 +744,7 @@ rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev,
|
||||
if (IEEE80211_SKB_CB(skb)->control.hw_key)
|
||||
rtw89_core_tx_update_sec_key(rtwdev, tx_req);
|
||||
|
||||
if (vif->p2p)
|
||||
desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6;
|
||||
else if (rate_pattern->enable)
|
||||
desc_info->data_retry_lowest_rate = rate_pattern->rate;
|
||||
else if (chan->band_type == RTW89_BAND_2G)
|
||||
desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1;
|
||||
else
|
||||
desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6;
|
||||
desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req);
|
||||
}
|
||||
|
||||
static enum btc_pkt_type
|
||||
@ -1202,6 +1220,10 @@ static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr,
|
||||
phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr);
|
||||
if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6)
|
||||
return;
|
||||
|
||||
if (!phy_ppdu->to_self)
|
||||
return;
|
||||
|
||||
/* sign conversion for S(12,2) */
|
||||
if (rtwdev->chip->cfo_src_fd)
|
||||
cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11);
|
||||
@ -1266,9 +1288,6 @@ static int rtw89_core_rx_parse_phy_sts(struct rtw89_dev *rtwdev,
|
||||
if (phy_ppdu->ie < RTW89_CCK_PKT)
|
||||
return -EINVAL;
|
||||
|
||||
if (!phy_ppdu->to_self)
|
||||
return 0;
|
||||
|
||||
pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN;
|
||||
end = (u8 *)phy_ppdu->buf + phy_ppdu->len;
|
||||
while (pos < end) {
|
||||
@ -3245,6 +3264,7 @@ void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif,
|
||||
rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type);
|
||||
rtw89_chip_rfk_scan(rtwdev, true);
|
||||
rtw89_hci_recalc_int_mit(rtwdev);
|
||||
rtw89_phy_config_edcca(rtwdev, true);
|
||||
|
||||
rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr);
|
||||
}
|
||||
@ -3262,6 +3282,7 @@ void rtw89_core_scan_complete(struct rtw89_dev *rtwdev,
|
||||
|
||||
rtw89_chip_rfk_scan(rtwdev, false);
|
||||
rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0);
|
||||
rtw89_phy_config_edcca(rtwdev, false);
|
||||
|
||||
rtwdev->scanning = false;
|
||||
rtwdev->dig.bypass_dig = true;
|
||||
@ -3434,18 +3455,22 @@ static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
|
||||
ret = ieee80211_register_hw(hw);
|
||||
if (ret) {
|
||||
rtw89_err(rtwdev, "failed to register hw\n");
|
||||
goto err;
|
||||
goto err_free_supported_band;
|
||||
}
|
||||
|
||||
ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier);
|
||||
if (ret) {
|
||||
rtw89_err(rtwdev, "failed to init regd\n");
|
||||
goto err;
|
||||
goto err_unregister_hw;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
err_unregister_hw:
|
||||
ieee80211_unregister_hw(hw);
|
||||
err_free_supported_band:
|
||||
rtw89_core_clr_supported_band(rtwdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
@ -1576,6 +1576,16 @@ enum rtw89_btc_bt_sta_counter {
|
||||
BTC_BCNT_STA_MAX
|
||||
};
|
||||
|
||||
enum rtw89_btc_bt_sta_counter_v105 {
|
||||
BTC_BCNT_RFK_REQ_V105 = 0,
|
||||
BTC_BCNT_HI_TX_V105 = 1,
|
||||
BTC_BCNT_HI_RX_V105 = 2,
|
||||
BTC_BCNT_LO_TX_V105 = 3,
|
||||
BTC_BCNT_LO_RX_V105 = 4,
|
||||
BTC_BCNT_POLLUTED_V105 = 5,
|
||||
BTC_BCNT_STA_MAX_V105
|
||||
};
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v1 {
|
||||
u16 fver; /* btc_ver::fcxbtcrpt */
|
||||
u16 rpt_cnt; /* tmr counters */
|
||||
@ -1666,10 +1676,23 @@ struct rtw89_btc_fbtc_rpt_ctrl_v5 {
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info;
|
||||
} __packed;
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v105 {
|
||||
u8 fver;
|
||||
u8 rsvd;
|
||||
__le16 rsvd1;
|
||||
|
||||
u8 gnt_val[RTW89_PHY_MAX][4];
|
||||
__le16 bt_cnt[BTC_BCNT_STA_MAX_V105];
|
||||
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_info_v5 rpt_info;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info;
|
||||
} __packed;
|
||||
|
||||
union rtw89_btc_fbtc_rpt_ctrl_ver_info {
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v1 v1;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v4 v4;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v5 v5;
|
||||
struct rtw89_btc_fbtc_rpt_ctrl_v105 v105;
|
||||
};
|
||||
|
||||
enum rtw89_fbtc_ext_ctrl_type {
|
||||
@ -2186,12 +2209,13 @@ struct rtw89_btc_dm {
|
||||
u32 wl_stb_chg: 1;
|
||||
u32 pta_owner: 1;
|
||||
u32 tdma_instant_excute: 1;
|
||||
u32 rsvd: 1;
|
||||
|
||||
u16 slot_dur[CXST_MAX];
|
||||
|
||||
u8 run_reason;
|
||||
u8 run_action;
|
||||
|
||||
u8 wl_lna2: 1;
|
||||
};
|
||||
|
||||
struct rtw89_btc_ctrl {
|
||||
@ -3116,8 +3140,10 @@ struct rtw89_chip_info {
|
||||
u32 txwd_body_size;
|
||||
u32 h2c_ctrl_reg;
|
||||
const u32 *h2c_regs;
|
||||
struct rtw89_reg_def h2c_counter_reg;
|
||||
u32 c2h_ctrl_reg;
|
||||
const u32 *c2h_regs;
|
||||
struct rtw89_reg_def c2h_counter_reg;
|
||||
const struct rtw89_page_regs *page_regs;
|
||||
bool cfo_src_fd;
|
||||
const struct rtw89_reg_def *dcfo_comp;
|
||||
@ -3126,6 +3152,7 @@ struct rtw89_chip_info {
|
||||
const struct rtw89_rrsr_cfgs *rrsr_cfgs;
|
||||
u32 bss_clr_map_reg;
|
||||
u32 dma_ch_mask;
|
||||
u32 edcca_lvl_reg;
|
||||
const struct wiphy_wowlan_support *wowlan_stub;
|
||||
};
|
||||
|
||||
@ -3244,6 +3271,8 @@ struct rtw89_fw_info {
|
||||
struct completion completion;
|
||||
u8 h2c_seq;
|
||||
u8 rec_seq;
|
||||
u8 h2c_counter;
|
||||
u8 c2h_counter;
|
||||
struct rtw89_fw_suit normal;
|
||||
struct rtw89_fw_suit wowlan;
|
||||
bool fw_log_enable;
|
||||
@ -3335,6 +3364,8 @@ struct rtw89_hal {
|
||||
|
||||
bool entity_active;
|
||||
enum rtw89_entity_mode entity_mode;
|
||||
|
||||
u32 edcca_bak;
|
||||
};
|
||||
|
||||
#define RTW89_MAX_MAC_ID_NUM 128
|
||||
|
@ -615,6 +615,8 @@ int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type)
|
||||
|
||||
fw_info->h2c_seq = 0;
|
||||
fw_info->rec_seq = 0;
|
||||
fw_info->h2c_counter = 0;
|
||||
fw_info->c2h_counter = 0;
|
||||
rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX;
|
||||
rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX;
|
||||
|
||||
@ -2724,6 +2726,7 @@ static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_mac_h2c_info *info)
|
||||
{
|
||||
const struct rtw89_chip_info *chip = rtwdev->chip;
|
||||
struct rtw89_fw_info *fw_info = &rtwdev->fw;
|
||||
const u32 *h2c_reg = chip->h2c_regs;
|
||||
u8 i, val, len;
|
||||
int ret;
|
||||
@ -2743,6 +2746,9 @@ static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev,
|
||||
for (i = 0; i < RTW89_H2CREG_MAX; i++)
|
||||
rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]);
|
||||
|
||||
fw_info->h2c_counter++;
|
||||
rtw89_write8_mask(rtwdev, chip->h2c_counter_reg.addr,
|
||||
chip->h2c_counter_reg.mask, fw_info->h2c_counter);
|
||||
rtw89_write8(rtwdev, chip->h2c_ctrl_reg, B_AX_H2CREG_TRIGGER);
|
||||
|
||||
return 0;
|
||||
@ -2752,6 +2758,7 @@ static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev,
|
||||
struct rtw89_mac_c2h_info *info)
|
||||
{
|
||||
const struct rtw89_chip_info *chip = rtwdev->chip;
|
||||
struct rtw89_fw_info *fw_info = &rtwdev->fw;
|
||||
const u32 *c2h_reg = chip->c2h_regs;
|
||||
u32 ret;
|
||||
u8 i, val;
|
||||
@ -2775,6 +2782,10 @@ static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev,
|
||||
info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) -
|
||||
RTW89_C2HREG_HDR_LEN;
|
||||
|
||||
fw_info->c2h_counter++;
|
||||
rtw89_write8_mask(rtwdev, chip->c2h_counter_reg.addr,
|
||||
chip->c2h_counter_reg.mask, fw_info->c2h_counter);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -3398,6 +3398,8 @@ int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw)
|
||||
if (rtw89_read32(rtwdev, R_AX_PLATFORM_ENABLE) & B_AX_WCPU_EN)
|
||||
return -EFAULT;
|
||||
|
||||
rtw89_write32(rtwdev, R_AX_UDM1, 0);
|
||||
rtw89_write32(rtwdev, R_AX_UDM2, 0);
|
||||
rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0);
|
||||
rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0);
|
||||
rtw89_write32(rtwdev, R_AX_HALT_H2C, 0);
|
||||
|
@ -2694,7 +2694,6 @@ static int rtw89_pci_claim_device(struct rtw89_dev *rtwdev,
|
||||
static void rtw89_pci_declaim_device(struct rtw89_dev *rtwdev,
|
||||
struct pci_dev *pdev)
|
||||
{
|
||||
pci_clear_master(pdev);
|
||||
pci_disable_device(pdev);
|
||||
}
|
||||
|
||||
@ -3874,25 +3873,26 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
rtw89_pci_link_cfg(rtwdev);
|
||||
rtw89_pci_l1ss_cfg(rtwdev);
|
||||
|
||||
ret = rtw89_core_register(rtwdev);
|
||||
if (ret) {
|
||||
rtw89_err(rtwdev, "failed to register core\n");
|
||||
goto err_clear_resource;
|
||||
}
|
||||
|
||||
rtw89_core_napi_init(rtwdev);
|
||||
|
||||
ret = rtw89_pci_request_irq(rtwdev, pdev);
|
||||
if (ret) {
|
||||
rtw89_err(rtwdev, "failed to request pci irq\n");
|
||||
goto err_unregister;
|
||||
goto err_deinit_napi;
|
||||
}
|
||||
|
||||
ret = rtw89_core_register(rtwdev);
|
||||
if (ret) {
|
||||
rtw89_err(rtwdev, "failed to register core\n");
|
||||
goto err_free_irq;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister:
|
||||
err_free_irq:
|
||||
rtw89_pci_free_irq(rtwdev, pdev);
|
||||
err_deinit_napi:
|
||||
rtw89_core_napi_deinit(rtwdev);
|
||||
rtw89_core_unregister(rtwdev);
|
||||
err_clear_resource:
|
||||
rtw89_pci_clear_resource(rtwdev, pdev);
|
||||
err_declaim_pci:
|
||||
|
@ -4366,3 +4366,22 @@ void rtw89_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx,
|
||||
*ch = rtw89_ch_base_table[idx] + (offset << 1);
|
||||
}
|
||||
EXPORT_SYMBOL(rtw89_decode_chan_idx);
|
||||
|
||||
#define EDCCA_DEFAULT 249
|
||||
void rtw89_phy_config_edcca(struct rtw89_dev *rtwdev, bool scan)
|
||||
{
|
||||
u32 reg = rtwdev->chip->edcca_lvl_reg;
|
||||
struct rtw89_hal *hal = &rtwdev->hal;
|
||||
u32 val;
|
||||
|
||||
if (scan) {
|
||||
hal->edcca_bak = rtw89_phy_read32(rtwdev, reg);
|
||||
val = hal->edcca_bak;
|
||||
u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_EDCCA_LVL_A_MSK);
|
||||
u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_EDCCA_LVL_P_MSK);
|
||||
u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_PPDU_LVL_MSK);
|
||||
rtw89_phy_write32(rtwdev, reg, val);
|
||||
} else {
|
||||
rtw89_phy_write32(rtwdev, reg, hal->edcca_bak);
|
||||
}
|
||||
}
|
||||
|
@ -558,5 +558,6 @@ void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev);
|
||||
u8 rtw89_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band);
|
||||
void rtw89_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx,
|
||||
u8 *ch, enum nl80211_band *band);
|
||||
void rtw89_phy_config_edcca(struct rtw89_dev *rtwdev, bool scan);
|
||||
|
||||
#endif
|
||||
|
@ -207,6 +207,11 @@
|
||||
|
||||
#define R_AX_UDM0 0x01F0
|
||||
#define R_AX_UDM1 0x01F4
|
||||
#define B_AX_UDM1_MASK GENMASK(31, 16)
|
||||
#define B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK GENMASK(15, 12)
|
||||
#define B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK GENMASK(11, 8)
|
||||
#define B_AX_UDM1_WCPU_C2H_ENQ_CNT_MASK GENMASK(7, 4)
|
||||
#define B_AX_UDM1_WCPU_H2C_DEQ_CNT_MASK GENMASK(3, 0)
|
||||
#define R_AX_UDM2 0x01F8
|
||||
#define R_AX_UDM3 0x01FC
|
||||
|
||||
@ -4275,6 +4280,11 @@
|
||||
#define B_PKT_POP_EN BIT(8)
|
||||
#define R_SEG0R_PD 0x481C
|
||||
#define R_SEG0R_PD_V1 0x4860
|
||||
#define R_SEG0R_EDCCA_LVL 0x4840
|
||||
#define R_SEG0R_EDCCA_LVL_V1 0x4884
|
||||
#define B_SEG0R_PPDU_LVL_MSK GENMASK(31, 24)
|
||||
#define B_SEG0R_EDCCA_LVL_P_MSK GENMASK(15, 8)
|
||||
#define B_SEG0R_EDCCA_LVL_A_MSK GENMASK(7, 0)
|
||||
#define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30)
|
||||
#define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29)
|
||||
#define B_SEG0R_PD_LOWER_BOUND_MSK GENMASK(10, 6)
|
||||
|
@ -1947,20 +1947,25 @@ static void rtw8852a_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level)
|
||||
|
||||
static void rtw8852a_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
|
||||
switch (level) {
|
||||
case 0: /* original */
|
||||
default:
|
||||
rtw8852a_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
rtw8852a_set_wl_lna2(rtwdev, 0);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 1: /* for FDD free-run */
|
||||
rtw8852a_bb_ctrl_btc_preagc(rtwdev, true);
|
||||
rtw8852a_set_wl_lna2(rtwdev, 0);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 2: /* for BTG Co-Rx*/
|
||||
rtw8852a_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
rtw8852a_set_wl_lna2(rtwdev, 1);
|
||||
btc->dm.wl_lna2 = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
rtw8852a_set_wl_lna2(rtwdev, btc->dm.wl_lna2);
|
||||
}
|
||||
|
||||
static void rtw8852a_fill_freq_with_ppdu(struct rtw89_dev *rtwdev,
|
||||
@ -2131,9 +2136,11 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
|
||||
.h2c_desc_size = sizeof(struct rtw89_txwd_body),
|
||||
.txwd_body_size = sizeof(struct rtw89_txwd_body),
|
||||
.h2c_ctrl_reg = R_AX_H2CREG_CTRL,
|
||||
.h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8},
|
||||
.h2c_regs = rtw8852a_h2c_regs,
|
||||
.c2h_ctrl_reg = R_AX_C2HREG_CTRL,
|
||||
.c2h_regs = rtw8852a_c2h_regs,
|
||||
.c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
|
||||
.page_regs = &rtw8852a_page_regs,
|
||||
.cfo_src_fd = false,
|
||||
.dcfo_comp = &rtw8852a_dcfo_comp,
|
||||
@ -2142,6 +2149,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
|
||||
.rrsr_cfgs = &rtw8852a_rrsr_cfgs,
|
||||
.bss_clr_map_reg = R_BSS_CLR_MAP,
|
||||
.dma_ch_mask = 0,
|
||||
.edcca_lvl_reg = R_SEG0R_EDCCA_LVL,
|
||||
#ifdef CONFIG_PM
|
||||
.wowlan_stub = &rtw_wowlan_stub_8852a,
|
||||
#endif
|
||||
|
@ -2284,15 +2284,64 @@ static void rtw8852b_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state)
|
||||
|
||||
/* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */
|
||||
if (state)
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x579);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x179);
|
||||
else
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x20);
|
||||
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0);
|
||||
}
|
||||
|
||||
static void rtw8852b_btc_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level)
|
||||
{
|
||||
switch (level) {
|
||||
case 0: /* default */
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0);
|
||||
break;
|
||||
case 1: /* Fix LNA2=5 */
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5);
|
||||
rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void rtw8852b_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
|
||||
switch (level) {
|
||||
case 0: /* original */
|
||||
default:
|
||||
rtw8852b_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 1: /* for FDD free-run */
|
||||
rtw8852b_bb_ctrl_btc_preagc(rtwdev, true);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 2: /* for BTG Co-Rx*/
|
||||
rtw8852b_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
btc->dm.wl_lna2 = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
rtw8852b_btc_set_wl_lna2(rtwdev, btc->dm.wl_lna2);
|
||||
}
|
||||
|
||||
static void rtw8852b_fill_freq_with_ppdu(struct rtw89_dev *rtwdev,
|
||||
@ -2508,8 +2557,10 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
|
||||
.h2c_desc_size = sizeof(struct rtw89_txwd_body),
|
||||
.txwd_body_size = sizeof(struct rtw89_txwd_body),
|
||||
.h2c_ctrl_reg = R_AX_H2CREG_CTRL,
|
||||
.h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8},
|
||||
.h2c_regs = rtw8852b_h2c_regs,
|
||||
.c2h_ctrl_reg = R_AX_C2HREG_CTRL,
|
||||
.c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
|
||||
.c2h_regs = rtw8852b_c2h_regs,
|
||||
.page_regs = &rtw8852b_page_regs,
|
||||
.cfo_src_fd = true,
|
||||
@ -2521,6 +2572,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
|
||||
.dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) |
|
||||
BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) |
|
||||
BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI),
|
||||
.edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1,
|
||||
};
|
||||
EXPORT_SYMBOL(rtw8852b_chip_info);
|
||||
|
||||
|
@ -2633,20 +2633,25 @@ static void rtw8852c_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level)
|
||||
|
||||
static void rtw8852c_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level)
|
||||
{
|
||||
struct rtw89_btc *btc = &rtwdev->btc;
|
||||
|
||||
switch (level) {
|
||||
case 0: /* original */
|
||||
default:
|
||||
rtw8852c_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
rtw8852c_set_wl_lna2(rtwdev, 0);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 1: /* for FDD free-run */
|
||||
rtw8852c_bb_ctrl_btc_preagc(rtwdev, true);
|
||||
rtw8852c_set_wl_lna2(rtwdev, 0);
|
||||
btc->dm.wl_lna2 = 0;
|
||||
break;
|
||||
case 2: /* for BTG Co-Rx*/
|
||||
rtw8852c_bb_ctrl_btc_preagc(rtwdev, false);
|
||||
rtw8852c_set_wl_lna2(rtwdev, 1);
|
||||
btc->dm.wl_lna2 = 1;
|
||||
break;
|
||||
}
|
||||
|
||||
rtw8852c_set_wl_lna2(rtwdev, btc->dm.wl_lna2);
|
||||
}
|
||||
|
||||
static void rtw8852c_fill_freq_with_ppdu(struct rtw89_dev *rtwdev,
|
||||
@ -2867,8 +2872,10 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
|
||||
.h2c_desc_size = sizeof(struct rtw89_rxdesc_short),
|
||||
.txwd_body_size = sizeof(struct rtw89_txwd_body_v1),
|
||||
.h2c_ctrl_reg = R_AX_H2CREG_CTRL_V1,
|
||||
.h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8},
|
||||
.h2c_regs = rtw8852c_h2c_regs,
|
||||
.c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1,
|
||||
.c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8},
|
||||
.c2h_regs = rtw8852c_c2h_regs,
|
||||
.page_regs = &rtw8852c_page_regs,
|
||||
.cfo_src_fd = false,
|
||||
@ -2878,6 +2885,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
|
||||
.rrsr_cfgs = &rtw8852c_rrsr_cfgs,
|
||||
.bss_clr_map_reg = R_BSS_CLR_MAP,
|
||||
.dma_ch_mask = 0,
|
||||
.edcca_lvl_reg = R_SEG0R_EDCCA_LVL,
|
||||
#ifdef CONFIG_PM
|
||||
.wowlan_stub = &rtw_wowlan_stub_8852c,
|
||||
#endif
|
||||
|
@ -420,14 +420,11 @@ static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow)
|
||||
struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv;
|
||||
struct ieee80211_sta *wow_sta;
|
||||
struct rtw89_sta *rtwsta = NULL;
|
||||
bool is_conn = true;
|
||||
int ret;
|
||||
|
||||
wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid);
|
||||
if (wow_sta)
|
||||
rtwsta = (struct rtw89_sta *)wow_sta->drv_priv;
|
||||
else
|
||||
is_conn = false;
|
||||
|
||||
if (wow) {
|
||||
if (rtw_wow->pattern_cnt)
|
||||
@ -454,12 +451,6 @@ static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow)
|
||||
}
|
||||
}
|
||||
|
||||
ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn);
|
||||
if (ret) {
|
||||
rtw89_warn(rtwdev, "failed to send h2c join info\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL);
|
||||
if (ret) {
|
||||
rtw89_warn(rtwdev, "failed to send h2c cam\n");
|
||||
|
@ -1127,6 +1127,9 @@ int rsi_set_channel(struct rsi_common *common,
|
||||
rsi_dbg(MGMT_TX_ZONE,
|
||||
"%s: Sending scan req frame\n", __func__);
|
||||
|
||||
if (!channel)
|
||||
return 0;
|
||||
|
||||
skb = dev_alloc_skb(frame_len);
|
||||
if (!skb) {
|
||||
rsi_dbg(ERR_ZONE, "%s: Failed in allocation of skb\n",
|
||||
@ -1134,10 +1137,6 @@ int rsi_set_channel(struct rsi_common *common,
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
if (!channel) {
|
||||
dev_kfree_skb(skb);
|
||||
return 0;
|
||||
}
|
||||
memset(skb->data, 0, frame_len);
|
||||
chan_cfg = (struct rsi_chan_config *)skb->data;
|
||||
|
||||
|
@ -2479,6 +2479,8 @@ void ieee80211_ie_build_he_6ghz_cap(struct ieee80211_sub_if_data *sdata,
|
||||
enum ieee80211_smps_mode smps_mode,
|
||||
struct sk_buff *skb);
|
||||
u8 *ieee80211_ie_build_he_oper(u8 *pos, struct cfg80211_chan_def *chandef);
|
||||
u8 *ieee80211_ie_build_eht_oper(u8 *pos, struct cfg80211_chan_def *chandef,
|
||||
const struct ieee80211_sta_eht_cap *eht_cap);
|
||||
int ieee80211_parse_bitrates(enum nl80211_chan_width width,
|
||||
const struct ieee80211_supported_band *sband,
|
||||
const u8 *srates, int srates_len, u32 *rates);
|
||||
|
@ -105,7 +105,7 @@ bool mesh_matches_local(struct ieee80211_sub_if_data *sdata,
|
||||
ieee80211_chandef_vht_oper(&sdata->local->hw, vht_cap_info,
|
||||
ie->vht_operation, ie->ht_operation,
|
||||
&sta_chan_def);
|
||||
ieee80211_chandef_he_6ghz_oper(sdata, ie->he_operation, NULL,
|
||||
ieee80211_chandef_he_6ghz_oper(sdata, ie->he_operation, ie->eht_operation,
|
||||
&sta_chan_def);
|
||||
|
||||
if (!cfg80211_chandef_compatible(&sdata->vif.bss_conf.chandef,
|
||||
@ -639,6 +639,65 @@ int mesh_add_he_6ghz_cap_ie(struct ieee80211_sub_if_data *sdata,
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mesh_add_eht_cap_ie(struct ieee80211_sub_if_data *sdata,
|
||||
struct sk_buff *skb, u8 ie_len)
|
||||
{
|
||||
const struct ieee80211_sta_he_cap *he_cap;
|
||||
const struct ieee80211_sta_eht_cap *eht_cap;
|
||||
struct ieee80211_supported_band *sband;
|
||||
u8 *pos;
|
||||
|
||||
sband = ieee80211_get_sband(sdata);
|
||||
if (!sband)
|
||||
return -EINVAL;
|
||||
|
||||
he_cap = ieee80211_get_he_iftype_cap(sband, NL80211_IFTYPE_MESH_POINT);
|
||||
eht_cap = ieee80211_get_eht_iftype_cap(sband, NL80211_IFTYPE_MESH_POINT);
|
||||
if (!he_cap || !eht_cap ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_5 ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_10)
|
||||
return 0;
|
||||
|
||||
if (skb_tailroom(skb) < ie_len)
|
||||
return -ENOMEM;
|
||||
|
||||
pos = skb_put(skb, ie_len);
|
||||
ieee80211_ie_build_eht_cap(pos, he_cap, eht_cap, pos + ie_len, false);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int mesh_add_eht_oper_ie(struct ieee80211_sub_if_data *sdata, struct sk_buff *skb)
|
||||
{
|
||||
const struct ieee80211_sta_eht_cap *eht_cap;
|
||||
struct ieee80211_supported_band *sband;
|
||||
u32 len;
|
||||
u8 *pos;
|
||||
|
||||
sband = ieee80211_get_sband(sdata);
|
||||
if (!sband)
|
||||
return -EINVAL;
|
||||
|
||||
eht_cap = ieee80211_get_eht_iftype_cap(sband, NL80211_IFTYPE_MESH_POINT);
|
||||
if (!eht_cap ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_20_NOHT ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_5 ||
|
||||
sdata->vif.bss_conf.chandef.width == NL80211_CHAN_WIDTH_10)
|
||||
return 0;
|
||||
|
||||
len = 2 + 1 + offsetof(struct ieee80211_eht_operation, optional) +
|
||||
offsetof(struct ieee80211_eht_operation_info, optional);
|
||||
|
||||
if (skb_tailroom(skb) < len)
|
||||
return -ENOMEM;
|
||||
|
||||
pos = skb_put(skb, len);
|
||||
ieee80211_ie_build_eht_oper(pos, &sdata->vif.bss_conf.chandef, eht_cap);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void ieee80211_mesh_path_timer(struct timer_list *t)
|
||||
{
|
||||
struct ieee80211_sub_if_data *sdata =
|
||||
@ -697,6 +756,9 @@ ieee80211_mesh_update_bss_params(struct ieee80211_sub_if_data *sdata,
|
||||
if (he_oper)
|
||||
sdata->vif.bss_conf.he_oper.params =
|
||||
__le32_to_cpu(he_oper->he_oper_params);
|
||||
|
||||
sdata->vif.bss_conf.eht_support =
|
||||
!!ieee80211_get_eht_iftype_cap(sband, NL80211_IFTYPE_MESH_POINT);
|
||||
}
|
||||
|
||||
bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata,
|
||||
@ -903,7 +965,7 @@ ieee80211_mesh_build_beacon(struct ieee80211_if_mesh *ifmsh)
|
||||
struct ieee80211_chanctx_conf *chanctx_conf;
|
||||
struct mesh_csa_settings *csa;
|
||||
enum nl80211_band band;
|
||||
u8 ie_len_he_cap;
|
||||
u8 ie_len_he_cap, ie_len_eht_cap;
|
||||
u8 *pos;
|
||||
struct ieee80211_sub_if_data *sdata;
|
||||
int hdr_len = offsetofend(struct ieee80211_mgmt, u.beacon);
|
||||
@ -916,6 +978,8 @@ ieee80211_mesh_build_beacon(struct ieee80211_if_mesh *ifmsh)
|
||||
|
||||
ie_len_he_cap = ieee80211_ie_len_he_cap(sdata,
|
||||
NL80211_IFTYPE_MESH_POINT);
|
||||
ie_len_eht_cap = ieee80211_ie_len_eht_cap(sdata,
|
||||
NL80211_IFTYPE_MESH_POINT);
|
||||
head_len = hdr_len +
|
||||
2 + /* NULL SSID */
|
||||
/* Channel Switch Announcement */
|
||||
@ -939,6 +1003,9 @@ ieee80211_mesh_build_beacon(struct ieee80211_if_mesh *ifmsh)
|
||||
2 + 1 + sizeof(struct ieee80211_he_operation) +
|
||||
sizeof(struct ieee80211_he_6ghz_oper) +
|
||||
2 + 1 + sizeof(struct ieee80211_he_6ghz_capa) +
|
||||
ie_len_eht_cap +
|
||||
2 + 1 + offsetof(struct ieee80211_eht_operation, optional) +
|
||||
offsetof(struct ieee80211_eht_operation_info, optional) +
|
||||
ifmsh->ie_len;
|
||||
|
||||
bcn = kzalloc(sizeof(*bcn) + head_len + tail_len, GFP_KERNEL);
|
||||
@ -1059,6 +1126,8 @@ ieee80211_mesh_build_beacon(struct ieee80211_if_mesh *ifmsh)
|
||||
mesh_add_he_cap_ie(sdata, skb, ie_len_he_cap) ||
|
||||
mesh_add_he_oper_ie(sdata, skb) ||
|
||||
mesh_add_he_6ghz_cap_ie(sdata, skb) ||
|
||||
mesh_add_eht_cap_ie(sdata, skb, ie_len_eht_cap) ||
|
||||
mesh_add_eht_oper_ie(sdata, skb) ||
|
||||
mesh_add_vendor_ies(sdata, skb))
|
||||
goto out_free;
|
||||
|
||||
|
@ -234,6 +234,10 @@ int mesh_add_he_oper_ie(struct ieee80211_sub_if_data *sdata,
|
||||
struct sk_buff *skb);
|
||||
int mesh_add_he_6ghz_cap_ie(struct ieee80211_sub_if_data *sdata,
|
||||
struct sk_buff *skb);
|
||||
int mesh_add_eht_cap_ie(struct ieee80211_sub_if_data *sdata,
|
||||
struct sk_buff *skb, u8 ie_len);
|
||||
int mesh_add_eht_oper_ie(struct ieee80211_sub_if_data *sdata,
|
||||
struct sk_buff *skb);
|
||||
void mesh_rmc_free(struct ieee80211_sub_if_data *sdata);
|
||||
int mesh_rmc_init(struct ieee80211_sub_if_data *sdata);
|
||||
void ieee80211s_init(void);
|
||||
|
@ -219,12 +219,14 @@ static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata,
|
||||
bool include_plid = false;
|
||||
u16 peering_proto = 0;
|
||||
u8 *pos, ie_len = 4;
|
||||
u8 ie_len_he_cap;
|
||||
u8 ie_len_he_cap, ie_len_eht_cap;
|
||||
int hdr_len = offsetofend(struct ieee80211_mgmt, u.action.u.self_prot);
|
||||
int err = -ENOMEM;
|
||||
|
||||
ie_len_he_cap = ieee80211_ie_len_he_cap(sdata,
|
||||
NL80211_IFTYPE_MESH_POINT);
|
||||
ie_len_eht_cap = ieee80211_ie_len_eht_cap(sdata,
|
||||
NL80211_IFTYPE_MESH_POINT);
|
||||
skb = dev_alloc_skb(local->tx_headroom +
|
||||
hdr_len +
|
||||
2 + /* capability info */
|
||||
@ -241,6 +243,9 @@ static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata,
|
||||
2 + 1 + sizeof(struct ieee80211_he_operation) +
|
||||
sizeof(struct ieee80211_he_6ghz_oper) +
|
||||
2 + 1 + sizeof(struct ieee80211_he_6ghz_capa) +
|
||||
ie_len_eht_cap +
|
||||
2 + 1 + offsetof(struct ieee80211_eht_operation, optional) +
|
||||
offsetof(struct ieee80211_eht_operation_info, optional) +
|
||||
2 + 8 + /* peering IE */
|
||||
sdata->u.mesh.ie_len);
|
||||
if (!skb)
|
||||
@ -332,7 +337,9 @@ static int mesh_plink_frame_tx(struct ieee80211_sub_if_data *sdata,
|
||||
mesh_add_vht_oper_ie(sdata, skb) ||
|
||||
mesh_add_he_cap_ie(sdata, skb, ie_len_he_cap) ||
|
||||
mesh_add_he_oper_ie(sdata, skb) ||
|
||||
mesh_add_he_6ghz_cap_ie(sdata, skb))
|
||||
mesh_add_he_6ghz_cap_ie(sdata, skb) ||
|
||||
mesh_add_eht_cap_ie(sdata, skb, ie_len_eht_cap) ||
|
||||
mesh_add_eht_oper_ie(sdata, skb))
|
||||
goto free;
|
||||
}
|
||||
|
||||
@ -451,6 +458,11 @@ static void mesh_sta_info_init(struct ieee80211_sub_if_data *sdata,
|
||||
elems->he_6ghz_capa,
|
||||
&sta->deflink);
|
||||
|
||||
ieee80211_eht_cap_ie_to_sta_eht_cap(sdata, sband, elems->he_cap,
|
||||
elems->he_cap_len,
|
||||
elems->eht_cap, elems->eht_cap_len,
|
||||
&sta->deflink);
|
||||
|
||||
if (bw != sta->sta.deflink.bandwidth)
|
||||
changed |= IEEE80211_RC_BW_CHANGED;
|
||||
|
||||
|
@ -2809,14 +2809,6 @@ ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta
|
||||
if (sdata->crypto_tx_tailroom_needed_cnt)
|
||||
tailroom = IEEE80211_ENCRYPT_TAILROOM;
|
||||
|
||||
if (!--mesh_hdr->ttl) {
|
||||
if (multicast)
|
||||
goto rx_accept;
|
||||
|
||||
IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
|
||||
return RX_DROP_MONITOR;
|
||||
}
|
||||
|
||||
if (mesh_hdr->flags & MESH_FLAGS_AE) {
|
||||
struct mesh_path *mppath;
|
||||
char *proxied_addr;
|
||||
@ -2855,6 +2847,14 @@ ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta
|
||||
if (ether_addr_equal(sdata->vif.addr, eth->h_dest))
|
||||
goto rx_accept;
|
||||
|
||||
if (!--mesh_hdr->ttl) {
|
||||
if (multicast)
|
||||
goto rx_accept;
|
||||
|
||||
IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_ttl);
|
||||
return RX_DROP_MONITOR;
|
||||
}
|
||||
|
||||
if (!ifmsh->mshcfg.dot11MeshForwarding) {
|
||||
if (is_multicast_ether_addr(eth->h_dest))
|
||||
goto rx_accept;
|
||||
@ -2885,6 +2885,9 @@ ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta
|
||||
|
||||
if (skb_cow_head(fwd_skb, hdrlen - sizeof(struct ethhdr)))
|
||||
return RX_DROP_UNUSABLE;
|
||||
|
||||
if (skb_linearize(fwd_skb))
|
||||
return RX_DROP_UNUSABLE;
|
||||
}
|
||||
|
||||
fwd_hdr = skb_push(fwd_skb, hdrlen - sizeof(struct ethhdr));
|
||||
@ -2899,7 +2902,7 @@ ieee80211_rx_mesh_data(struct ieee80211_sub_if_data *sdata, struct sta_info *sta
|
||||
hdrlen += ETH_ALEN;
|
||||
else
|
||||
fwd_skb->protocol = htons(fwd_skb->len - hdrlen);
|
||||
skb_set_network_header(fwd_skb, hdrlen);
|
||||
skb_set_network_header(fwd_skb, hdrlen + 2);
|
||||
|
||||
info = IEEE80211_SKB_CB(fwd_skb);
|
||||
memset(info, 0, sizeof(*info));
|
||||
@ -2948,7 +2951,7 @@ __ieee80211_rx_h_amsdu(struct ieee80211_rx_data *rx, u8 data_offset)
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
|
||||
__le16 fc = hdr->frame_control;
|
||||
struct sk_buff_head frame_list;
|
||||
static ieee80211_rx_result res;
|
||||
ieee80211_rx_result res;
|
||||
struct ethhdr ethhdr;
|
||||
const u8 *check_da = ethhdr.h_dest, *check_sa = ethhdr.h_source;
|
||||
|
||||
@ -2982,7 +2985,7 @@ __ieee80211_rx_h_amsdu(struct ieee80211_rx_data *rx, u8 data_offset)
|
||||
data_offset, true))
|
||||
return RX_DROP_UNUSABLE;
|
||||
|
||||
if (rx->sta && rx->sta->amsdu_mesh_control < 0) {
|
||||
if (rx->sta->amsdu_mesh_control < 0) {
|
||||
s8 valid = -1;
|
||||
int i;
|
||||
|
||||
@ -3068,7 +3071,7 @@ ieee80211_rx_h_amsdu(struct ieee80211_rx_data *rx)
|
||||
}
|
||||
}
|
||||
|
||||
if (is_multicast_ether_addr(hdr->addr1))
|
||||
if (is_multicast_ether_addr(hdr->addr1) || !rx->sta)
|
||||
return RX_DROP_UNUSABLE;
|
||||
|
||||
if (rx->key) {
|
||||
@ -3099,7 +3102,7 @@ ieee80211_rx_h_data(struct ieee80211_rx_data *rx)
|
||||
struct net_device *dev = sdata->dev;
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)rx->skb->data;
|
||||
__le16 fc = hdr->frame_control;
|
||||
static ieee80211_rx_result res;
|
||||
ieee80211_rx_result res;
|
||||
bool port_control;
|
||||
int err;
|
||||
|
||||
|
@ -1264,7 +1264,8 @@ static int __must_check __sta_info_destroy_part1(struct sta_info *sta)
|
||||
list_del_rcu(&sta->list);
|
||||
sta->removed = true;
|
||||
|
||||
drv_sta_pre_rcu_remove(local, sta->sdata, sta);
|
||||
if (sta->uploaded)
|
||||
drv_sta_pre_rcu_remove(local, sta->sdata, sta);
|
||||
|
||||
if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN &&
|
||||
rcu_access_pointer(sdata->u.vlan.sta) == sta)
|
||||
|
@ -3485,6 +3485,77 @@ out:
|
||||
return pos;
|
||||
}
|
||||
|
||||
u8 *ieee80211_ie_build_eht_oper(u8 *pos, struct cfg80211_chan_def *chandef,
|
||||
const struct ieee80211_sta_eht_cap *eht_cap)
|
||||
|
||||
{
|
||||
const struct ieee80211_eht_mcs_nss_supp_20mhz_only *eht_mcs_nss =
|
||||
&eht_cap->eht_mcs_nss_supp.only_20mhz;
|
||||
struct ieee80211_eht_operation *eht_oper;
|
||||
struct ieee80211_eht_operation_info *eht_oper_info;
|
||||
u8 eht_oper_len = offsetof(struct ieee80211_eht_operation, optional);
|
||||
u8 eht_oper_info_len =
|
||||
offsetof(struct ieee80211_eht_operation_info, optional);
|
||||
u8 chan_width = 0;
|
||||
|
||||
*pos++ = WLAN_EID_EXTENSION;
|
||||
*pos++ = 1 + eht_oper_len + eht_oper_info_len;
|
||||
*pos++ = WLAN_EID_EXT_EHT_OPERATION;
|
||||
|
||||
eht_oper = (struct ieee80211_eht_operation *)pos;
|
||||
|
||||
memcpy(&eht_oper->basic_mcs_nss, eht_mcs_nss, sizeof(*eht_mcs_nss));
|
||||
eht_oper->params |= IEEE80211_EHT_OPER_INFO_PRESENT;
|
||||
pos += eht_oper_len;
|
||||
|
||||
eht_oper_info =
|
||||
(struct ieee80211_eht_operation_info *)eht_oper->optional;
|
||||
|
||||
eht_oper_info->ccfs0 =
|
||||
ieee80211_frequency_to_channel(chandef->center_freq1);
|
||||
if (chandef->center_freq2)
|
||||
eht_oper_info->ccfs1 =
|
||||
ieee80211_frequency_to_channel(chandef->center_freq2);
|
||||
else
|
||||
eht_oper_info->ccfs1 = 0;
|
||||
|
||||
switch (chandef->width) {
|
||||
case NL80211_CHAN_WIDTH_320:
|
||||
chan_width = IEEE80211_EHT_OPER_CHAN_WIDTH_320MHZ;
|
||||
eht_oper_info->ccfs1 = eht_oper_info->ccfs0;
|
||||
if (chandef->chan->center_freq < chandef->center_freq1)
|
||||
eht_oper_info->ccfs0 -= 16;
|
||||
else
|
||||
eht_oper_info->ccfs0 += 16;
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_160:
|
||||
eht_oper_info->ccfs1 = eht_oper_info->ccfs0;
|
||||
if (chandef->chan->center_freq < chandef->center_freq1)
|
||||
eht_oper_info->ccfs0 -= 8;
|
||||
else
|
||||
eht_oper_info->ccfs0 += 8;
|
||||
fallthrough;
|
||||
case NL80211_CHAN_WIDTH_80P80:
|
||||
chan_width = IEEE80211_EHT_OPER_CHAN_WIDTH_160MHZ;
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_80:
|
||||
chan_width = IEEE80211_EHT_OPER_CHAN_WIDTH_80MHZ;
|
||||
break;
|
||||
case NL80211_CHAN_WIDTH_40:
|
||||
chan_width = IEEE80211_EHT_OPER_CHAN_WIDTH_40MHZ;
|
||||
break;
|
||||
default:
|
||||
chan_width = IEEE80211_EHT_OPER_CHAN_WIDTH_20MHZ;
|
||||
break;
|
||||
}
|
||||
eht_oper_info->control = chan_width;
|
||||
pos += eht_oper_info_len;
|
||||
|
||||
/* TODO: eht_oper_info->optional */
|
||||
|
||||
return pos;
|
||||
}
|
||||
|
||||
bool ieee80211_chandef_ht_oper(const struct ieee80211_ht_operation *ht_oper,
|
||||
struct cfg80211_chan_def *chandef)
|
||||
{
|
||||
@ -4929,7 +5000,7 @@ u8 ieee80211_ie_len_eht_cap(struct ieee80211_sub_if_data *sdata, u8 iftype)
|
||||
&eht_cap->eht_cap_elem,
|
||||
is_ap);
|
||||
return 2 + 1 +
|
||||
sizeof(he_cap->he_cap_elem) + n +
|
||||
sizeof(eht_cap->eht_cap_elem) + n +
|
||||
ieee80211_eht_ppe_size(eht_cap->eht_ppe_thres[0],
|
||||
eht_cap->eht_cap_elem.phy_cap_info);
|
||||
return 0;
|
||||
|
Loading…
x
Reference in New Issue
Block a user