net: sparx5: Refactor mdb handling according to feedback
- Remove mact_lookup and use new mact_find instead. - Make pgid_read_mask function. - Set PGID arbiter to start searching at PGID_BASE + 8. This is according to feedback on previous patch. https://lore.kernel.org/netdev/20220322081823.wqbx7vud4q7qtjuq@wse-c0155/T/#t Signed-off-by: Casper Andersson <casper.casan@gmail.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -212,19 +212,7 @@ bool sparx5_mact_find(struct sparx5 *sparx5,
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mutex_unlock(&sparx5->lock);
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return ret == 0;
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}
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static int sparx5_mact_lookup(struct sparx5 *sparx5,
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const unsigned char mac[ETH_ALEN],
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u16 vid)
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{
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u32 pcfg2;
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if (sparx5_mact_find(sparx5, mac, vid, &pcfg2))
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return 1;
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return 0;
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return ret;
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}
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int sparx5_mact_forget(struct sparx5 *sparx5,
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@ -305,9 +293,10 @@ int sparx5_add_mact_entry(struct sparx5 *sparx5,
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{
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struct sparx5_mact_entry *mact_entry;
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int ret;
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u32 cfg2;
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ret = sparx5_mact_lookup(sparx5, addr, vid);
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if (ret)
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ret = sparx5_mact_find(sparx5, addr, vid, &cfg2);
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if (!ret)
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return 0;
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/* In case the entry already exists, don't add it again to SW,
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@ -65,10 +65,10 @@ enum sparx5_vlan_port_type {
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#define PGID_IPV6_MC_CTRL (PGID_BASE + 5)
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#define PGID_BCAST (PGID_BASE + 6)
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#define PGID_CPU (PGID_BASE + 7)
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#define PGID_MCAST_START (PGID_BASE + 8)
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#define PGID_TABLE_SIZE 3290
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#define PGID_MCAST_START 65
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#define IFH_LEN 9 /* 36 bytes */
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#define NULL_VID 0
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#define SPX5_MACT_PULL_DELAY (2 * HZ)
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@ -325,6 +325,7 @@ void sparx5_mact_init(struct sparx5 *sparx5);
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/* sparx5_vlan.c */
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void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable);
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void sparx5_pgid_read_mask(struct sparx5 *sparx5, int pgid, u32 portmask[3]);
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void sparx5_update_fwd(struct sparx5 *sparx5);
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void sparx5_vlan_init(struct sparx5 *sparx5);
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void sparx5_vlan_port_setup(struct sparx5 *sparx5, int portno);
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@ -19,6 +19,9 @@ int sparx5_pgid_alloc_mcast(struct sparx5 *spx5, u16 *idx)
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{
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int i;
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/* The multicast area starts at index 65, but the first 7
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* are reserved for flood masks and CPU. Start alloc after that.
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*/
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for (i = PGID_MCAST_START; i < PGID_TABLE_SIZE; i++) {
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if (spx5->pgid_map[i] == SPX5_PGID_FREE) {
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spx5->pgid_map[i] = SPX5_PGID_MULTICAST;
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@ -406,11 +406,11 @@ static int sparx5_handle_port_mdb_add(struct net_device *dev,
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res = sparx5_mact_find(spx5, v->addr, vid, &mact_entry);
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if (res) {
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if (res == 0) {
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pgid_idx = LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(mact_entry);
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/* MC_IDX has an offset of 65 in the PGID table. */
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pgid_idx += PGID_MCAST_START;
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/* MC_IDX starts after the port masks in the PGID table */
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pgid_idx += SPX5_PORTS;
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sparx5_pgid_update_mask(port, pgid_idx, true);
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} else {
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err = sparx5_pgid_alloc_mcast(spx5, &pgid_idx);
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@ -468,17 +468,15 @@ static int sparx5_handle_port_mdb_del(struct net_device *dev,
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res = sparx5_mact_find(spx5, v->addr, vid, &mact_entry);
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if (res) {
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if (res == 0) {
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pgid_idx = LRN_MAC_ACCESS_CFG_2_MAC_ENTRY_ADDR_GET(mact_entry);
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/* MC_IDX has an offset of 65 in the PGID table. */
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pgid_idx += PGID_MCAST_START;
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/* MC_IDX starts after the port masks in the PGID table */
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pgid_idx += SPX5_PORTS;
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sparx5_pgid_update_mask(port, pgid_idx, false);
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pgid_entry[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid_idx));
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pgid_entry[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid_idx));
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pgid_entry[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid_idx));
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if (pgid_entry[0] == 0 && pgid_entry[1] == 0 && pgid_entry[2] == 0) {
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sparx5_pgid_read_mask(spx5, pgid_idx, pgid_entry);
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if (bitmap_empty((unsigned long *)pgid_entry, SPX5_PORTS)) {
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/* No ports are in MC group. Remove entry */
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err = sparx5_mdb_del_entry(dev, spx5, v->addr, vid, pgid_idx);
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if (err)
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@ -138,6 +138,13 @@ void sparx5_pgid_update_mask(struct sparx5_port *port, int pgid, bool enable)
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}
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}
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void sparx5_pgid_read_mask(struct sparx5 *spx5, int pgid, u32 portmask[3])
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{
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portmask[0] = spx5_rd(spx5, ANA_AC_PGID_CFG(pgid));
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portmask[1] = spx5_rd(spx5, ANA_AC_PGID_CFG1(pgid));
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portmask[2] = spx5_rd(spx5, ANA_AC_PGID_CFG2(pgid));
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}
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void sparx5_update_fwd(struct sparx5 *sparx5)
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{
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DECLARE_BITMAP(workmask, SPX5_PORTS);
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