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drm/xe: Move GGTT from GT to tile

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The GGTT exists at the tile level.  When a tile contains multiple GTs,
they share the same GGTT.

v2:
 - Include some changes that were mis-squashed into the VRAM patch.
   (Gustavo)

Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/20230601215244.678611-9-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This commit is contained in:
Matt Roper 2023-06-01 14:52:21 -07:00 committed by Rodrigo Vivi
parent 3b0d4a5579
commit ad703e0637
13 changed files with 125 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/xe/Makefile
View File

@ -101,6 +101,7 @@ xe-y += xe_bb.o \
xe_sched_job.o \
xe_step.o \
xe_sync.o \
xe_tile.o \
xe_trace.o \
xe_ttm_sys_mgr.o \
xe_ttm_stolen_mgr.o \

6
drivers/gpu/drm/xe/xe_bo.c
View File

@ -964,7 +964,7 @@ static void xe_ttm_bo_destroy(struct ttm_buffer_object *ttm_bo)
WARN_ON(!list_empty(&bo->vmas));
if (bo->ggtt_node.size)
xe_ggtt_remove_bo(bo->gt->mem.ggtt, bo);
xe_ggtt_remove_bo(gt_to_tile(bo->gt)->mem.ggtt, bo);
if (bo->vm && xe_bo_is_user(bo))
xe_vm_put(bo->vm);
@ -1242,9 +1242,9 @@ xe_bo_create_locked_range(struct xe_device *xe,
if (flags & XE_BO_CREATE_STOLEN_BIT &&
flags & XE_BO_FIXED_PLACEMENT_BIT) {
err = xe_ggtt_insert_bo_at(gt->mem.ggtt, bo, start);
err = xe_ggtt_insert_bo_at(gt_to_tile(gt)->mem.ggtt, bo, start);
} else {
err = xe_ggtt_insert_bo(gt->mem.ggtt, bo);
err = xe_ggtt_insert_bo(gt_to_tile(gt)->mem.ggtt, bo);
}
if (err)
goto err_unlock_put_bo;

8
drivers/gpu/drm/xe/xe_bo_evict.c
View File

@ -149,9 +149,11 @@ int xe_bo_restore_kernel(struct xe_device *xe)
}
if (bo->flags & XE_BO_CREATE_GGTT_BIT) {
mutex_lock(&bo->gt->mem.ggtt->lock);
xe_ggtt_map_bo(bo->gt->mem.ggtt, bo);
mutex_unlock(&bo->gt->mem.ggtt->lock);
struct xe_tile *tile = gt_to_tile(bo->gt);
mutex_lock(&tile->mem.ggtt->lock);
xe_ggtt_map_bo(tile->mem.ggtt, bo);
mutex_unlock(&tile->mem.ggtt->lock);
}
/*

18
drivers/gpu/drm/xe/xe_device.c
View File

@ -27,6 +27,7 @@
#include "xe_pcode.h"
#include "xe_pm.h"
#include "xe_query.h"
#include "xe_tile.h"
#include "xe_ttm_stolen_mgr.h"
#include "xe_ttm_sys_mgr.h"
#include "xe_vm.h"
@ -237,14 +238,19 @@ static void xe_device_sanitize(struct drm_device *drm, void *arg)
int xe_device_probe(struct xe_device *xe)
{
struct xe_tile *tile;
struct xe_gt *gt;
int err;
u8 id;
xe->info.mem_region_mask = 1;
for_each_gt(gt, xe, id) {
err = xe_gt_alloc(xe, gt);
for_each_tile(tile, xe, id) {
err = xe_tile_alloc(tile);
if (err)
return err;
err = xe_gt_alloc(xe, &tile->primary_gt);
if (err)
return err;
}
@ -275,8 +281,12 @@ int xe_device_probe(struct xe_device *xe)
xe_ttm_sys_mgr_init(xe);
for_each_gt(gt, xe, id) {
err = xe_gt_init_noalloc(gt);
for_each_tile(tile, xe, id) {
err = xe_tile_init_noalloc(tile);
if (err)
goto err_irq_shutdown;
err = xe_gt_init_noalloc(&tile->primary_gt);
if (err)
goto err_irq_shutdown;
}

8
drivers/gpu/drm/xe/xe_device_types.h
View File

@ -17,6 +17,8 @@
#include "xe_platform_types.h"
#include "xe_step_types.h"
struct xe_ggtt;
#define XE_BO_INVALID_OFFSET LONG_MAX
#define GRAPHICS_VER(xe) ((xe)->info.graphics_verx100 / 100)
@ -91,6 +93,12 @@ struct xe_tile {
/** @regs: pointer to tile's MMIO space (starting with registers) */
void *regs;
} mmio;
/** @mem: memory management info for tile */
struct {
/** @ggtt: Global graphics translation table */
struct xe_ggtt *ggtt;
} mem;
};
/**

42
drivers/gpu/drm/xe/xe_ggtt.c
View File

@ -90,24 +90,19 @@ static void ggtt_fini_noalloc(struct drm_device *drm, void *arg)
xe_bo_unpin_map_no_vm(ggtt->scratch);
}
int xe_ggtt_init_noalloc(struct xe_gt *gt, struct xe_ggtt *ggtt)
int xe_ggtt_init_noalloc(struct xe_ggtt *ggtt)
{
struct xe_device *xe = gt_to_xe(gt);
struct xe_tile *tile = gt_to_tile(gt);
struct xe_device *xe = tile_to_xe(ggtt->tile);
struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
unsigned int gsm_size;
XE_BUG_ON(xe_gt_is_media_type(gt));
ggtt->gt = gt;
gsm_size = probe_gsm_size(pdev);
if (gsm_size == 0) {
drm_err(&xe->drm, "Hardware reported no preallocated GSM\n");
return -ENOMEM;
}
ggtt->gsm = tile->mmio.regs + SZ_8M;
ggtt->gsm = ggtt->tile->mmio.regs + SZ_8M;
ggtt->size = (gsm_size / 8) * (u64) XE_PAGE_SIZE;
if (IS_DGFX(xe) && xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K)
@ -143,19 +138,20 @@ static void xe_ggtt_initial_clear(struct xe_ggtt *ggtt)
u64 start, end;
/* Display may have allocated inside ggtt, so be careful with clearing here */
xe_device_mem_access_get(gt_to_xe(ggtt->gt));
xe_device_mem_access_get(tile_to_xe(ggtt->tile));
mutex_lock(&ggtt->lock);
drm_mm_for_each_hole(hole, &ggtt->mm, start, end)
xe_ggtt_clear(ggtt, start, end - start);
xe_ggtt_invalidate(ggtt->gt);
xe_ggtt_invalidate(ggtt);
mutex_unlock(&ggtt->lock);
xe_device_mem_access_put(gt_to_xe(ggtt->gt));
xe_device_mem_access_put(tile_to_xe(ggtt->tile));
}
int xe_ggtt_init(struct xe_gt *gt, struct xe_ggtt *ggtt)
int xe_ggtt_init(struct xe_ggtt *ggtt)
{
struct xe_device *xe = gt_to_xe(gt);
struct xe_device *xe = tile_to_xe(ggtt->tile);
struct xe_gt *gt = &ggtt->tile->primary_gt;
unsigned int flags;
int err;
@ -195,8 +191,14 @@ err:
#define PVC_GUC_TLB_INV_DESC1 XE_REG(0xcf80)
#define PVC_GUC_TLB_INV_DESC1_INVALIDATE REG_BIT(6)
void xe_ggtt_invalidate(struct xe_gt *gt)
void xe_ggtt_invalidate(struct xe_ggtt *ggtt)
{
/*
* TODO: Loop over each GT in tile once media GT support is
* re-added
*/
struct xe_gt *gt = &ggtt->tile->primary_gt;
/* TODO: vfunc for GuC vs. non-GuC */
if (gt->uc.guc.submission_state.enabled) {
@ -269,7 +271,7 @@ void xe_ggtt_map_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)
xe_ggtt_set_pte(ggtt, start + offset, pte);
}
xe_ggtt_invalidate(ggtt->gt);
xe_ggtt_invalidate(ggtt);
}
static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
@ -287,14 +289,14 @@ static int __xe_ggtt_insert_bo_at(struct xe_ggtt *ggtt, struct xe_bo *bo,
if (err)
return err;
xe_device_mem_access_get(gt_to_xe(ggtt->gt));
xe_device_mem_access_get(tile_to_xe(ggtt->tile));
mutex_lock(&ggtt->lock);
err = drm_mm_insert_node_in_range(&ggtt->mm, &bo->ggtt_node, bo->size,
alignment, 0, start, end, 0);
if (!err)
xe_ggtt_map_bo(ggtt, bo);
mutex_unlock(&ggtt->lock);
xe_device_mem_access_put(gt_to_xe(ggtt->gt));
xe_device_mem_access_put(tile_to_xe(ggtt->tile));
return err;
}
@ -323,17 +325,17 @@ int xe_ggtt_insert_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)
void xe_ggtt_remove_node(struct xe_ggtt *ggtt, struct drm_mm_node *node)
{
xe_device_mem_access_get(gt_to_xe(ggtt->gt));
xe_device_mem_access_get(tile_to_xe(ggtt->tile));
mutex_lock(&ggtt->lock);
xe_ggtt_clear(ggtt, node->start, node->size);
drm_mm_remove_node(node);
node->size = 0;
xe_ggtt_invalidate(ggtt->gt);
xe_ggtt_invalidate(ggtt);
mutex_unlock(&ggtt->lock);
xe_device_mem_access_put(gt_to_xe(ggtt->gt));
xe_device_mem_access_put(tile_to_xe(ggtt->tile));
}
void xe_ggtt_remove_bo(struct xe_ggtt *ggtt, struct xe_bo *bo)

6
drivers/gpu/drm/xe/xe_ggtt.h
View File

@ -12,9 +12,9 @@ struct drm_printer;
u64 xe_ggtt_pte_encode(struct xe_bo *bo, u64 bo_offset);
void xe_ggtt_set_pte(struct xe_ggtt *ggtt, u64 addr, u64 pte);
void xe_ggtt_invalidate(struct xe_gt *gt);
int xe_ggtt_init_noalloc(struct xe_gt *gt, struct xe_ggtt *ggtt);
int xe_ggtt_init(struct xe_gt *gt, struct xe_ggtt *ggtt);
void xe_ggtt_invalidate(struct xe_ggtt *ggtt);
int xe_ggtt_init_noalloc(struct xe_ggtt *ggtt);
int xe_ggtt_init(struct xe_ggtt *ggtt);
void xe_ggtt_printk(struct xe_ggtt *ggtt, const char *prefix);
int xe_ggtt_insert_special_node(struct xe_ggtt *ggtt, struct drm_mm_node *node,

2
drivers/gpu/drm/xe/xe_ggtt_types.h
View File

@ -12,7 +12,7 @@ struct xe_bo;
struct xe_gt;
struct xe_ggtt {
struct xe_gt *gt;
struct xe_tile *tile;
u64 size;

10
drivers/gpu/drm/xe/xe_gt.c
View File

@ -67,11 +67,6 @@ int xe_gt_alloc(struct xe_device *xe, struct xe_gt *gt)
XE_BUG_ON(gt->info.type == XE_GT_TYPE_UNINITIALIZED);
if (!xe_gt_is_media_type(gt)) {
gt->mem.ggtt = drmm_kzalloc(drm, sizeof(*gt->mem.ggtt),
GFP_KERNEL);
if (!gt->mem.ggtt)
return -ENOMEM;
gt->mem.vram_mgr = drmm_kzalloc(drm, sizeof(*gt->mem.vram_mgr),
GFP_KERNEL);
if (!gt->mem.vram_mgr)
@ -80,7 +75,6 @@ int xe_gt_alloc(struct xe_device *xe, struct xe_gt *gt)
} else {
struct xe_gt *full_gt = xe_find_full_gt(gt);
gt->mem.ggtt = full_gt->mem.ggtt;
gt->mem.vram_mgr = full_gt->mem.vram_mgr;
}
@ -354,8 +348,6 @@ int xe_gt_init_noalloc(struct xe_gt *gt)
if (err)
goto err_force_wake;
err = xe_ggtt_init_noalloc(gt, gt->mem.ggtt);
err_force_wake:
err2 = xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
XE_WARN_ON(err2);
@ -376,7 +368,7 @@ static int gt_fw_domain_init(struct xe_gt *gt)
xe_pat_init(gt);
if (!xe_gt_is_media_type(gt)) {
err = xe_ggtt_init(gt, gt->mem.ggtt);
err = xe_ggtt_init(gt_to_tile(gt)->mem.ggtt);
if (err)
goto err_force_wake;
}

2
drivers/gpu/drm/xe/xe_gt_debugfs.c
View File

@ -98,7 +98,7 @@ static int ggtt(struct seq_file *m, void *data)
struct xe_gt *gt = node_to_gt(m->private);
struct drm_printer p = drm_seq_file_printer(m);
return xe_ggtt_dump(gt->mem.ggtt, &p);
return xe_ggtt_dump(gt_to_tile(gt)->mem.ggtt, &p);
}
static int register_save_restore(struct seq_file *m, void *data)

3
drivers/gpu/drm/xe/xe_gt_types.h
View File

@ -14,7 +14,6 @@
#include "xe_uc_types.h"
struct xe_engine_ops;
struct xe_ggtt;
struct xe_migrate;
struct xe_ring_ops;
struct xe_ttm_gtt_mgr;
@ -176,8 +175,6 @@ struct xe_gt {
} vram;
/** @vram_mgr: VRAM TTM manager */
struct xe_ttm_vram_mgr *vram_mgr;
/** @ggtt: Global graphics translation table */
struct xe_ggtt *ggtt;
} mem;
/** @reset: state for GT resets */

52
drivers/gpu/drm/xe/xe_tile.c Normal file
View File

@ -0,0 +1,52 @@
// SPDX-License-Identifier: MIT
/*
* Copyright © 2023 Intel Corporation
*/
#include <drm/drm_managed.h>
#include "xe_device.h"
#include "xe_ggtt.h"
#include "xe_tile.h"
#include "xe_ttm_vram_mgr.h"
/**
* xe_tile_alloc - Perform per-tile memory allocation
* @tile: Tile to perform allocations for
*
* Allocates various per-tile data structures using DRM-managed allocations.
* Does not touch the hardware.
*
* Returns -ENOMEM if allocations fail, otherwise 0.
*/
int xe_tile_alloc(struct xe_tile *tile)
{
struct drm_device *drm = &tile_to_xe(tile)->drm;
tile->mem.ggtt = drmm_kzalloc(drm, sizeof(*tile->mem.ggtt),
GFP_KERNEL);
if (!tile->mem.ggtt)
return -ENOMEM;
tile->mem.ggtt->tile = tile;
return 0;
}
/**
* xe_tile_init_noalloc - Init tile up to the point where allocations can happen.
* @tile: The tile to initialize.
*
* This function prepares the tile to allow memory allocations to VRAM, but is
* not allowed to allocate memory itself. This state is useful for display
* readout, because the inherited display framebuffer will otherwise be
* overwritten as it is usually put at the start of VRAM.
*
* Note that since this is tile initialization, it should not perform any
* GT-specific operations, and thus does not need to hold GT forcewake.
*
* Returns: 0 on success, negative error code on error.
*/
int xe_tile_init_noalloc(struct xe_tile *tile)
{
return xe_ggtt_init_noalloc(tile->mem.ggtt);
}

14
drivers/gpu/drm/xe/xe_tile.h Normal file
View File

@ -0,0 +1,14 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2023 Intel Corporation
*/
#ifndef _XE_TILE_H_
#define _XE_TILE_H_
struct xe_tile;
int xe_tile_alloc(struct xe_tile *tile);
int xe_tile_init_noalloc(struct xe_tile *tile);
#endif