ath9k_hw: optimize all descriptor access functions
Because all of the descriptor data structures are marked as __packed, GCC assumes the worst case wrt. alignment and generates unaligned load/store instructions on MIPS for access to all fields. Since descriptors always have to be 4-byte-aligned, we can just mark the data structures with __aligned(4), which allows GCC to generate much more efficient code. Verified through disassembly and OProfile comparisons. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -65,7 +65,7 @@ struct ar9003_rxs {
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u32 status9;
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u32 status10;
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u32 status11;
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} __packed;
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} __packed __aligned(4);
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/* Transmit Control Descriptor */
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struct ar9003_txc {
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@ -93,7 +93,7 @@ struct ar9003_txc {
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u32 ctl21; /* DMA control 21 */
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u32 ctl22; /* DMA control 22 */
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u32 pad[9]; /* pad to cache line (128 bytes/32 dwords) */
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} __packed;
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} __packed __aligned(4);
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struct ar9003_txs {
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u32 ds_info;
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@ -105,7 +105,7 @@ struct ar9003_txs {
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u32 status6;
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u32 status7;
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u32 status8;
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} __packed;
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} __packed __aligned(4);
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void ar9003_hw_attach_mac_ops(struct ath_hw *hw);
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void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size);
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@ -237,7 +237,7 @@ struct ath_desc {
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u32 ds_ctl1;
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u32 ds_hw[20];
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void *ds_vdata;
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} __packed;
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} __packed __aligned(4);
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#define ATH9K_TXDESC_CLRDMASK 0x0001
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#define ATH9K_TXDESC_NOACK 0x0002
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@ -307,7 +307,7 @@ struct ar5416_desc {
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u32 status8;
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} rx;
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} u;
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} __packed;
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} __packed __aligned(4);
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#define AR5416DESC(_ds) ((struct ar5416_desc *)(_ds))
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#define AR5416DESC_CONST(_ds) ((const struct ar5416_desc *)(_ds))
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