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arm64: dts: mediatek: mt8192: Mark scp_adsp clock as broken

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[ Upstream commit 089cd717e6ef03cf9cf7865777d67775de41339b ]

The scp_adsp clock controller is under the SCP_ADSP power domain. This
power domain is currently not supported nor defined.

Mark the clock controller as broken for now, to avoid the system from
trying to access it, and causing the CPU or bus to stall.

Fixes: 5d2b897bc6f5 ("arm64: dts: mediatek: Add mt8192 clock controllers")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Tested-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Link: https://lore.kernel.org/r/20221229101202.1655924-1-wenst@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Chen-Yu Tsai 2022-12-29 18:12:02 +08:00 committed by Greg Kroah-Hartman
parent ab5968aa3d
commit addbe278d7
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/mediatek/mt8192.dtsi
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@ -583,6 +583,8 @@
compatible = "mediatek,mt8192-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
#clock-cells = <1>;
/* power domain dependency not upstreamed */
status = "fail";
};
uart0: serial@11002000 {