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media: mt9p031: Make pixel clock polarity configurable by DT

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Evaluate the desired pixel clock polarity from the device tree.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Christian Hemp 2021-07-26 09:35:14 +02:00 committed by Mauro Carvalho Chehab
parent b9c18096f5
commit ae47ee5fc4
3 changed files with 21 additions and 1 deletions
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1
drivers/media/i2c/Kconfig
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@ -1229,6 +1229,7 @@ config VIDEO_MT9P031
select MEDIA_CONTROLLER select MEDIA_CONTROLLER
select VIDEO_V4L2_SUBDEV_API select VIDEO_V4L2_SUBDEV_API
select VIDEO_APTINA_PLL select VIDEO_APTINA_PLL
select V4L2_FWNODE
help help
This is a Video4Linux2 sensor driver for the Aptina This is a Video4Linux2 sensor driver for the Aptina
(Micron) mt9p031 5 Mpixel camera. (Micron) mt9p031 5 Mpixel camera.

20
drivers/media/i2c/mt9p031.c
View File

@ -27,6 +27,7 @@
#include <media/v4l2-async.h> #include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h> #include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h> #include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>
#include <media/v4l2-subdev.h> #include <media/v4l2-subdev.h>
#include "aptina-pll.h" #include "aptina-pll.h"
@ -372,6 +373,14 @@ static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on)
return ret; return ret;
} }
/* Configure the pixel clock polarity */
if (mt9p031->pdata && mt9p031->pdata->pixclk_pol) {
ret = mt9p031_write(client, MT9P031_PIXEL_CLOCK_CONTROL,
MT9P031_PIXEL_CLOCK_INVERT);
if (ret < 0)
return ret;
}
return v4l2_ctrl_handler_setup(&mt9p031->ctrls); return v4l2_ctrl_handler_setup(&mt9p031->ctrls);
} }
@ -1014,8 +1023,11 @@ static const struct v4l2_subdev_internal_ops mt9p031_subdev_internal_ops = {
static struct mt9p031_platform_data * static struct mt9p031_platform_data *
mt9p031_get_pdata(struct i2c_client *client) mt9p031_get_pdata(struct i2c_client *client)
{ {
struct mt9p031_platform_data *pdata; struct mt9p031_platform_data *pdata = NULL;
struct device_node *np; struct device_node *np;
struct v4l2_fwnode_endpoint endpoint = {
.bus_type = V4L2_MBUS_PARALLEL
};
if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
return client->dev.platform_data; return client->dev.platform_data;
@ -1024,6 +1036,9 @@ mt9p031_get_pdata(struct i2c_client *client)
if (!np) if (!np)
return NULL; return NULL;
if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0)
goto done;
pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
if (!pdata) if (!pdata)
goto done; goto done;
@ -1031,6 +1046,9 @@ mt9p031_get_pdata(struct i2c_client *client)
of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq); of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq);
of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq); of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq);
pdata->pixclk_pol = !!(endpoint.bus.parallel.flags &
V4L2_MBUS_PCLK_SAMPLE_RISING);
done: done:
of_node_put(np); of_node_put(np);
return pdata; return pdata;

1
include/media/i2c/mt9p031.h
View File

@ -10,6 +10,7 @@ struct v4l2_subdev;
* @target_freq: Pixel clock frequency * @target_freq: Pixel clock frequency
*/ */
struct mt9p031_platform_data { struct mt9p031_platform_data {
unsigned int pixclk_pol:1;
int ext_freq; int ext_freq;
int target_freq; int target_freq;
}; };