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MIPS: barrier: Make __smp_mb__before_atomic() a no-op for Loongson3

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Loongson3 systems with CONFIG_CPU_LOONGSON3_WORKAROUNDS enabled already
emit a full completion barrier as part of the inline assembly containing
LL/SC loops for atomic operations. As such the barrier emitted by
__smp_mb__before_atomic() is redundant, and we can remove it.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
This commit is contained in:
Paul Burton
2019-10-01 21:53:41 +00:00
parent 7f56b12354
commit ae4cd0b1a4
1 changed files with 11 additions and 1 deletions
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12
arch/mips/include/asm/barrier.h
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@ -119,7 +119,17 @@ static inline void wmb(void)
#define nudge_writes() mb() #define nudge_writes() mb()
#endif #endif
#define __smp_mb__before_atomic() __smp_mb__before_llsc() /*
* In the Loongson3 LL/SC workaround case, all of our LL/SC loops already have
* a completion barrier immediately preceding the LL instruction. Therefore we
* can skip emitting a barrier from __smp_mb__before_atomic().
*/
#ifdef CONFIG_CPU_LOONGSON3_WORKAROUNDS
# define __smp_mb__before_atomic()
#else
# define __smp_mb__before_atomic() __smp_mb__before_llsc()
#endif
#define __smp_mb__after_atomic() smp_llsc_mb() #define __smp_mb__after_atomic() smp_llsc_mb()
static inline void sync_ginv(void) static inline void sync_ginv(void)