drm/amdgpu/mes: add status fence memory definitions
Update for new member query_status_fence_gpu_mc_ptr in MESAPI_SET_HW_RESOURCES. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -82,6 +82,9 @@ struct amdgpu_mes {
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uint32_t sch_ctx_offs;
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uint64_t sch_ctx_gpu_addr;
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uint64_t *sch_ctx_ptr;
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uint32_t query_status_fence_offs;
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uint64_t query_status_fence_gpu_addr;
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uint64_t *query_status_fence_ptr;
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/* ip specific functions */
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const struct amdgpu_mes_funcs *funcs;
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@ -237,6 +237,8 @@ static int mes_v10_1_set_hw_resources(struct amdgpu_mes *mes)
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mes_set_hw_res_pkt.gds_size = adev->gds.gds_size;
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mes_set_hw_res_pkt.paging_vmid = 0;
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mes_set_hw_res_pkt.g_sch_ctx_gpu_mc_ptr = mes->sch_ctx_gpu_addr;
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mes_set_hw_res_pkt.query_status_fence_gpu_mc_ptr =
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mes->query_status_fence_gpu_addr;
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for (i = 0; i < MAX_COMPUTE_PIPES; i++)
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mes_set_hw_res_pkt.compute_hqd_mask[i] =
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