ASoC: SOF: Intel: hda: Do not re-enable L1 if disabled before suspend
We have a workaround in place to address a known issue with host DMA running into xruns when capture streams are running. But when resuming from Sx, we unconditionally re-enable DMI L1 without taking the workaround into account and this could lead to xruns when a suspended capture stream is restarted. To fix this rename the flag l1_support_enabled to l1_disabled in struct sof_intel_hda_dev to save the L1 disabled status which can be set/cleared when we get/put a stream and use the flag to determine if DMI L1 should enabled or not during the post_fw_run op. Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230220075804.4829-2-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -158,16 +158,18 @@ void hda_dsp_ctrl_misc_clock_gating(struct snd_sof_dev *sdev, bool enable)
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*/
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int hda_dsp_ctrl_clock_power_gating(struct snd_sof_dev *sdev, bool enable)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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u32 val;
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/* enable/disable audio dsp clock gating */
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val = enable ? PCI_CGCTL_ADSPDCGE : 0;
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snd_sof_pci_update_bits(sdev, PCI_CGCTL, PCI_CGCTL_ADSPDCGE, val);
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/* enable/disable DMI Link L1 support */
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/* disable the DMI link when requested. But enable only if it wasn't disabled previously */
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val = enable ? HDA_VS_INTEL_EM2_L1SEN : 0;
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, val);
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if (!enable || !hda->l1_disabled)
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, val);
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/* enable/disable audio dsp power gating */
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val = enable ? 0 : PCI_PGCTL_ADSPPGD;
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@ -776,7 +776,7 @@ int hda_dsp_resume(struct snd_sof_dev *sdev)
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}
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/* restore L1SEN bit */
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if (hda->l1_support_changed)
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if (hda->l1_disabled)
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
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HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, 0);
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@ -868,11 +868,9 @@ int hda_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state)
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}
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/* enable L1SEN to make sure the system can enter S0Ix */
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hda->l1_support_changed =
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
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HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN,
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HDA_VS_INTEL_EM2_L1SEN);
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if (hda->l1_disabled)
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, HDA_VS_INTEL_EM2_L1SEN);
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/* stop the CORB/RIRB DMA if it is On */
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hda_codec_suspend_cmd_io(sdev);
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@ -182,6 +182,7 @@ int hda_dsp_stream_spib_config(struct snd_sof_dev *sdev,
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struct hdac_ext_stream *
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hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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struct hdac_bus *bus = sof_to_bus(sdev);
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struct sof_intel_hda_stream *hda_stream;
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struct hdac_ext_stream *hext_stream = NULL;
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@ -222,10 +223,12 @@ hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags)
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* Workaround to address a known issue with host DMA that results
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* in xruns during pause/release in capture scenarios.
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*/
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if (!(flags & SOF_HDA_STREAM_DMI_L1_COMPATIBLE))
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if (!(flags & SOF_HDA_STREAM_DMI_L1_COMPATIBLE)) {
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR,
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HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, 0);
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hda->l1_disabled = true;
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}
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return hext_stream;
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}
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@ -233,6 +236,7 @@ hda_dsp_stream_get(struct snd_sof_dev *sdev, int direction, u32 flags)
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/* free a stream */
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int hda_dsp_stream_put(struct snd_sof_dev *sdev, int direction, int stream_tag)
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{
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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struct hdac_bus *bus = sof_to_bus(sdev);
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struct sof_intel_hda_stream *hda_stream;
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struct hdac_ext_stream *hext_stream;
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@ -264,9 +268,11 @@ int hda_dsp_stream_put(struct snd_sof_dev *sdev, int direction, int stream_tag)
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spin_unlock_irq(&bus->reg_lock);
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/* Enable DMI L1 if permitted */
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if (dmi_l1_enable)
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if (dmi_l1_enable) {
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2,
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HDA_VS_INTEL_EM2_L1SEN, HDA_VS_INTEL_EM2_L1SEN);
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hda->l1_disabled = false;
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}
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if (!found) {
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dev_err(sdev->dev, "%s: stream_tag %d not opened!\n",
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@ -502,7 +502,7 @@ struct sof_intel_hda_dev {
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u32 stream_max;
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/* PM related */
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bool l1_support_changed;/* during suspend, is L1SEN changed or not */
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bool l1_disabled;/* is DMI link L1 disabled? */
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/* DMIC device */
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struct platform_device *dmic_dev;
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