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drm/i915/gen12: implement Wa_14011508470

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Update code to reflect recent bspec changes

Bspec: 52890
Bspec: 53508

Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200624215723.2316-1-matthew.s.atwood@intel.com
This commit is contained in:
Matt Atwood 2020-06-24 14:57:23 -07:00 committed by Lucas De Marchi
parent 1e8110a6c3
commit af9e1032ff
2 changed files with 14 additions and 0 deletions
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8
drivers/gpu/drm/i915/display/intel_display_power.c
View File

@ -5298,6 +5298,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
{
struct i915_power_domains *power_domains = &dev_priv->power_domains;
struct i915_power_well *well;
u32 val;
gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
@ -5331,6 +5332,13 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
if (resume && dev_priv->csr.dmc_payload)
intel_csr_load_program(dev_priv);
/* Wa_14011508470 */
if (IS_GEN(dev_priv, 12)) {
val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
}
}
static void icl_display_core_uninit(struct drm_i915_private *dev_priv)

6
drivers/gpu/drm/i915/i915_reg.h
View File

@ -7880,6 +7880,12 @@ enum {
#define MASK_WAKEMEM (1 << 13)
#define CNL_DDI_CLOCK_REG_ACCESS_ON (1 << 7)
#define GEN11_CHICKEN_DCPR_2 _MMIO(0x46434)
#define DCPR_MASK_MAXLATENCY_MEMUP_CLR REG_BIT(27)
#define DCPR_MASK_LPMODE REG_BIT(26)
#define DCPR_SEND_RESP_IMM REG_BIT(25)
#define DCPR_CLEAR_MEMSTAT_DIS REG_BIT(24)
#define SKL_DFSM _MMIO(0x51000)
#define SKL_DFSM_DISPLAY_PM_DISABLE (1 << 27)
#define SKL_DFSM_DISPLAY_HDCP_DISABLE (1 << 25)