media: venus: firmware: enable no tz fw loading for sc7280
Enable no tz FW loading and add routine to reset XTSS. Signed-off-by: Dikshita Agarwal <dikshita@codeaurora.org> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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@ -27,7 +27,12 @@
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static void venus_reset_cpu(struct venus_core *core)
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static void venus_reset_cpu(struct venus_core *core)
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{
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{
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u32 fw_size = core->fw.mapped_mem_size;
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u32 fw_size = core->fw.mapped_mem_size;
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void __iomem *wrapper_base = core->wrapper_base;
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void __iomem *wrapper_base;
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if (IS_V6(core))
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wrapper_base = core->wrapper_tz_base;
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else
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wrapper_base = core->wrapper_base;
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writel(0, wrapper_base + WRAPPER_FW_START_ADDR);
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writel(0, wrapper_base + WRAPPER_FW_START_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_FW_END_ADDR);
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@ -35,11 +40,17 @@ static void venus_reset_cpu(struct venus_core *core)
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writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_CPA_END_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
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writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS);
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writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG);
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/* Bring ARM9 out of reset */
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if (IS_V6(core)) {
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writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET);
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/* Bring XTSS out of reset */
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writel(0, wrapper_base + WRAPPER_TZ_XTSS_SW_RESET);
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} else {
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writel(0x0, wrapper_base + WRAPPER_CPU_CGC_DIS);
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writel(0x0, wrapper_base + WRAPPER_CPU_CLOCK_CONFIG);
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/* Bring ARM9 out of reset */
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writel(0, wrapper_base + WRAPPER_A9SS_SW_RESET);
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}
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}
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}
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int venus_set_hw_state(struct venus_core *core, bool resume)
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int venus_set_hw_state(struct venus_core *core, bool resume)
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@ -56,7 +67,9 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
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if (resume) {
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if (resume) {
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venus_reset_cpu(core);
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venus_reset_cpu(core);
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} else {
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} else {
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if (!IS_V6(core))
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if (IS_V6(core))
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writel(1, core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
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else
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writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET);
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writel(1, core->wrapper_base + WRAPPER_A9SS_SW_RESET);
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}
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}
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@ -162,12 +175,19 @@ static int venus_shutdown_no_tz(struct venus_core *core)
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u32 reg;
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u32 reg;
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struct device *dev = core->fw.dev;
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struct device *dev = core->fw.dev;
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void __iomem *wrapper_base = core->wrapper_base;
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void __iomem *wrapper_base = core->wrapper_base;
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void __iomem *wrapper_tz_base = core->wrapper_tz_base;
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/* Assert the reset to ARM9 */
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if (IS_V6(core)) {
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reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET);
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/* Assert the reset to XTSS */
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reg |= WRAPPER_A9SS_SW_RESET_BIT;
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reg = readl_relaxed(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
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writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET);
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reg |= WRAPPER_XTSS_SW_RESET_BIT;
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writel_relaxed(reg, wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
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} else {
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/* Assert the reset to ARM9 */
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reg = readl_relaxed(wrapper_base + WRAPPER_A9SS_SW_RESET);
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reg |= WRAPPER_A9SS_SW_RESET_BIT;
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writel_relaxed(reg, wrapper_base + WRAPPER_A9SS_SW_RESET);
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}
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/* Make sure reset is asserted before the mapping is removed */
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/* Make sure reset is asserted before the mapping is removed */
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mb();
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mb();
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@ -149,6 +149,8 @@
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/* Wrapper TZ 6xx */
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/* Wrapper TZ 6xx */
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#define WRAPPER_TZ_BASE_V6 0x000c0000
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#define WRAPPER_TZ_BASE_V6 0x000c0000
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#define WRAPPER_TZ_CPU_STATUS_V6 0x10
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#define WRAPPER_TZ_CPU_STATUS_V6 0x10
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#define WRAPPER_TZ_XTSS_SW_RESET 0x1000
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#define WRAPPER_XTSS_SW_RESET_BIT BIT(0)
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/* Venus AON */
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/* Venus AON */
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#define AON_BASE_V6 0x000e0000
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#define AON_BASE_V6 0x000e0000
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