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STM32 DT updates for v5.8, round 1

Browse Source 
Highlights:
 ----------
 
 MCU part:
  -fix a typo for DAC io-channel-cells on f429 and h743
 
 MPU part:
  -Generic:
   -Bump tp PSCI 1.0
   -Fix a typo for DAC io-channel-cells
   -Add M4 pdds for deep sleep mode
   -Add I2C fatmode plus support
 
  -Add new Octavio lxa-mc1 board based on OSDMP15x SiP
 
  -Add new Stinger96 board support. It is a 96Boards IoT Extended board
   based on stm32mp157a SoC. Some figures: 256MB DDR, 125MB and flash,
   Onboard BG96 modem...
 
  -Add IoT Box board support based on stinger96 board + Wifi/BT, CCS811
   VOC sensor, 2 digitals microphones ...
 
  -DH:
   -Adapt dhcom-som and dhcom-pdk2 dts(i) files to STM32MP15 SoC diversity
   -Add GPIO led and GPIO keys support on PDK2 board
 
  -AV96:
   -Major rework to support official avenger96 board based on DHCOR SOM.
   -Prototype board is no more supported
 -----BEGIN PGP SIGNATURE-----
 
 iQJMBAABCgA2FiEEctl9+nxzUSUqdELdf5rJavIecIUFAl69aa4YHGFsZXhhbmRy
 ZS50b3JndWVAc3QuY29tAAoJEH+ayWryHnCFhH0QAK+7gK6fKXJU+meHe7kSuzm1
 IvMYGA126KXubzNCSq2dxkHhGf+hlHE9jaQd27N9sTWY5Zi/B/xMDC+XotZhNEuL
 +vLwPl5tfENOK/MC+eu5HFdx8D/1dMZ1eh0PyudjifxB1yiTqHpoce6hwJ+gHedT
 GwvAz8udReP5jQTHK6Z66z56A81qMxLCKiAL4M2ExqzYECX/nl7bkqtpzG8OG56l
 wsfjOowpw0g6KLMjnL+0l97/xhXUdEeIQ7IvrvNhC4zgNytZREk8wymh0odPHLZP
 PmZ0f0cjgtP3HAt26GuyG2IZI2byoat3KWAqOxmXeqNR7EWPjkwAtU4kYprk1reu
 rZ70SqCvk6ABH3E8s5v4Noa+ni7Et4NB/BqUwulfBXTgl3D9dzloKNc+rSi/BFXd
 E1aaEL4qXu89b3GOsC1tq2SLbsr28GkNg54+Tb1SBpTJV8wTgScKTuopExQoBVPU
 iMRDPJ8jv6fRD99g/ZOa+8u13cYh1u8pSOSS4jpgyHeEagebnxnkLv71uETp2Nva
 WgLXEYuDgfwEJ6C4lyLbX1g5ak1LLix5gDMFTdSPiW0SCIs5NEk112ItQMWg8b3r
 P3pThyzwpUOUyi742OCo02r5d+LrBbcBNktGYMcv/l/lc9u/ObDwmoaBjclTHVwq
 yQuJS+y6TAoLORRr4rOg
 =JFtr
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.8, round 1

Highlights:
----------

MCU part:
 -fix a typo for DAC io-channel-cells on f429 and h743

MPU part:
 -Generic:
  -Bump tp PSCI 1.0
  -Fix a typo for DAC io-channel-cells
  -Add M4 pdds for deep sleep mode
  -Add I2C fatmode plus support

 -Add new Octavio lxa-mc1 board based on OSDMP15x SiP

 -Add new Stinger96 board support. It is a 96Boards IoT Extended board
  based on stm32mp157a SoC. Some figures: 256MB DDR, 125MB and flash,
  Onboard BG96 modem...

 -Add IoT Box board support based on stinger96 board + Wifi/BT, CCS811
  VOC sensor, 2 digitals microphones ...

 -DH:
  -Adapt dhcom-som and dhcom-pdk2 dts(i) files to STM32MP15 SoC diversity
  -Add GPIO led and GPIO keys support on PDK2 board

 -AV96:
  -Major rework to support official avenger96 board based on DHCOR SOM.
  -Prototype board is no more supported

* tag 'stm32-dt-for-v5.8-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (58 commits)
  ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board
  ARM: dts: stm32: Split SoC-independent parts of DHCOM SOM and PDK2
  ARM: dts: stm32: Add GPIO LEDs for STM32MP1 DHCOM PDK2
  ARM: dts: stm32: Add GPIO keys for STM32MP1 DHCOM PDK2
  ARM: dts: stm32: Add IoT Box board support
  dt-bindings: arm: stm32: Document IoT Box compatible
  ARM: dts: stm32: Add Stinger96 board support
  dt-bindings: arm: stm32: Document Stinger96 compatible
  ARM: dts: stm32: Add missing pinctrl entries for STM32MP15
  dt-bindings: Add vendor prefix for Shiratech Solutions
  ARM: dts: stm32: Add bindings for SPI2 on AV96
  ARM: dts: stm32: Add alternate pinmux for SPI2 pins
  ARM: dts: stm32: Add bindings for ADC on AV96
  ARM: dts: stm32: Add alternate pinmux for ADC pins
  ARM: dts: stm32: Add bindings for FDCAN2 on AV96
  ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins
  ARM: dts: stm32: Add bindings for FDCAN1 on AV96
  ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins
  ARM: dts: stm32: Repair I2C2 operation on AV96
  ARM: dts: stm32: Add alternate pinmux for I2C2 pins
  ...

Link: https://lore.kernel.org/r/19160355-364d-170c-7ae2-5ba7f714103f@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-05-21 16:00:46 +02:00
commit aff195d0ec
25 changed files with 2634 additions and 647 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/arm/stm32/stm32.yaml
View File

@ -38,6 +38,9 @@ properties:
- items:
- enum:
- arrow,stm32mp157a-avenger96 # Avenger96
- lxa,stm32mp157c-mc1
- shiratech,stm32mp157a-iot-box # IoT Box
- shiratech,stm32mp157a-stinger96 # Stinger96
- st,stm32mp157c-ed1
- st,stm32mp157a-dk1
- st,stm32mp157c-dk2

4
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -585,6 +585,8 @@ patternProperties:
description: LSI Corp. (LSI Logic)
"^lwn,.*":
description: Liebherr-Werk Nenzing GmbH
"^lxa,.*":
description: Linux Automation GmbH
"^macnica,.*":
description: Macnica Americas
"^mapleboard,.*":
@ -900,6 +902,8 @@ patternProperties:
description: Sharp Corporation
"^shimafuji,.*":
description: Shimafuji Electric, Inc.
"^shiratech,.*":
description: Shiratech Solutions
"^si-en,.*":
description: Si-En Technology Ltd.
"^si-linux,.*":

6
arch/arm/boot/dts/Makefile
View File

@ -1035,11 +1035,15 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dhcor-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157a-iot-box.dtb \
stm32mp157a-stinger96.dtb \
stm32mp157c-dhcom-pdk2.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
stm32mp157c-ev1.dtb \
stm32mp157c-lxa-mc1.dtb
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \

4
arch/arm/boot/dts/stm32f429.dtsi
View File

@ -414,14 +414,14 @@
dac1: dac@1 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <2>;
status = "disabled";
};

4
arch/arm/boot/dts/stm32h743.dtsi
View File

@ -180,14 +180,14 @@
dac1: dac@1 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <2>;
status = "disabled";
};

666
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
View File

@ -6,7 +6,7 @@
#include <dt-bindings/pinctrl/stm32-pinfunc.h>
&pinctrl {
adc1_in6_pins_a: adc1-in6 {
adc1_in6_pins_a: adc1-in6-0 {
pins {
pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
};
@ -21,6 +21,13 @@
};
};
adc12_ain_pins_b: adc12-ain-1 {
pins {
pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
<STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
};
};
adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
@ -37,7 +44,7 @@
};
};
cec_pins_sleep_a: cec-sleep-0 {
cec_sleep_pins_a: cec-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* HDMI_CEC */
};
@ -52,19 +59,19 @@
};
};
cec_pins_sleep_b: cec-sleep-1 {
cec_sleep_pins_b: cec-sleep-1 {
pins {
pinmux = <STM32_PINMUX('B', 6, ANALOG)>; /* HDMI_CEC */
};
};
dac_ch1_pins_a: dac-ch1 {
dac_ch1_pins_a: dac-ch1-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>;
};
};
dac_ch2_pins_a: dac-ch2 {
dac_ch2_pins_a: dac-ch2-0 {
pins {
pinmux = <STM32_PINMUX('A', 5, ANALOG)>;
};
@ -142,7 +149,7 @@
};
};
ethernet0_rgmii_pins_sleep_a: rgmii-sleep-0 {
ethernet0_rgmii_sleep_pins_a: rgmii-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
@ -162,6 +169,108 @@
};
};
ethernet0_rgmii_pins_b: rgmii-1 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
<STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
bias-disable;
};
};
ethernet0_rgmii_sleep_pins_b: rgmii-sleep-1 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
};
};
ethernet0_rgmii_pins_c: rgmii-2 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, AF11)>, /* ETH_RGMII_CLK125 */
<STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('B', 12, AF11)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('G', 11, AF11)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('C', 1, AF11)>; /* ETH_MDC */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('A', 2, AF11)>; /* ETH_MDIO */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins3 {
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
<STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
bias-disable;
};
};
ethernet0_rgmii_sleep_pins_c: rgmii-sleep-2 {
pins1 {
pinmux = <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_RGMII_CLK125 */
<STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
<STM32_PINMUX('B', 12, ANALOG)>, /* ETH_RGMII_TXD0 */
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
<STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
<STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
<STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH_MDC */
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
<STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
<STM32_PINMUX('B', 1, ANALOG)>, /* ETH_RGMII_RXD3 */
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
};
};
ethernet0_rmii_pins_a: rmii-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
@ -182,7 +291,7 @@
};
};
ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
ethernet0_rmii_sleep_pins_a: rmii-sleep-0 {
pins1 {
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
@ -250,14 +359,14 @@
};
};
i2c1_pins_sleep_a: i2c1-1 {
i2c1_sleep_pins_a: i2c1-sleep-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
<STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
};
};
i2c1_pins_b: i2c1-2 {
i2c1_pins_b: i2c1-1 {
pins {
pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
<STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
@ -267,7 +376,7 @@
};
};
i2c1_pins_sleep_b: i2c1-3 {
i2c1_sleep_pins_b: i2c1-sleep-1 {
pins {
pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
<STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
@ -284,14 +393,14 @@
};
};
i2c2_pins_sleep_a: i2c2-1 {
i2c2_sleep_pins_a: i2c2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('H', 4, ANALOG)>, /* I2C2_SCL */
<STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
};
};
i2c2_pins_b1: i2c2-2 {
i2c2_pins_b1: i2c2-1 {
pins {
pinmux = <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
bias-disable;
@ -300,12 +409,29 @@
};
};
i2c2_pins_sleep_b1: i2c2-3 {
i2c2_sleep_pins_b1: i2c2-sleep-1 {
pins {
pinmux = <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
};
};
i2c2_pins_c: i2c2-2 {
pins {
pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
<STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c2_pins_sleep_c: i2c2-sleep-2 {
pins {
pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
<STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
};
};
i2c5_pins_a: i2c5-0 {
pins {
pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
@ -316,7 +442,7 @@
};
};
i2c5_pins_sleep_a: i2c5-1 {
i2c5_sleep_pins_a: i2c5-sleep-0 {
pins {
pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* I2C5_SCL */
<STM32_PINMUX('A', 12, ANALOG)>; /* I2C5_SDA */
@ -324,6 +450,23 @@
};
};
i2c5_pins_b: i2c5-1 {
pins {
pinmux = <STM32_PINMUX('D', 0, AF4)>, /* I2C5_SCL */
<STM32_PINMUX('D', 1, AF4)>; /* I2C5_SDA */
bias-disable;
drive-open-drain;
slew-rate = <0>;
};
};
i2c5_sleep_pins_b: i2c5-sleep-1 {
pins {
pinmux = <STM32_PINMUX('D', 0, ANALOG)>, /* I2C5_SCL */
<STM32_PINMUX('D', 1, ANALOG)>; /* I2C5_SDA */
};
};
i2s2_pins_a: i2s2-0 {
pins {
pinmux = <STM32_PINMUX('I', 3, AF5)>, /* I2S2_SDO */
@ -335,7 +478,7 @@
};
};
i2s2_pins_sleep_a: i2s2-1 {
i2s2_sleep_pins_a: i2s2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('I', 3, ANALOG)>, /* I2S2_SDO */
<STM32_PINMUX('B', 9, ANALOG)>, /* I2S2_WS */
@ -343,7 +486,7 @@
};
};
ltdc_pins_a: ltdc-a-0 {
ltdc_pins_a: ltdc-0 {
pins {
pinmux = <STM32_PINMUX('G', 7, AF14)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
@ -379,7 +522,7 @@
};
};
ltdc_pins_sleep_a: ltdc-a-1 {
ltdc_sleep_pins_a: ltdc-sleep-0 {
pins {
pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
@ -412,7 +555,7 @@
};
};
ltdc_pins_b: ltdc-b-0 {
ltdc_pins_b: ltdc-1 {
pins {
pinmux = <STM32_PINMUX('I', 14, AF14)>, /* LCD_CLK */
<STM32_PINMUX('I', 12, AF14)>, /* LCD_HSYNC */
@ -448,7 +591,7 @@
};
};
ltdc_pins_sleep_b: ltdc-b-1 {
ltdc_sleep_pins_b: ltdc-sleep-1 {
pins {
pinmux = <STM32_PINMUX('I', 14, ANALOG)>, /* LCD_CLK */
<STM32_PINMUX('I', 12, ANALOG)>, /* LCD_HSYNC */
@ -481,6 +624,142 @@
};
};
ltdc_pins_c: ltdc-2 {
pins1 {
pinmux = <STM32_PINMUX('B', 1, AF9)>, /* LTDC_R6 */
<STM32_PINMUX('B', 9, AF14)>, /* LTDC_B7 */
<STM32_PINMUX('C', 0, AF14)>, /* LTDC_R5 */
<STM32_PINMUX('D', 3, AF14)>, /* LTDC_G7 */
<STM32_PINMUX('D', 6, AF14)>, /* LTDC_B2 */
<STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
<STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
<STM32_PINMUX('E', 12, AF14)>, /* LTDC_B4 */
<STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */
<STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */
<STM32_PINMUX('H', 4, AF9)>, /* LTDC_G5 */
<STM32_PINMUX('H', 8, AF14)>, /* LTDC_R2 */
<STM32_PINMUX('H', 9, AF14)>, /* LTDC_R3 */
<STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
<STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
<STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
<STM32_PINMUX('I', 1, AF14)>, /* LTDC_G6 */
<STM32_PINMUX('I', 5, AF14)>, /* LTDC_B5 */
<STM32_PINMUX('I', 6, AF14)>, /* LTDC_B6 */
<STM32_PINMUX('I', 9, AF14)>, /* LTDC_VSYNC */
<STM32_PINMUX('I', 10, AF14)>; /* LTDC_HSYNC */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('E', 14, AF14)>; /* LTDC_CLK */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
};
ltdc_sleep_pins_c: ltdc-sleep-2 {
pins1 {
pinmux = <STM32_PINMUX('B', 1, ANALOG)>, /* LTDC_R6 */
<STM32_PINMUX('B', 9, ANALOG)>, /* LTDC_B7 */
<STM32_PINMUX('C', 0, ANALOG)>, /* LTDC_R5 */
<STM32_PINMUX('D', 3, ANALOG)>, /* LTDC_G7 */
<STM32_PINMUX('D', 6, ANALOG)>, /* LTDC_B2 */
<STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
<STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
<STM32_PINMUX('E', 12, ANALOG)>, /* LTDC_B4 */
<STM32_PINMUX('E', 13, ANALOG)>, /* LTDC_DE */
<STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */
<STM32_PINMUX('H', 4, ANALOG)>, /* LTDC_G5 */
<STM32_PINMUX('H', 8, ANALOG)>, /* LTDC_R2 */
<STM32_PINMUX('H', 9, ANALOG)>, /* LTDC_R3 */
<STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
<STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
<STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
<STM32_PINMUX('I', 1, ANALOG)>, /* LTDC_G6 */
<STM32_PINMUX('I', 5, ANALOG)>, /* LTDC_B5 */
<STM32_PINMUX('I', 6, ANALOG)>, /* LTDC_B6 */
<STM32_PINMUX('I', 9, ANALOG)>, /* LTDC_VSYNC */
<STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */
<STM32_PINMUX('E', 14, ANALOG)>; /* LTDC_CLK */
};
};
ltdc_pins_d: ltdc-3 {
pins1 {
pinmux = <STM32_PINMUX('G', 7, AF14)>; /* LCD_CLK */
bias-disable;
drive-push-pull;
slew-rate = <3>;
};
pins2 {
pinmux = <STM32_PINMUX('I', 10, AF14)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 9, AF14)>, /* LCD_VSYNC */
<STM32_PINMUX('E', 13, AF14)>, /* LCD_DE */
<STM32_PINMUX('G', 13, AF14)>, /* LCD_R0 */
<STM32_PINMUX('H', 3, AF14)>, /* LCD_R1 */
<STM32_PINMUX('H', 8, AF14)>, /* LCD_R2 */
<STM32_PINMUX('H', 9, AF14)>, /* LCD_R3 */
<STM32_PINMUX('A', 5, AF14)>, /* LCD_R4 */
<STM32_PINMUX('H', 11, AF14)>, /* LCD_R5 */
<STM32_PINMUX('H', 12, AF14)>, /* LCD_R6 */
<STM32_PINMUX('E', 15, AF14)>, /* LCD_R7 */
<STM32_PINMUX('E', 5, AF14)>, /* LCD_G0 */
<STM32_PINMUX('B', 0, AF14)>, /* LCD_G1 */
<STM32_PINMUX('H', 13, AF14)>, /* LCD_G2 */
<STM32_PINMUX('E', 11, AF14)>, /* LCD_G3 */
<STM32_PINMUX('H', 15, AF14)>, /* LCD_G4 */
<STM32_PINMUX('H', 4, AF9)>, /* LCD_G5 */
<STM32_PINMUX('I', 11, AF9)>, /* LCD_G6 */
<STM32_PINMUX('G', 8, AF14)>, /* LCD_G7 */
<STM32_PINMUX('D', 9, AF14)>, /* LCD_B0 */
<STM32_PINMUX('G', 12, AF14)>, /* LCD_B1 */
<STM32_PINMUX('G', 10, AF14)>, /* LCD_B2 */
<STM32_PINMUX('D', 10, AF14)>, /* LCD_B3 */
<STM32_PINMUX('E', 12, AF14)>, /* LCD_B4 */
<STM32_PINMUX('A', 3, AF14)>, /* LCD_B5 */
<STM32_PINMUX('B', 8, AF14)>, /* LCD_B6 */
<STM32_PINMUX('I', 7, AF14)>; /* LCD_B7 */
bias-disable;
drive-push-pull;
slew-rate = <2>;
};
};
ltdc_sleep_pins_d: ltdc-sleep-3 {
pins {
pinmux = <STM32_PINMUX('G', 7, ANALOG)>, /* LCD_CLK */
<STM32_PINMUX('I', 10, ANALOG)>, /* LCD_HSYNC */
<STM32_PINMUX('I', 9, ANALOG)>, /* LCD_VSYNC */
<STM32_PINMUX('E', 13, ANALOG)>, /* LCD_DE */
<STM32_PINMUX('G', 13, ANALOG)>, /* LCD_R0 */
<STM32_PINMUX('H', 3, ANALOG)>, /* LCD_R1 */
<STM32_PINMUX('H', 8, ANALOG)>, /* LCD_R2 */
<STM32_PINMUX('H', 9, ANALOG)>, /* LCD_R3 */
<STM32_PINMUX('A', 5, ANALOG)>, /* LCD_R4 */
<STM32_PINMUX('H', 11, ANALOG)>, /* LCD_R5 */
<STM32_PINMUX('H', 12, ANALOG)>, /* LCD_R6 */
<STM32_PINMUX('E', 15, ANALOG)>, /* LCD_R7 */
<STM32_PINMUX('E', 5, ANALOG)>, /* LCD_G0 */
<STM32_PINMUX('B', 0, ANALOG)>, /* LCD_G1 */
<STM32_PINMUX('H', 13, ANALOG)>, /* LCD_G2 */
<STM32_PINMUX('E', 11, ANALOG)>, /* LCD_G3 */
<STM32_PINMUX('H', 15, ANALOG)>, /* LCD_G4 */
<STM32_PINMUX('H', 4, ANALOG)>, /* LCD_G5 */
<STM32_PINMUX('I', 11, ANALOG)>, /* LCD_G6 */
<STM32_PINMUX('G', 8, ANALOG)>, /* LCD_G7 */
<STM32_PINMUX('D', 9, ANALOG)>, /* LCD_B0 */
<STM32_PINMUX('G', 12, ANALOG)>, /* LCD_B1 */
<STM32_PINMUX('G', 10, ANALOG)>, /* LCD_B2 */
<STM32_PINMUX('D', 10, ANALOG)>, /* LCD_B3 */
<STM32_PINMUX('E', 12, ANALOG)>, /* LCD_B4 */
<STM32_PINMUX('A', 3, ANALOG)>, /* LCD_B5 */
<STM32_PINMUX('B', 8, ANALOG)>, /* LCD_B6 */
<STM32_PINMUX('I', 7, ANALOG)>; /* LCD_B7 */
};
};
m_can1_pins_a: m-can1-0 {
pins1 {
pinmux = <STM32_PINMUX('H', 13, AF9)>; /* CAN1_TX */
@ -501,6 +780,46 @@
};
};
m_can1_pins_b: m-can1-1 {
pins1 {
pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
pins2 {
pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
bias-disable;
};
};
m_can1_sleep_pins_b: m_can1-sleep-1 {
pins {
pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
<STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
};
};
m_can2_pins_a: m-can2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
pins2 {
pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
bias-disable;
};
};
m_can2_sleep_pins_a: m_can2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
<STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
};
};
pwm1_pins_a: pwm1-0 {
pins {
pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
@ -550,6 +869,21 @@
};
};
pwm3_pins_b: pwm3-1 {
pins {
pinmux = <STM32_PINMUX('B', 5, AF2)>; /* TIM3_CH2 */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
};
pwm3_sleep_pins_b: pwm3-sleep-1 {
pins {
pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* TIM3_CH2 */
};
};
pwm4_pins_a: pwm4-0 {
pins {
pinmux = <STM32_PINMUX('D', 14, AF2)>, /* TIM4_CH3 */
@ -597,6 +931,25 @@
};
};
pwm5_pins_b: pwm5-1 {
pins {
pinmux = <STM32_PINMUX('H', 11, AF2)>, /* TIM5_CH2 */
<STM32_PINMUX('H', 12, AF2)>, /* TIM5_CH3 */
<STM32_PINMUX('I', 0, AF2)>; /* TIM5_CH4 */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
};
pwm5_sleep_pins_b: pwm5-sleep-1 {
pins {
pinmux = <STM32_PINMUX('H', 11, ANALOG)>, /* TIM5_CH2 */
<STM32_PINMUX('H', 12, ANALOG)>, /* TIM5_CH3 */
<STM32_PINMUX('I', 0, ANALOG)>; /* TIM5_CH4 */
};
};
pwm8_pins_a: pwm8-0 {
pins {
pinmux = <STM32_PINMUX('I', 2, AF3)>; /* TIM8_CH4 */
@ -710,7 +1063,7 @@
};
};
sai2a_sleep_pins_a: sai2a-1 {
sai2a_sleep_pins_a: sai2a-sleep-0 {
pins {
pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* SAI2_SCK_A */
<STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
@ -720,7 +1073,7 @@
};
sai2a_pins_b: sai2a-2 {
sai2a_pins_b: sai2a-1 {
pins1 {
pinmux = <STM32_PINMUX('I', 6, AF10)>, /* SAI2_SD_A */
<STM32_PINMUX('I', 7, AF10)>, /* SAI2_FS_A */
@ -731,7 +1084,7 @@
};
};
sai2a_sleep_pins_b: sai2a-sleep-3 {
sai2a_sleep_pins_b: sai2a-sleep-1 {
pins {
pinmux = <STM32_PINMUX('I', 6, ANALOG)>, /* SAI2_SD_A */
<STM32_PINMUX('I', 7, ANALOG)>, /* SAI2_FS_A */
@ -739,6 +1092,25 @@
};
};
sai2a_pins_c: sai2a-4 {
pins {
pinmux = <STM32_PINMUX('D', 13, AF10)>, /* SAI2_SCK_A */
<STM32_PINMUX('D', 11, AF10)>, /* SAI2_SD_A */
<STM32_PINMUX('D', 12, AF10)>; /* SAI2_FS_A */
slew-rate = <0>;
drive-push-pull;
bias-disable;
};
};
sai2a_sleep_pins_c: sai2a-5 {
pins {
pinmux = <STM32_PINMUX('D', 13, ANALOG)>, /* SAI2_SCK_A */
<STM32_PINMUX('D', 11, ANALOG)>, /* SAI2_SD_A */
<STM32_PINMUX('D', 12, ANALOG)>; /* SAI2_FS_A */
};
};
sai2b_pins_a: sai2b-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
@ -754,7 +1126,7 @@
};
};
sai2b_sleep_pins_a: sai2b-1 {
sai2b_sleep_pins_a: sai2b-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
<STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
@ -763,14 +1135,27 @@
};
};
sai2b_pins_b: sai2b-2 {
sai2b_pins_b: sai2b-1 {
pins {
pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
bias-disable;
};
};
sai2b_sleep_pins_b: sai2b-3 {
sai2b_sleep_pins_b: sai2b-sleep-1 {
pins {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
};
};
sai2b_pins_c: sai2a-4 {
pins1 {
pinmux = <STM32_PINMUX('F', 11, AF10)>; /* SAI2_SD_B */
bias-disable;
};
};
sai2b_sleep_pins_c: sai2a-sleep-5 {
pins {
pinmux = <STM32_PINMUX('F', 11, ANALOG)>; /* SAI2_SD_B */
};
@ -785,7 +1170,7 @@
};
};
sai4a_sleep_pins_a: sai4a-1 {
sai4a_sleep_pins_a: sai4a-sleep-0 {
pins {
pinmux = <STM32_PINMUX('B', 5, ANALOG)>; /* SAI4_SD_A */
};
@ -869,6 +1254,30 @@
};
};
sdmmc1_dir_pins_b: sdmmc1-dir-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 2, AF11)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('E', 14, AF11)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, AF11)>; /* SDMMC1_CDIR */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2{
pinmux = <STM32_PINMUX('E', 4, AF8)>; /* SDMMC1_CKIN */
bias-pull-up;
};
};
sdmmc1_dir_sleep_pins_b: sdmmc1-dir-sleep-1 {
pins {
pinmux = <STM32_PINMUX('F', 2, ANALOG)>, /* SDMMC1_D0DIR */
<STM32_PINMUX('E', 14, ANALOG)>, /* SDMMC1_D123DIR */
<STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC1_CDIR */
<STM32_PINMUX('E', 4, ANALOG)>; /* SDMMC1_CKIN */
};
};
sdmmc2_b4_pins_a: sdmmc2-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 14, AF9)>, /* SDMMC2_D0 */
@ -987,6 +1396,48 @@
};
};
sdmmc2_d47_pins_b: sdmmc2-d47-1 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, AF10)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
slew-rate = <1>;
drive-push-pull;
bias-disable;
};
};
sdmmc2_d47_sleep_pins_b: sdmmc2-d47-sleep-1 {
pins {
pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 9, ANALOG)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
};
};
sdmmc2_d47_pins_c: sdmmc2-d47-2 {
pins {
pinmux = <STM32_PINMUX('A', 8, AF9)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 15, AF9)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc2_d47_sleep_pins_c: sdmmc2-d47-sleep-2 {
pins {
pinmux = <STM32_PINMUX('A', 8, ANALOG)>, /* SDMMC2_D4 */
<STM32_PINMUX('A', 15, ANALOG)>, /* SDMMC2_D5 */
<STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */
<STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
};
};
sdmmc3_b4_pins_a: sdmmc3-b4-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
@ -1041,6 +1492,60 @@
};
};
sdmmc3_b4_pins_b: sdmmc3-b4-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
<STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, AF10)>, /* SDMMC3_D3 */
<STM32_PINMUX('D', 0, AF10)>; /* SDMMC3_CMD */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2 {
pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
slew-rate = <2>;
drive-push-pull;
bias-pull-up;
};
};
sdmmc3_b4_od_pins_b: sdmmc3-b4-od-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 0, AF9)>, /* SDMMC3_D0 */
<STM32_PINMUX('F', 4, AF9)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, AF10)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, AF10)>; /* SDMMC3_D3 */
slew-rate = <1>;
drive-push-pull;
bias-pull-up;
};
pins2 {
pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
slew-rate = <2>;
drive-push-pull;
bias-pull-up;
};
pins3 {
pinmux = <STM32_PINMUX('D', 0, AF10)>; /* SDMMC2_CMD */
slew-rate = <1>;
drive-open-drain;
bias-pull-up;
};
};
sdmmc3_b4_sleep_pins_b: sdmmc3-b4-sleep-1 {
pins {
pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC3_D0 */
<STM32_PINMUX('F', 4, ANALOG)>, /* SDMMC3_D1 */
<STM32_PINMUX('D', 5, ANALOG)>, /* SDMMC3_D2 */
<STM32_PINMUX('D', 7, ANALOG)>, /* SDMMC3_D3 */
<STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
<STM32_PINMUX('D', 0, ANALOG)>; /* SDMMC3_CMD */
};
};
spdifrx_pins_a: spdifrx-0 {
pins {
pinmux = <STM32_PINMUX('G', 12, AF8)>; /* SPDIF_IN1 */
@ -1048,12 +1553,75 @@
};
};
spdifrx_sleep_pins_a: spdifrx-1 {
spdifrx_sleep_pins_a: spdifrx-sleep-0 {
pins {
pinmux = <STM32_PINMUX('G', 12, ANALOG)>; /* SPDIF_IN1 */
};
};
spi2_pins_a: spi2-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
<STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
bias-disable;
};
};
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
<STM32_PINMUX('D', 4, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 6, AF7)>, /* USART2_RX */
<STM32_PINMUX('D', 3, AF7)>; /* USART2_CTS_NSS */
bias-disable;
};
};
usart2_sleep_pins_a: usart2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('D', 6, ANALOG)>, /* USART2_RX */
<STM32_PINMUX('D', 3, ANALOG)>; /* USART2_CTS_NSS */
};
};
usart2_pins_b: usart2-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
<STM32_PINMUX('A', 1, AF7)>; /* USART2_RTS */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('F', 4, AF7)>, /* USART2_RX */
<STM32_PINMUX('E', 15, AF7)>; /* USART2_CTS_NSS */
bias-disable;
};
};
usart2_sleep_pins_b: usart2-sleep-1 {
pins {
pinmux = <STM32_PINMUX('F', 5, ANALOG)>, /* USART2_TX */
<STM32_PINMUX('A', 1, ANALOG)>, /* USART2_RTS */
<STM32_PINMUX('F', 4, ANALOG)>, /* USART2_RX */
<STM32_PINMUX('E', 15, ANALOG)>; /* USART2_CTS_NSS */
};
};
usart3_pins_a: usart3-0 {
pins1 {
pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
@ -1093,6 +1661,19 @@
};
};
uart4_pins_c: uart4-2 {
pins1 {
pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
bias-disable;
};
};
uart7_pins_a: uart7-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART4_TX */
@ -1108,6 +1689,19 @@
};
};
uart7_pins_b: uart7-1 {
pins1 {
pinmux = <STM32_PINMUX('F', 7, AF7)>; /* UART7_TX */
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32_PINMUX('F', 6, AF7)>; /* UART7_RX */
bias-disable;
};
};
uart8_pins_a: uart8-0 {
pins1 {
pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
@ -1145,7 +1739,7 @@
};
};
i2c2_pins_sleep_b2: i2c2-1 {
i2c2_sleep_pins_b2: i2c2-sleep-0 {
pins {
pinmux = <STM32_PINMUX('Z', 0, ANALOG)>; /* I2C2_SCL */
};
@ -1161,7 +1755,7 @@
};
};
i2c4_pins_sleep_a: i2c4-1 {
i2c4_sleep_pins_a: i2c4-sleep-0 {
pins {
pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
<STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
@ -1182,4 +1776,18 @@
bias-disable;
};
};
spi4_pins_a: spi4-0 {
pins {
pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
<STM32_PINMUX('E', 6, AF5)>; /* SPI4_MOSI */
bias-disable;
drive-push-pull;
slew-rate = <1>;
};
pins2 {
pinmux = <STM32_PINMUX('E', 13, AF5)>; /* SPI4_MISO */
bias-disable;
};
};
};

37
arch/arm/boot/dts/stm32mp151.dtsi
View File

@ -24,10 +24,8 @@
};
psci {
compatible = "arm,psci";
compatible = "arm,psci-1.0";
method = "smc";
cpu_off = <0x84000002>;
cpu_on = <0x84000003>;
};
intc: interrupt-controller@a0021000 {
@ -475,7 +473,7 @@
};
i2c1: i2c@40012000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x40012000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
@ -484,12 +482,13 @@
resets = <&rcc I2C1_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x1>;
wakeup-source;
status = "disabled";
};
i2c2: i2c@40013000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x40013000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
@ -498,12 +497,13 @@
resets = <&rcc I2C2_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x2>;
wakeup-source;
status = "disabled";
};
i2c3: i2c@40014000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x40014000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
@ -512,12 +512,13 @@
resets = <&rcc I2C3_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x4>;
wakeup-source;
status = "disabled";
};
i2c5: i2c@40015000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x40015000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
@ -526,6 +527,7 @@
resets = <&rcc I2C5_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x10>;
wakeup-source;
status = "disabled";
};
@ -550,14 +552,14 @@
dac1: dac@1 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <1>;
status = "disabled";
};
dac2: dac@2 {
compatible = "st,stm32-dac";
#io-channels-cells = <1>;
#io-channel-cells = <1>;
reg = <2>;
status = "disabled";
};
@ -1124,6 +1126,11 @@
};
};
pwr_mcu: pwr_mcu@50001014 {
compatible = "syscon";
reg = <0x50001014 0x4>;
};
exti: interrupt-controller@5000d000 {
compatible = "st,stm32mp1-exti", "syscon";
interrupt-controller;
@ -1423,6 +1430,11 @@
clock-names = "lcd";
resets = <&rcc LTDC_R>;
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
};
};
iwdg2: watchdog@5a002000 {
@ -1476,7 +1488,7 @@
};
i2c4: i2c@5c002000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x5c002000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
@ -1485,6 +1497,7 @@
resets = <&rcc I2C4_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x8>;
wakeup-source;
status = "disabled";
};
@ -1512,7 +1525,7 @@
};
i2c6: i2c@5c009000 {
compatible = "st,stm32f7-i2c";
compatible = "st,stm32mp15-i2c";
reg = <0x5c009000 0x400>;
interrupt-names = "event", "error";
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
@ -1521,6 +1534,7 @@
resets = <&rcc I2C6_R>;
#address-cells = <1>;
#size-cells = <0>;
st,syscfg-fmp = <&syscfg 0x4 0x20>;
wakeup-source;
status = "disabled";
};
@ -1700,6 +1714,7 @@
resets = <&rcc MCU_R>;
st,syscfg-holdboot = <&rcc 0x10C 0x1>;
st,syscfg-tz = <&rcc 0x000 0x1>;
st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
status = "disabled";
};
};

8
arch/arm/boot/dts/stm32mp157.dtsi
View File

@ -15,7 +15,6 @@
clocks = <&rcc GPU>, <&rcc GPU_K>;
clock-names = "bus" ,"core";
resets = <&rcc GPU_R>;
status = "disabled";
};
dsi: dsi@5a000000 {
@ -25,7 +24,14 @@
clock-names = "pclk", "ref", "px_clk";
resets = <&rcc DSI_R>;
reset-names = "apb";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};

314
arch/arm/boot/dts/stm32mp157a-avenger96.dts
View File

@ -2,318 +2,10 @@
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/st,stpmic1.h>
/ {
model = "Arrow Electronics STM32MP157A Avenger96 board";
compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
aliases {
ethernet0 = &ethernet0;
mmc0 = &sdmmc1;
serial0 = &uart4;
serial1 = &uart7;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x40000000>;
};
led {
compatible = "gpio-leds";
led1 {
label = "green:user1";
gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led2 {
label = "green:user2";
gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led3 {
label = "green:user3";
gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led4 {
label = "green:user3";
gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
panic-indicator;
};
led5 {
label = "yellow:wifi";
gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tx";
default-state = "off";
};
led6 {
label = "blue:bt";
gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "bluetooth-power";
default-state = "off";
};
};
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rgmii_pins_a>;
pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii";
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@7 {
reg = <7>;
};
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_b>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
status = "okay";
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo2-supply = <&v3v3>;
ldo3-supply = <&vdd_ddr>;
ldo5-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
vdda: ldo1 {
regulator-name = "vdda";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO1 0>;
interrupt-parent = <&pmic>;
};
v2v8: ldo2 {
regulator-name = "v2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
interrupts = <IT_CURLIM_LDO2 0>;
interrupt-parent = <&pmic>;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <750000>;
regulator-always-on;
regulator-over-current-protection;
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
interrupts = <IT_CURLIM_LDO4 0>;
interrupt-parent = <&pmic>;
};
vdd_sd: ldo5 {
regulator-name = "vdd_sd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO5 0>;
interrupt-parent = <&pmic>;
regulator-boot-on;
};
v1v8: ldo6 {
regulator-name = "v1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
interrupts = <IT_CURLIM_LDO6 0>;
interrupt-parent = <&pmic>;
regulator-enable-ramp-delay = <300000>;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
};
bst_out: boost {
regulator-name = "bst_out";
interrupts = <IT_OCP_BOOST 0>;
interrupt-parent = <&pmic>;
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
interrupt-parent = <&pmic>;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
interrupt-parent = <&pmic>;
regulator-active-discharge = <1>;
};
};
onkey {
compatible = "st,stpmic1-onkey";
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
interrupt-names = "onkey-falling", "onkey-rising";
status = "okay";
};
watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
};
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rng1 {
status = "okay";
};
&rtc {
status = "okay";
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
status = "okay";
};
&uart4 {
/* On Low speed expansion header */
label = "LS-UART1";
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_b>;
status = "okay";
};
&uart7 {
/* On Low speed expansion header */
label = "LS-UART0";
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_a>;
status = "okay";
};
/* This DT is here only for backward compatibility */
#include "stm32mp157a-dhcor-avenger96.dts"

38
arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts Normal file
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@ -0,0 +1,38 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*
* DHCOR STM32MP1 variant:
* DHCR-STM32MP157A-C065-R102-V18-SPI-C-01LG
* DHCOR PCB number: 586-100 or newer
* Avenger96 PCB number: 588-200 or newer
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcor-som.dtsi"
#include "stm32mp15xx-dhcor-avenger96.dtsi"
/ {
model = "Arrow Electronics STM32MP157A Avenger96 board";
compatible = "arrow,stm32mp157a-avenger96", "dh,stm32mp157a-dhcor-som",
"st,stm32mp157";
};
&m_can1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can1_pins_b>;
pinctrl-1 = <&m_can1_sleep_pins_b>;
status = "disabled";
};
&m_can2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&m_can2_pins_a>;
pinctrl-1 = <&m_can2_sleep_pins_a>;
status = "disabled";
};

68
arch/arm/boot/dts/stm32mp157a-iot-box.dts Normal file
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@ -0,0 +1,68 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Manivannan Sadhasivam
*/
/dts-v1/;
#include "stm32mp157a-stinger96.dtsi"
/ {
model = "Shiratech STM32MP157A IoT Box";
compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
wlan_pwr: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "wl-reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&i2c2 {
ccs811@5b {
compatible = "ams,ccs811";
reg = <0x5b>;
wakeup-gpios = <&gpioa 12 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpioa 11 GPIO_ACTIVE_LOW>;
};
};
/* WiFi */
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a>;
pinctrl-1 = <&sdmmc2_b4_od_pins_b>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
broken-cd;
non-removable;
st,neg-edge;
bus-width = <1>;
vmmc-supply = <&wlan_pwr>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
/* Bluetooth */
&uart4 {
/* Note: HW flow control is broken, hence using custom CTS/RTS gpios */
/delete-property/st,hw-flow-ctrl;
cts-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
rts-gpios = <&gpiob 0 GPIO_ACTIVE_LOW>;
status = "okay";
bluetooth {
shutdown-gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
compatible = "brcm,bcm43438-bt";
max-speed = <115200>;
};
};

12
arch/arm/boot/dts/stm32mp157a-stinger96.dts Normal file
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@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Manivannan Sadhasivam
*/
/dts-v1/;
#include "stm32mp157a-stinger96.dtsi"
/ {
model = "Shiratech STM32MP157A Stinger96 board";
compatible = "shiratech,stm32mp157a-stinger96", "st,stm32mp157";
};

342
arch/arm/boot/dts/stm32mp157a-stinger96.dtsi Normal file
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@ -0,0 +1,342 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Manivannan Sadhasivam
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/st,stpmic1.h>
/ {
aliases {
mmc0 = &sdmmc1;
serial0 = &uart4;
serial1 = &uart7;
serial2 = &usart2;
spi0 = &spi4;
};
chosen {
stdout-path = "serial1:115200n8";
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x10000000>;
};
led {
compatible = "gpio-leds";
led1 {
label = "green:user1";
gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led2 {
label = "green:user2";
gpios = <&gpioh 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led3 {
label = "green:user3";
gpios = <&gpioh 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led4 {
label = "green:user4";
gpios = <&gpiof 12 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
panic-indicator;
};
};
sd_switch: regulator-sd_switch {
compatible = "regulator-gpio";
regulator-name = "sd_switch";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-type = "voltage";
regulator-always-on;
gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1>,
<2900000 0x0>;
};
};
/* Only headless mode is supported */
&gpu {
status = "disabled";
};
/* LS-I2C0 */
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
i2c-scl-rising-time-ns = <1000>;
i2c-scl-falling-time-ns = <300>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
status = "okay";
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo2-supply = <&v3v3>;
ldo3-supply = <&vdd_ddr>;
ldo5-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
st,mask-reset;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
vdda: ldo1 {
regulator-name = "vdda";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO1 0>;
};
v2v9: ldo2 {
regulator-name = "v2v9";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO2 0>;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <750000>;
regulator-always-on;
regulator-over-current-protection;
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
vdd_sd: ldo5 {
regulator-name = "vdd_sd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO5 0>;
regulator-boot-on;
};
v1v8: ldo6 {
regulator-name = "v1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO6 0>;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
regulator-name = "bst_out";
interrupts = <IT_OCP_BOOST 0>;
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
};
};
onkey {
compatible = "st,stpmic1-onkey";
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
interrupt-names = "onkey-falling", "onkey-rising";
status = "okay";
};
watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
};
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rng1 {
status = "okay";
};
&rtc {
status = "okay";
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
broken-cd;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
status = "okay";
};
/* LS-SPI0 */
&spi4 {
pinctrl-names = "default";
pinctrl-0 = <&spi4_pins_a>;
cs-gpios = <&gpioe 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/* BG96 */
&usart2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&usart2_pins_b>;
pinctrl-1 = <&usart2_sleep_pins_b>;
st,hw-flow-ctrl;
status = "okay";
};
/* LS-UART0 */
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_c>;
st,hw-flow-ctrl;
status = "okay";
};
/* Debug console */
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_b>;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbotg_hs {
dr_mode = "peripheral";
pinctrl-0 = <&usbotg_hs_pins_a>;
pinctrl-names = "default";
phy-names = "usb2-phy";
phys = <&usbphyc_port1 0>;
vbus-supply = <&vbus_otg>;
status = "okay";
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};

265
arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dts
View File

@ -1,160 +1,23 @@
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2019 Marek Vasut <marex@denx.de>
* Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
*
* DHCOM STM32MP1 variant:
* DHCM-STM32MP157C-C065-R102-F0819-SPI-E2-CAN2-SDR104-RTC-WBT-T-DSI-I-01D2
* DHCOR PCB number: 587-200 or newer
* PDK2 PCB number: 516-400 or newer
*/
/dts-v1/;
#include "stm32mp157c-dhcom-som.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xx-dhcom-som.dtsi"
#include "stm32mp15xx-dhcom-pdk2.dtsi"
/ {
model = "STMicroelectronics STM32MP157C DHCOM Premium Developer Kit (2)";
compatible = "dh,stm32mp157c-dhcom-pdk2", "st,stm32mp157";
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart8;
ethernet0 = &ethernet0;
};
chosen {
stdout-path = "serial0:115200n8";
};
clk_ext_audio_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
display_bl: display-bl {
compatible = "pwm-backlight";
pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
default-brightness-level = <8>;
enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
ethernet_vio: vioregulator {
compatible = "regulator-fixed";
regulator-name = "vio";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
regulator-always-on;
regulator-boot-on;
};
panel {
compatible = "edt,etm0700g0edh6";
backlight = <&display_bl>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
sound {
compatible = "audio-graph-card";
routing =
"MIC_IN", "Capture",
"Capture", "Mic Bias",
"Playback", "HP_OUT";
dais = <&sai2a_port &sai2b_port>;
status = "okay";
};
};
&cec {
pinctrl-names = "default";
pinctrl-0 = <&cec_pins_a>;
status = "okay";
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rmii_pins_a>;
pinctrl-1 = <&ethernet0_rmii_pins_sleep_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rmii";
max-speed = <100>;
phy-handle = <&phy0>;
st,eth-ref-clk-sel;
phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@1 {
reg = <1>;
};
};
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
VDDA-supply = <&v3v3>;
VDDIO-supply = <&vdd>;
sgtl5000_port: port {
#address-cells = <1>;
#size-cells = <0>;
sgtl5000_tx_endpoint: endpoint@0 {
reg = <0>;
remote-endpoint = <&sai2a_endpoint>;
frame-master;
bitclock-master;
};
sgtl5000_rx_endpoint: endpoint@1 {
reg = <1>;
remote-endpoint = <&sai2b_endpoint>;
frame-master;
bitclock-master;
};
};
};
polytouch@38 {
compatible = "edt,edt-ft5x06";
reg = <0x38>;
interrupt-parent = <&gpiog>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
linux,wakeup;
};
};
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_b>;
pinctrl-1 = <&ltdc_pins_sleep_b>;
status = "okay";
port {
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
model = "DH Electronics STM32MP157C DHCOM Premium Developer Kit (2)";
compatible = "dh,stm32mp157c-dhcom-pdk2", "dh,stm32mp157c-dhcom-som",
"st,stm32mp157";
};
&m_can1 {
@ -163,103 +26,3 @@
pinctrl-1 = <&m_can1_sleep_pins_a>;
status = "okay";
};
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_b &sai2b_pins_b>;
pinctrl-1 = <&sai2a_sleep_pins_b &sai2b_sleep_pins_b>;
status = "okay";
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&sgtl5000_tx_endpoint>;
format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
};
};
sai2b: audio-controller@4400b024 {
dma-names = "rx";
st,sync = <&sai2a 2>;
clocks = <&rcc SAI2_K>, <&sai2a>;
clock-names = "sai_ck", "MCLK";
status = "okay";
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&sgtl5000_rx_endpoint>;
format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
};
};
};
&timers2 {
/* spare dmas for other usage (un-delete to enable pwm capture) */
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
pwm2: pwm {
pinctrl-0 = <&pwm2_pins_a>;
pinctrl-names = "default";
status = "okay";
};
timer@1 {
status = "okay";
};
};
&usart3 {
pinctrl-names = "default";
pinctrl-0 = <&usart3_pins_a>;
status = "okay";
};
&uart8 {
pinctrl-names = "default";
pinctrl-0 = <&uart8_pins_a>;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbotg_hs {
dr_mode = "peripheral";
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};

8
arch/arm/boot/dts/stm32mp157c-dk2.dts
View File

@ -27,15 +27,10 @@
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
phy-dsi-supply = <&reg18>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_in: endpoint {
@ -83,9 +78,6 @@
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
ltdc_ep1_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in>;

7
arch/arm/boot/dts/stm32mp157c-ed1.dts
View File

@ -126,13 +126,12 @@
&gpu {
contiguous-area = <&gpu_reserved>;
status = "okay";
};
&i2c4 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_pins_a>;
pinctrl-1 = <&i2c4_pins_sleep_a>;
pinctrl-1 = <&i2c4_sleep_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
clock-frequency = <400000>;
@ -320,6 +319,10 @@
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
status = "okay";
};

14
arch/arm/boot/dts/stm32mp157c-ev1.dts
View File

@ -98,15 +98,10 @@
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
phy-dsi-supply = <&reg18>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_in: endpoint {
@ -141,7 +136,7 @@
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rgmii_pins_a>;
pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii-id";
max-speed = <1000>;
@ -176,7 +171,7 @@
&i2c2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_pins_a>;
pinctrl-1 = <&i2c2_pins_sleep_a>;
pinctrl-1 = <&i2c2_sleep_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
@ -230,7 +225,7 @@
&i2c5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_pins_a>;
pinctrl-1 = <&i2c5_pins_sleep_a>;
pinctrl-1 = <&i2c5_sleep_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
@ -240,9 +235,6 @@
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
ltdc_ep0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_in>;

252
arch/arm/boot/dts/stm32mp157c-lxa-mc1.dts Normal file
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@ -0,0 +1,252 @@
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020 Ahmad Fatoum, Pengutronix
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xx-osd32.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
/ {
model = "Linux Automation MC-1 board";
compatible = "lxa,stm32mp157c-mc1", "st,stm32mp157";
aliases {
ethernet0 = &ethernet0;
mmc0 = &sdmmc1;
mmc1 = &sdmmc2;
serial0 = &uart4;
};
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&backlight_pwm 1 100000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 31 63 95 127 159 191 223 255>;
default-brightness-level = <7>;
power-supply = <&reg_5v2>; /* 3V3_BACKLIGHT */
};
chosen {
stdout-path = &uart4;
};
led-act {
compatible = "gpio-leds";
led-green {
label = "mc1:green:act";
gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
led-rgb {
compatible = "pwm-leds";
led-red {
label = "mc1:red:rgb";
pwms = <&leds_pwm 1 1000000 0>;
max-brightness = <255>;
active-low;
};
led-green {
label = "mc1:green:rgb";
pwms = <&leds_pwm 2 1000000 0>;
max-brightness = <255>;
active-low;
};
led-blue {
label = "mc1:blue:rgb";
pwms = <&leds_pwm 3 1000000 0>;
max-brightness = <255>;
active-low;
};
};
panel: panel {
compatible = "edt,etm0700g0edh6", "simple-panel";
backlight = <&backlight>;
enable-gpios = <&gpiod 4 GPIO_ACTIVE_HIGH>;
power-supply = <&reg_3v3>;
port {
panel_input: endpoint {
remote-endpoint = <&ltdc_ep0_out>;
};
};
};
reg_3v3: regulator_3v3 {
compatible = "regulator-fixed";
regulator-name = "3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
vin-supply = <&v3v3>;
};
/* supplied by either debug board or PoE */
reg_5v2: regulator_5v2 {
compatible = "regulator-fixed";
regulator-name = "5V2";
regulator-min-microvolt = <5200000>;
regulator-max-microvolt = <5200000>;
regulator-always-on;
};
};
&ethernet0 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ethernet0_rgmii_pins_b>;
pinctrl-1 = <&ethernet0_rgmii_sleep_pins_b>;
phy-mode = "rgmii-id";
phy-handle = <&ethphy>;
status = "okay";
mdio0 {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@3 { /* KSZ9031RN */
reg = <3>;
reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; /* ETH_RST# */
interrupt-parent = <&gpioa>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>; /* ETH_MDINT# */
rxc-skew-ps = <1860>;
txc-skew-ps = <1860>;
reset-assert-us = <10000>;
reset-deassert-us = <300>;
micrel,force-master;
};
};
};
&gpioz {
gpio-line-names = "HWID0", "HWID1", "HWID2", "HWID3", "", "",
"HWID4", "HWID5";
};
&i2c5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c5_pins_b>;
pinctrl-1 = <&i2c5_sleep_pins_b>;
clock-frequency = <400000>;
status = "okay";
touchscreen@38 {
compatible = "edt,edt-ft5x06";
interrupt-parent = <&gpiod>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>; /* TOUCH_INT# */
vcc-supply = <&reg_3v3>;
reg = <0x38>;
reset-gpios = <&gpiof 8 GPIO_ACTIVE_LOW>; /* TOUCH_RESET# */
touchscreen-size-x = <1792>;
touchscreen-size-y = <1024>;
wakeup-source;
};
};
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_c>;
pinctrl-1 = <&ltdc_sleep_pins_c>;
status = "okay";
port {
ltdc_ep0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_input>;
};
};
};
&pmic {
regulators {
buck4-supply = <&reg_5v2>; /* VIN */
ldo2-supply = <&reg_5v2>; /* PMIC_LDO25IN */
ldo5-supply = <&reg_5v2>; /* PMIC_LDO25IN */
boost-supply = <&reg_5v2>; /* PMIC_BSTIN */
pwr_sw2-supply = <&bst_out>; /* PMIC_SWIN */
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
bus-width = <4>;
cd-gpios = <&gpioh 3 GPIO_ACTIVE_LOW>;
disable-wp;
no-1-8-v;
st,neg-edge;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
&sdmmc1_b4_pins_a {
/*
* board lacks external pull-ups on SDMMC lines. Class 10 SD refuses to
* work, thus enable internal pull-ups.
*/
pins1 {
/delete-property/ bias-disable;
bias-pull-up;
};
pins2 {
/delete-property/ bias-disable;
bias-pull-up;
};
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
bus-width = <8>;
no-1-8-v;
no-sd;
no-sdio;
non-removable;
st,neg-edge;
vmmc-supply = <&reg_3v3>;
status = "okay";
};
&timers3 {
status = "okay";
backlight_pwm: pwm {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pwm3_pins_b>;
pinctrl-1 = <&pwm3_sleep_pins_b>;
status = "okay";
};
};
&timers5 {
status = "okay";
leds_pwm: pwm {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pwm5_pins_b>;
pinctrl-1 = <&pwm5_sleep_pins_b>;
status = "okay";
};
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
status = "okay";
};

337
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi Normal file
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@ -0,0 +1,337 @@
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
*/
#include <dt-bindings/input/input.h>
#include <dt-bindings/pwm/pwm.h>
/ {
aliases {
serial0 = &uart4;
serial1 = &usart3;
serial2 = &uart8;
ethernet0 = &ethernet0;
};
chosen {
stdout-path = "serial0:115200n8";
};
clk_ext_audio_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
display_bl: display-bl {
compatible = "pwm-backlight";
pwms = <&pwm2 0 500000 PWM_POLARITY_INVERTED>;
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
default-brightness-level = <8>;
enable-gpios = <&gpioi 0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
ethernet_vio: vioregulator {
compatible = "regulator-fixed";
regulator-name = "vio";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
regulator-always-on;
regulator-boot-on;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#size-cells = <0>;
poll-interval = <20>;
/*
* The EXTi IRQ line 3 is shared with touchscreen and ethernet,
* so mark this as polled GPIO key.
*/
button-0 {
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
compatible = "gpio-keys";
#size-cells = <0>;
button-1 {
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
wakeup-source;
};
button-2 {
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
gpios = <&gpioi 11 GPIO_ACTIVE_LOW>;
wakeup-source;
};
button-3 {
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
gpios = <&gpiod 12 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
led {
compatible = "gpio-leds";
led-0 {
label = "green:led5";
gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-1 {
label = "green:led6";
gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-2 {
label = "green:led7";
gpios = <&gpioi 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led-3 {
label = "green:led8";
gpios = <&gpioi 3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
panel {
compatible = "edt,etm0700g0edh6";
backlight = <&display_bl>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
sound {
compatible = "audio-graph-card";
routing =
"MIC_IN", "Capture",
"Capture", "Mic Bias",
"Playback", "HP_OUT";
dais = <&sai2a_port &sai2b_port>;
status = "okay";
};
};
&cec {
pinctrl-names = "default";
pinctrl-0 = <&cec_pins_a>;
status = "okay";
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rmii_pins_a>;
pinctrl-1 = <&ethernet0_rmii_sleep_pins_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rmii";
max-speed = <100>;
phy-handle = <&phy0>;
st,eth-ref-clk-sel;
phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@1 {
reg = <1>;
};
};
};
&i2c2 { /* Header X22 */
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
};
&i2c5 { /* Header X21 */
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/* spare dmas for other usage */
/delete-property/dmas;
/delete-property/dma-names;
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
VDDA-supply = <&v3v3>;
VDDIO-supply = <&vdd>;
sgtl5000_port: port {
#address-cells = <1>;
#size-cells = <0>;
sgtl5000_tx_endpoint: endpoint@0 {
reg = <0>;
remote-endpoint = <&sai2a_endpoint>;
frame-master;
bitclock-master;
};
sgtl5000_rx_endpoint: endpoint@1 {
reg = <1>;
remote-endpoint = <&sai2b_endpoint>;
frame-master;
bitclock-master;
};
};
};
polytouch@38 {
compatible = "edt,edt-ft5x06";
reg = <0x38>;
interrupt-parent = <&gpiog>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
linux,wakeup;
};
};
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_b>;
pinctrl-1 = <&ltdc_sleep_pins_b>;
status = "okay";
port {
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
clock-names = "pclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_b &sai2b_pins_b>;
pinctrl-1 = <&sai2a_sleep_pins_b &sai2b_sleep_pins_b>;
status = "okay";
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&sgtl5000_tx_endpoint>;
format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
};
};
sai2b: audio-controller@4400b024 {
dma-names = "rx";
st,sync = <&sai2a 2>;
clocks = <&rcc SAI2_K>, <&sai2a>;
clock-names = "sai_ck", "MCLK";
status = "okay";
sai2b_port: port {
sai2b_endpoint: endpoint {
remote-endpoint = <&sgtl5000_rx_endpoint>;
format = "i2s";
mclk-fs = <512>;
dai-tdm-slot-num = <2>;
dai-tdm-slot-width = <16>;
};
};
};
};
&timers2 {
/* spare dmas for other usage (un-delete to enable pwm capture) */
/delete-property/dmas;
/delete-property/dma-names;
status = "okay";
pwm2: pwm {
pinctrl-0 = <&pwm2_pins_a>;
pinctrl-names = "default";
status = "okay";
};
timer@1 {
status = "okay";
};
};
&usart3 {
pinctrl-names = "default";
pinctrl-0 = <&usart3_pins_a>;
status = "okay";
};
&uart8 {
pinctrl-names = "default";
pinctrl-0 = <&uart8_pins_a>;
status = "okay";
};
&usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
};
&usbotg_hs {
dr_mode = "peripheral";
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};

9
arch/arm/boot/dts/stm32mp157c-dhcom-som.dtsi → arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
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@ -1,11 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2019 Marek Vasut <marex@denx.de>
* Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxaa-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
@ -97,10 +94,6 @@
status = "okay";
};
&gpu {
status = "okay";
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;

401
arch/arm/boot/dts/stm32mp15xx-dhcor-avenger96.dtsi Normal file
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@ -0,0 +1,401 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
#include "stm32mp15xx-dhcor-io1v8.dtsi"
/ {
aliases {
ethernet0 = &ethernet0;
mmc0 = &sdmmc1;
serial0 = &uart4;
serial1 = &uart7;
serial2 = &usart2;
spi0 = &qspi;
};
/* XTal Q1 */
cec_clock: clk-cec-fixed {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
chosen {
stdout-path = "serial0:115200n8";
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7513_out>;
};
};
};
led {
compatible = "gpio-leds";
led1 {
label = "green:user0";
gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led2 {
label = "green:user1";
gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
led3 {
label = "green:user2";
gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc1";
default-state = "off";
};
led4 {
label = "green:user3";
gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
default-state = "off";
panic-indicator;
};
};
sd_switch: regulator-sd_switch {
compatible = "regulator-gpio";
regulator-name = "sd_switch";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2900000>;
regulator-type = "voltage";
regulator-always-on;
gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1>,
<2900000 0x0>;
};
sound {
compatible = "audio-graph-card";
label = "STM32MP1-AV96-HDMI";
dais = <&sai2a_port>;
status = "okay";
};
wlan_pwr: regulator-wlan {
compatible = "regulator-fixed";
regulator-name = "wl-reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&adc {
pinctrl-names = "default";
pinctrl-0 = <&adc12_ain_pins_b>;
vdd-supply = <&vdd>;
vdda-supply = <&vdda>;
vref-supply = <&vdda>;
status = "okay";
adc1: adc@0 {
st,adc-channels = <0 1 6>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
};
adc2: adc@100 {
st,adc-channels = <0 1 2>;
st,min-sample-time-nsecs = <5000>;
status = "okay";
};
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rgmii_pins_c>;
pinctrl-1 = <&ethernet0_rgmii_sleep_pins_c>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii";
max-speed = <1000>;
phy-handle = <&phy0>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
phy0: ethernet-phy@7 {
reg = <7>;
rxc-skew-ps = <1500>;
rxdv-skew-ps = <540>;
rxd0-skew-ps = <420>;
rxd1-skew-ps = <420>;
rxd2-skew-ps = <420>;
rxd3-skew-ps = <420>;
txc-skew-ps = <1440>;
txen-skew-ps = <540>;
txd0-skew-ps = <420>;
txd1-skew-ps = <420>;
txd2-skew-ps = <420>;
txd3-skew-ps = <420>;
};
};
};
&i2c1 { /* X6 I2C1 */
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_b>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&i2c2 { /* X6 I2C2 */
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_c>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&i2c4 {
hdmi-transmitter@3d {
compatible = "adi,adv7513";
reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
reg-names = "main", "cec", "edid", "packet";
clocks = <&cec_clock>;
clock-names = "cec";
avdd-supply = <&v3v3>;
dvdd-supply = <&v3v3>;
pvdd-supply = <&v3v3>;
dvdd-3v-supply = <&v3v3>;
bgvdd-supply = <&v3v3>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpiog>;
status = "okay";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7513_in: endpoint {
remote-endpoint = <&ltdc_ep0_out>;
};
};
port@1 {
reg = <1>;
adv7513_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
port@2 {
reg = <2>;
adv7513_i2s0: endpoint {
remote-endpoint = <&sai2a_endpoint>;
};
};
};
};
};
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_d>;
pinctrl-1 = <&ltdc_sleep_pins_d>;
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
ltdc_ep0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&adv7513_in>;
};
};
};
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&sai2a_pins_c>;
pinctrl-1 = <&sai2a_sleep_pins_c>;
clock-names = "pclk", "x8k", "x11k";
status = "okay";
sai2a: audio-controller@4400b004 {
#clock-cells = <0>;
dma-names = "tx";
clocks = <&rcc SAI2_K>;
clock-names = "sai_ck";
status = "okay";
sai2a_port: port {
sai2a_endpoint: endpoint {
remote-endpoint = <&adv7513_i2s0>;
format = "i2s";
mclk-fs = <256>;
};
};
};
};
&sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp;
st,sig-dir;
st,neg-edge;
st,use-ckin;
bus-width = <4>;
vmmc-supply = <&vdd_sd>;
vqmmc-supply = <&sd_switch>;
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
bus-width = <8>;
mmc-ddr-1_8v;
no-sd;
no-sdio;
non-removable;
st,neg-edge;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd_io>;
status = "okay";
};
&sdmmc3 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc3_b4_pins_b>;
pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
broken-cd;
non-removable;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <&wlan_pwr>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
brcmf: bcrmf@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
};
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_a>;
cs-gpios = <&gpioi 0 0>;
status = "disabled";
/delete-property/dmas;
/delete-property/dma-names;
};
&uart4 {
/* On Low speed expansion header */
label = "LS-UART1";
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_b>;
status = "okay";
};
&uart7 {
/* On Low speed expansion header */
label = "LS-UART0";
pinctrl-names = "default";
pinctrl-0 = <&uart7_pins_a>;
status = "okay";
};
/* Bluetooth */
&usart2 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&usart2_pins_a>;
pinctrl-1 = <&usart2_sleep_pins_a>;
st,hw-flow-ctrl;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <3000000>;
shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
};
};
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
status = "okay";
};
&usbotg_hs {
pinctrl-0 = <&usbotg_hs_pins_a>;
pinctrl-names = "default";
phy-names = "usb2-phy";
phys = <&usbphyc_port1 0>;
status = "okay";
vbus-supply = <&vbus_otg>;
};
&usbphyc {
status = "okay";
};
&usbphyc_port0 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};
&usbphyc_port1 {
phy-supply = <&vdd_usb>;
vdda1v1-supply = <&reg11>;
vdda1v8-supply = <&reg18>;
};

23
arch/arm/boot/dts/stm32mp15xx-dhcor-io1v8.dtsi Normal file
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@ -0,0 +1,23 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
/ {
/* Enpirion EP3A8LQI U2 on the DHCOR */
vdd_io: regulator-buck-io {
compatible = "regulator-fixed";
regulator-name = "buck-io";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vdd>;
};
};
&pwr_regulators {
vdd-supply = <&vdd_io>;
};

209
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi Normal file
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@ -0,0 +1,209 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mfd/st,stpmic1.h>
/ {
aliases {
spi0 = &qspi;
};
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x40000000>;
};
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
status = "okay";
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo2-supply = <&v3v3>;
ldo3-supply = <&vdd_ddr>;
ldo5-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
vdda: ldo1 {
regulator-name = "vdda";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO1 0>;
};
v2v8: ldo2 {
regulator-name = "v2v8";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
interrupts = <IT_CURLIM_LDO2 0>;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <750000>;
regulator-always-on;
regulator-over-current-protection;
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
interrupts = <IT_CURLIM_LDO4 0>;
};
vdd_sd: ldo5 {
regulator-name = "vdd_sd";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO5 0>;
regulator-boot-on;
};
v1v8: ldo6 {
regulator-name = "v1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
interrupts = <IT_CURLIM_LDO6 0>;
regulator-enable-ramp-delay = <300000>;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
};
bst_out: boost {
regulator-name = "bst_out";
interrupts = <IT_OCP_BOOST 0>;
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge = <1>;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge = <1>;
};
};
onkey {
compatible = "st,stpmic1-onkey";
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
interrupt-names = "onkey-falling", "onkey-rising";
status = "okay";
};
watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
};
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&qspi {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash0: spi-flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-rx-bus-width = <4>;
spi-max-frequency = <108000000>;
#address-cells = <1>;
#size-cells = <1>;
};
};
&rng1 {
status = "okay";
};
&rtc {
status = "okay";
};

20
arch/arm/boot/dts/stm32mp15xx-dkx.dtsi
View File

@ -112,14 +112,18 @@
&cec {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cec_pins_b>;
pinctrl-1 = <&cec_pins_sleep_b>;
pinctrl-1 = <&cec_sleep_pins_b>;
status = "okay";
};
&dts {
status = "okay";
};
&ethernet0 {
status = "okay";
pinctrl-0 = <&ethernet0_rgmii_pins_a>;
pinctrl-1 = <&ethernet0_rgmii_pins_sleep_a>;
pinctrl-1 = <&ethernet0_rgmii_sleep_pins_a>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii-id";
max-speed = <1000>;
@ -137,13 +141,12 @@
&gpu {
contiguous-area = <&gpu_reserved>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;
pinctrl-1 = <&i2c1_pins_sleep_a>;
pinctrl-1 = <&i2c1_sleep_pins_a>;
i2c-scl-rising-time-ns = <100>;
i2c-scl-falling-time-ns = <7>;
status = "okay";
@ -218,7 +221,7 @@
&i2c4 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_pins_a>;
pinctrl-1 = <&i2c4_pins_sleep_a>;
pinctrl-1 = <&i2c4_sleep_pins_a>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
clock-frequency = <400000>;
@ -367,7 +370,7 @@
clock-names = "pclk", "i2sclk", "x8k", "x11k";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2s2_pins_a>;
pinctrl-1 = <&i2s2_pins_sleep_a>;
pinctrl-1 = <&i2s2_sleep_pins_a>;
status = "okay";
i2s2_port: port {
@ -391,13 +394,10 @@
&ltdc {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ltdc_pins_a>;
pinctrl-1 = <&ltdc_pins_sleep_a>;
pinctrl-1 = <&ltdc_sleep_pins_a>;
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
ltdc_ep0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&sii9022_in>;

230
arch/arm/boot/dts/stm32mp15xx-osd32.dtsi Normal file
View File

@ -0,0 +1,230 @@
/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) */
/*
* Copyright (C) 2020 STMicroelectronics - All Rights Reserved
* Copyright (C) 2020 Ahmad Fatoum, Pengutronix
*/
#include "stm32mp15-pinctrl.dtsi"
#include <dt-bindings/mfd/st,stpmic1.h>
/ {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
mcuram2: mcuram2@10000000 {
compatible = "shared-dma-pool";
reg = <0x10000000 0x40000>;
no-map;
};
vdev0vring0: vdev0vring0@10040000 {
compatible = "shared-dma-pool";
reg = <0x10040000 0x1000>;
no-map;
};
vdev0vring1: vdev0vring1@10041000 {
compatible = "shared-dma-pool";
reg = <0x10041000 0x1000>;
no-map;
};
vdev0buffer: vdev0buffer@10042000 {
compatible = "shared-dma-pool";
reg = <0x10042000 0x4000>;
no-map;
};
mcuram: mcuram@30000000 {
compatible = "shared-dma-pool";
reg = <0x30000000 0x40000>;
no-map;
};
retram: retram@38000000 {
compatible = "shared-dma-pool";
reg = <0x38000000 0x10000>;
no-map;
};
};
reg_sip_eeprom: regulator_eeprom {
compatible = "regulator-fixed";
regulator-name = "sip_eeprom";
regulator-always-on;
};
};
&i2c4 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_pins_a>;
pinctrl-1 = <&i2c4_sleep_pins_a>;
clock-frequency = <400000>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
regulators {
compatible = "st,stpmic1-regulators";
ldo1-supply = <&v3v3>;
ldo6-supply = <&v3v3>;
pwr_sw1-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,mask-reset;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
v1v8_audio: ldo1 {
regulator-name = "v1v8_audio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO1 0>;
};
v3v3_hdmi: ldo2 {
regulator-name = "v3v3_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO2 0>;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <750000>;
regulator-always-on;
regulator-over-current-protection;
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>;
};
vdda: ldo5 {
regulator-name = "vdda";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
interrupts = <IT_CURLIM_LDO5 0>;
regulator-boot-on;
};
v1v2_hdmi: ldo6 {
regulator-name = "v1v2_hdmi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
interrupts = <IT_CURLIM_LDO6 0>;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
regulator-over-current-protection;
};
bst_out: boost {
regulator-name = "bst_out";
interrupts = <IT_OCP_BOOST 0>;
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge;
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge;
};
};
onkey {
compatible = "st,stpmic1-onkey";
interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
interrupt-names = "onkey-falling", "onkey-rising";
};
pmic_watchdog: watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
sip_eeprom: eeprom@50 {
compatible = "atmel,24c32";
vcc-supply = <&reg_sip_eeprom>;
reg = <0x50>;
};
};
&ipcc {
status = "okay";
};
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
mbox-names = "vq0", "vq1", "shutdown";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
};
&rng1 {
status = "okay";
};