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Our usual bunch of patches to improve the Allwinner SoCs support,

Browse Source 
mainly:
   - I2S Support for the V3
   - Audio Codec Support for the V3s
   - DMA support for the V3s
   - PWM support for the V3s
   - Support for Bluetooth Audio on the pinephone
   - Add A10-like timers to the A64 and R40
   - New boards: Forlinx OKA40i-C, Forlinx OKA40i-C, NanoPi R1S H5
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Merge tag 'sunxi-dt-for-5.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt

Our usual bunch of patches to improve the Allwinner SoCs support,
mainly:
  - I2S Support for the V3
  - Audio Codec Support for the V3s
  - DMA support for the V3s
  - PWM support for the V3s
  - Support for Bluetooth Audio on the pinephone
  - Add A10-like timers to the A64 and R40
  - New boards: Forlinx OKA40i-C, Forlinx OKA40i-C, NanoPi R1S H5

* tag 'sunxi-dt-for-5.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (29 commits)
  ARM: dts: sun8i: v3s: enable emac for zero Dock
  arm64: dts: allwinner: pinephone: Set audio card name
  ARM: dts: sun8i: r40: Add timer node
  ARM: dts: sun8i: V3: add I2S interface to V3 dts
  dt-bindings: sound: sun4i-i2s: add Allwinner V3 I2S compatible
  ARM: dts: sun8i: V3: add codec analog frontend to V3 dts
  ASoC: dt-bindings: sun8i-a23-codec-analog: add compatible for Allwinner V3
  ARM: dts: sun8i: v3s: add analog codec and frontend to v3s dts
  ARM: dts: sun8i: v3s: add DMA properties to peripherals supporting DMA
  ARM: dts: sun8i: v3s: add DMA controller to v3s dts
  ARM: dts: sun8i: v3s: add pwm controller to v3s dts
  dt-bindings: pwm: allwinner: add v3s pwm compatible
  arm64: dts: allwinner: h5: Add NanoPi R1S H5 support
  dt-bindings: arm: Add NanoPi R1S H5
  arm64: dts: allwinner: pinephone: Add support for Bluetooth audio
  arm64: dts: allwinner: a64: Allow multiple DAI links
  arm64: dts: allwinner: a64: Add pinmux nodes for AIF2/AIF3
  arm64: dts: allwinner: a64: Allow using multiple codec DAIs
  ARM: dts: sun8i-a33: Allow using multiple codec DAIs
  ASoC: dt-bindings: sun8i-codec: Increase #sound-dai-cells
  ...

Link: https://lore.kernel.org/r/96cc77ec-139d-4685-8a66-a60964cf39fd.lettre@localhost
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2021-06-12 08:54:28 -07:00
commit b0545d11a9
20 changed files with 784 additions and 52 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Documentation/devicetree/bindings/arm/sunxi.yaml
View File

@ -224,6 +224,12 @@ properties:
- const: empire-electronix,m712
- const: allwinner,sun5i-a13
- description: Forlinx OKA40i-C Development board
items:
- const: forlinx,oka40i-c
- const: forlinx,feta40i-c
- const: allwinner,sun8i-r40
- description: FriendlyARM NanoPi A64
items:
- const: friendlyarm,nanopi-a64
@ -269,6 +275,11 @@ properties:
- const: friendlyarm,nanopi-r1
- const: allwinner,sun8i-h3
- description: FriendlyARM NanoPi R1S H5
items:
- const: friendlyarm,nanopi-r1s-h5
- const: allwinner,sun50i-h5
- description: FriendlyARM ZeroPi
items:
- const: friendlyarm,zeropi

3
Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml
View File

@ -24,6 +24,9 @@ properties:
- items:
- const: allwinner,sun8i-a83t-pwm
- const: allwinner,sun8i-h3-pwm
- items:
- const: allwinner,sun8i-v3s-pwm
- const: allwinner,sun7i-a20-pwm
- items:
- const: allwinner,sun50i-a64-pwm
- const: allwinner,sun5i-a13-pwm

3
Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-i2s.yaml
View File

@ -20,6 +20,9 @@ properties:
- const: allwinner,sun6i-a31-i2s
- const: allwinner,sun8i-a83t-i2s
- const: allwinner,sun8i-h3-i2s
- items:
- const: allwinner,sun8i-v3-i2s
- const: allwinner,sun8i-h3-i2s
- const: allwinner,sun50i-a64-codec-i2s
- items:
- const: allwinner,sun50i-a64-i2s

9
Documentation/devicetree/bindings/sound/allwinner,sun8i-a23-codec-analog.yaml
View File

@ -12,12 +12,15 @@ maintainers:
properties:
compatible:
enum:
oneOf:
# FIXME: This is documented in the PRCM binding, but needs to be
# migrated here at some point
# - allwinner,sun8i-a23-codec-analog
- allwinner,sun8i-h3-codec-analog
- allwinner,sun8i-v3s-codec-analog
- const: allwinner,sun8i-h3-codec-analog
- items:
- const: allwinner,sun8i-v3-codec-analog
- const: allwinner,sun8i-h3-codec-analog
- const: allwinner,sun8i-v3s-codec-analog
reg:
maxItems: 1

8
Documentation/devicetree/bindings/sound/allwinner,sun8i-a33-codec.yaml
View File

@ -12,7 +12,11 @@ maintainers:
properties:
"#sound-dai-cells":
const: 0
minimum: 0
maximum: 1
description:
A value of 0 is deprecated. When used, it only allows access to
the ADC/DAC and AIF1 (the CPU DAI), not the other two AIFs/DAIs.
compatible:
oneOf:
@ -50,7 +54,7 @@ additionalProperties: false
examples:
- |
audio-codec@1c22e00 {
#sound-dai-cells = <0>;
#sound-dai-cells = <1>;
compatible = "allwinner,sun8i-a33-codec";
reg = <0x01c22e00 0x400>;
interrupts = <0 29 4>;

42
Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
View File

@ -12,11 +12,18 @@ maintainers:
properties:
compatible:
enum:
- allwinner,sun4i-a10-timer
- allwinner,sun8i-a23-timer
- allwinner,sun8i-v3s-timer
- allwinner,suniv-f1c100s-timer
oneOf:
- enum:
- allwinner,sun4i-a10-timer
- allwinner,sun8i-a23-timer
- allwinner,sun8i-v3s-timer
- allwinner,suniv-f1c100s-timer
- items:
- enum:
- allwinner,sun50i-a64-timer
- allwinner,sun50i-h6-timer
- allwinner,sun50i-h616-timer
- const: allwinner,sun8i-a23-timer
reg:
maxItems: 1
@ -34,8 +41,8 @@ allOf:
- if:
properties:
compatible:
items:
const: allwinner,sun4i-a10-timer
enum:
- allwinner,sun4i-a10-timer
then:
properties:
@ -46,8 +53,8 @@ allOf:
- if:
properties:
compatible:
items:
const: allwinner,sun8i-a23-timer
enum:
- allwinner,sun8i-a23-timer
then:
properties:
@ -58,20 +65,9 @@ allOf:
- if:
properties:
compatible:
items:
const: allwinner,sun8i-v3s-timer
then:
properties:
interrupts:
minItems: 3
maxItems: 3
- if:
properties:
compatible:
items:
const: allwinner,suniv-f1c100s-timer
enum:
- allwinner,sun8i-v3s-timer
- allwinner,suniv-f1c100s-timer
then:
properties:

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -409,6 +409,8 @@ patternProperties:
description: Firefly
"^focaltech,.*":
description: FocalTech Systems Co.,Ltd
"^forlinx,.*":
description: Baoding Forlinx Embedded Technology Co., Ltd.
"^frida,.*":
description: Shenzhen Frida LCD Co., Ltd.
"^friendlyarm,.*":

1
arch/arm/boot/dts/Makefile
View File

@ -1236,6 +1236,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-r40-oka40i-c.dtb \
sun8i-s3-elimo-initium.dtb \
sun8i-s3-lichee-zero-plus.dtb \
sun8i-s3-pinecube.dtb \

4
arch/arm/boot/dts/sun8i-a33.dtsi
View File

@ -198,7 +198,7 @@
};
link_codec: simple-audio-card,codec {
sound-dai = <&codec>;
sound-dai = <&codec 0>;
};
};
@ -238,7 +238,7 @@
};
codec: codec@1c22e00 {
#sound-dai-cells = <0>;
#sound-dai-cells = <1>;
compatible = "allwinner,sun8i-a33-codec";
reg = <0x01c22e00 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;

106
arch/arm/boot/dts/sun8i-r40-feta40i.dtsi Normal file
View File

@ -0,0 +1,106 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com>
// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is:
// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
#include "sun8i-r40.dtsi"
&i2c0 {
status = "okay";
axp22x: pmic@34 {
compatible = "x-powers,axp221";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
#include "axp22x.dtsi"
&mmc2 {
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_aldo2>;
bus-width = <8>;
non-removable;
status = "okay";
};
&pio {
pinctrl-names = "default";
pinctrl-0 = <&clk_out_a_pin>;
vcc-pa-supply = <&reg_dcdc1>;
vcc-pc-supply = <&reg_aldo2>;
vcc-pd-supply = <&reg_dcdc1>;
vcc-pf-supply = <&reg_dldo4>;
vcc-pg-supply = <&reg_dldo1>;
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc-pa";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-3v3";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-name = "vdd-sys";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&reg_dldo1 {
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-io";
};
&reg_dldo4 {
regulator-always-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vdd2v5-sata";
};
&reg_eldo2 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-name = "vdd1v2-sata";
};
&reg_eldo3 {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vcc-pe";
};

203
arch/arm/boot/dts/sun8i-r40-oka40i-c.dts Normal file
View File

@ -0,0 +1,203 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
// Copyright (C) 2021 Ivan Uvarov <i.uvarov@cognitivepilot.com>
// Based on the sun8i-r40-bananapi-m2-ultra.dts, which is:
// Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
/dts-v1/;
#include "sun8i-r40-feta40i.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Forlinx OKA40i-C";
compatible = "forlinx,oka40i-c", "forlinx,feta40i-c", "allwinner,sun8i-r40";
aliases {
ethernet0 = &gmac;
serial0 = &uart0;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5; /* RS485 */
serial7 = &uart7;
};
chosen {
stdout-path = "serial0:115200n8";
};
connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_in: endpoint {
remote-endpoint = <&hdmi_out_con>;
};
};
};
leds {
compatible = "gpio-leds";
led-5 { /* this is how the leds are labeled on the board */
gpios = <&pio 7 26 GPIO_ACTIVE_LOW>; /* PH26 */
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
led-6 {
gpios = <&pio 8 15 GPIO_ACTIVE_LOW>; /* PI15 */
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
};
reg_vcc5v0: vcc5v0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&pio 1 10 GPIO_ACTIVE_LOW>; // PB10 WIFI_EN
clocks = <&ccu CLK_OUTA>;
clock-names = "ext_clock";
};
};
&ahci {
ahci-supply = <&reg_dldo4>;
phy-supply = <&reg_eldo2>;
status = "okay";
};
&de {
status = "okay";
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
phy-supply = <&reg_dcdc1>;
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&hdmi {
status = "okay";
};
&hdmi_out {
hdmi_out_con: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
&i2c2 {
status = "okay";
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 8 11 GPIO_ACTIVE_LOW>; // PI11
status = "okay";
};
&mmc3 {
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 8 10 GPIO_ACTIVE_LOW>; // PI10
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&reg_dc1sw {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-lcd";
};
&reg_dldo2 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi";
};
&tcon_tv0 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pi_pins>, <&uart2_rts_cts_pi_pins>;
uart-has-rtscts;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pg_pins>, <&uart3_rts_cts_pg_pins>;
uart-has-rtscts;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pg_pins>;
status = "okay";
};
&uart5 { /* RS485 */
pinctrl-names = "default";
pinctrl-0 = <&uart5_ph_pins>;
status = "okay";
};
&uart7 {
pinctrl-names = "default";
pinctrl-0 = <&uart7_pi_pins>;
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
usb2_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

56
arch/arm/boot/dts/sun8i-r40.dtsi
View File

@ -357,6 +357,8 @@
clock-names = "ahb", "mmc";
resets = <&ccu RST_BUS_MMC3>;
reset-names = "ahb";
pinctrl-0 = <&mmc3_pins>;
pinctrl-names = "default";
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
#address-cells = <1>;
@ -601,6 +603,15 @@
bias-pull-up;
};
/omit-if-no-ref/
mmc3_pins: mmc3-pins {
pins = "PI4", "PI5", "PI6",
"PI7", "PI8", "PI9";
function = "mmc3";
drive-strength = <30>;
bias-pull-up;
};
/omit-if-no-ref/
spi0_pc_pins: spi0-pc-pins {
pins = "PC0", "PC1", "PC2";
@ -631,20 +642,65 @@
function = "spi1";
};
/omit-if-no-ref/
uart0_pb_pins: uart0-pb-pins {
pins = "PB22", "PB23";
function = "uart0";
};
/omit-if-no-ref/
uart2_pi_pins: uart2-pi-pins {
pins = "PI18", "PI19";
function = "uart2";
};
/omit-if-no-ref/
uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{
pins = "PI16", "PI17";
function = "uart2";
};
/omit-if-no-ref/
uart3_pg_pins: uart3-pg-pins {
pins = "PG6", "PG7";
function = "uart3";
};
/omit-if-no-ref/
uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
pins = "PG8", "PG9";
function = "uart3";
};
/omit-if-no-ref/
uart4_pg_pins: uart4-pg-pins {
pins = "PG10", "PG11";
function = "uart4";
};
/omit-if-no-ref/
uart5_ph_pins: uart5-ph-pins {
pins = "PH6", "PH7";
function = "uart5";
};
/omit-if-no-ref/
uart7_pi_pins: uart7-pi-pins {
pins = "PI20", "PI21";
function = "uart7";
};
};
timer@1c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
wdt: watchdog@1c20c90 {

31
arch/arm/boot/dts/sun8i-v3.dtsi
View File

@ -1,14 +1,40 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
* Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org>
*/
#include "sun8i-v3s.dtsi"
/ {
soc {
i2s0: i2s@1c22000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-v3-i2s",
"allwinner,sun8i-h3-i2s";
reg = <0x01c22000 0x400>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
clock-names = "apb", "mod";
dmas = <&dma 3>, <&dma 3>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&i2s0_pins>;
resets = <&ccu RST_BUS_I2S0>;
status = "disabled";
};
};
};
&ccu {
compatible = "allwinner,sun8i-v3-ccu";
};
&codec_analog {
compatible = "allwinner,sun8i-v3-codec-analog",
"allwinner,sun8i-h3-codec-analog";
};
&emac {
/delete-property/ phy-handle;
/delete-property/ phy-mode;
@ -25,6 +51,11 @@
&pio {
compatible = "allwinner,sun8i-v3-pinctrl";
i2s0_pins: i2s0-pins {
pins = "PG10", "PG11", "PG12", "PG13";
function = "i2s";
};
uart1_pg_pins: uart1-pg-pins {
pins = "PG6", "PG7";
function = "uart1";

17
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
View File

@ -49,16 +49,18 @@
compatible = "licheepi,licheepi-zero-dock", "licheepi,licheepi-zero",
"allwinner,sun8i-v3s";
aliases {
ethernet0 = &emac;
};
leds {
/* The LEDs use PG0~2 pins, which conflict with MMC1 */
status = "disabled";
};
};
&mmc1 {
broken-cd;
bus-width = <4>;
vmmc-supply = <&reg_vcc3v3>;
&emac {
allwinner,leds-active-low;
status = "okay";
};
@ -94,3 +96,10 @@
voltage = <800000>;
};
};
&mmc1 {
broken-cd;
bus-width = <4>;
vmmc-supply = <&reg_vcc3v3>;
status = "okay";
};

48
arch/arm/boot/dts/sun8i-v3s.dtsi
View File

@ -1,5 +1,6 @@
/*
* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
* Copyright (C) 2021 Tobias Schramm <t.schramm@manjaro.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -172,6 +173,15 @@
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
dma: dma-controller@1c02000 {
compatible = "allwinner,sun8i-v3s-dma";
reg = <0x01c02000 0x1000>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DMA>;
resets = <&ccu RST_BUS_DMA>;
#dma-cells = <1>;
};
tcon0: lcd-controller@1c0c000 {
compatible = "allwinner,sun8i-v3s-tcon";
reg = <0x01c0c000 0x1000>;
@ -275,6 +285,8 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
clock-names = "ahb", "mod";
dmas = <&dma 16>, <&dma 16>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_CE>;
reset-names = "ahb";
};
@ -422,6 +434,15 @@
clocks = <&osc24M>;
};
pwm: pwm@1c21400 {
compatible = "allwinner,sun8i-v3s-pwm",
"allwinner,sun7i-a20-pwm";
reg = <0x01c21400 0xc>;
clocks = <&osc24M>;
#pwm-cells = <3>;
status = "disabled";
};
lradc: lradc@1c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x400>;
@ -429,6 +450,25 @@
status = "disabled";
};
codec: codec@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-v3s-codec";
reg = <0x01c22c00 0x400>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
clock-names = "apb", "codec";
resets = <&ccu RST_BUS_CODEC>;
dmas = <&dma 15>, <&dma 15>;
dma-names = "rx", "tx";
allwinner,codec-analog-controls = <&codec_analog>;
status = "disabled";
};
codec_analog: codec-analog@1c23000 {
compatible = "allwinner,sun8i-v3s-codec-analog";
reg = <0x01c23000 0x4>;
};
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
@ -436,6 +476,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART0>;
dmas = <&dma 6>, <&dma 6>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART0>;
status = "disabled";
};
@ -447,6 +489,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART1>;
dmas = <&dma 7>, <&dma 7>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART1>;
status = "disabled";
};
@ -458,6 +502,8 @@
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_BUS_UART2>;
dmas = <&dma 8>, <&dma 8>;
dma-names = "rx", "tx";
resets = <&ccu RST_BUS_UART2>;
pinctrl-0 = <&uart2_pins>;
pinctrl-names = "default";
@ -537,6 +583,8 @@
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
resets = <&ccu RST_BUS_SPI0>;

1
arch/arm64/boot/dts/allwinner/Makefile
View File

@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb

25
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
View File

@ -25,6 +25,11 @@
/* Backlight configuration differs per PinePhone revision. */
};
bt_sco_codec: bt-sco-codec {
#sound-dai-cells = <1>;
compatible = "linux,bt-sco";
};
chosen {
stdout-path = "serial0:115200n8";
};
@ -91,6 +96,8 @@
};
&codec {
pinctrl-names = "default";
pinctrl-0 = <&aif3_pins>;
status = "okay";
};
@ -426,6 +433,7 @@
&sound {
status = "okay";
simple-audio-card,name = "PinePhone";
simple-audio-card,aux-devs = <&codec_analog>, <&speaker_amp>;
simple-audio-card,widgets = "Microphone", "Headset Microphone",
"Microphone", "Internal Microphone",
@ -447,6 +455,23 @@
"MIC1", "Internal Microphone",
"Headset Microphone", "HBIAS",
"MIC2", "Headset Microphone";
simple-audio-card,dai-link@2 {
format = "dsp_a";
frame-master = <&link2_codec>;
bitclock-master = <&link2_codec>;
bitclock-inversion;
link2_cpu: cpu {
sound-dai = <&bt_sco_codec 0>;
};
link2_codec: codec {
sound-dai = <&codec 2>;
dai-tdm-slot-num = <1>;
dai-tdm-slot-width = <32>;
};
};
};
&uart0 {

62
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
View File

@ -131,12 +131,10 @@
};
sound: sound {
#address-cells = <1>;
#size-cells = <0>;
compatible = "simple-audio-card";
simple-audio-card,name = "sun50i-a64-audio";
simple-audio-card,format = "i2s";
simple-audio-card,frame-master = <&cpudai>;
simple-audio-card,bitclock-master = <&cpudai>;
simple-audio-card,mclk-fs = <128>;
simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,routing =
"Left DAC", "DACL",
@ -145,12 +143,19 @@
"ADCR", "Right ADC";
status = "disabled";
cpudai: simple-audio-card,cpu {
sound-dai = <&dai>;
};
simple-audio-card,dai-link@0 {
format = "i2s";
frame-master = <&link0_cpu>;
bitclock-master = <&link0_cpu>;
mclk-fs = <128>;
link_codec: simple-audio-card,codec {
sound-dai = <&codec>;
link0_cpu: cpu {
sound-dai = <&dai>;
};
link0_codec: codec {
sound-dai = <&codec 0>;
};
};
};
@ -659,6 +664,18 @@
interrupt-controller;
#interrupt-cells = <3>;
/omit-if-no-ref/
aif2_pins: aif2-pins {
pins = "PB4", "PB5", "PB6", "PB7";
function = "aif2";
};
/omit-if-no-ref/
aif3_pins: aif3-pins {
pins = "PG10", "PG11", "PG12", "PG13";
function = "aif3";
};
csi_pins: csi-pins {
pins = "PE0", "PE2", "PE3", "PE4", "PE5", "PE6",
"PE7", "PE8", "PE9", "PE10", "PE11";
@ -799,6 +816,23 @@
};
};
timer@1c20c00 {
compatible = "allwinner,sun50i-a64-timer",
"allwinner,sun8i-a23-timer";
reg = <0x01c20c00 0xa0>;
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
wdt0: watchdog@1c20ca0 {
compatible = "allwinner,sun50i-a64-wdt",
"allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
spdif: spdif@1c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-spdif",
@ -880,7 +914,7 @@
};
codec: codec@1c22e00 {
#sound-dai-cells = <0>;
#sound-dai-cells = <1>;
compatible = "allwinner,sun50i-a64-codec",
"allwinner,sun8i-a33-codec";
reg = <0x01c22e00 0x600>;
@ -1325,13 +1359,5 @@
#address-cells = <1>;
#size-cells = <0>;
};
wdt0: watchdog@1c20ca0 {
compatible = "allwinner,sun50i-a64-wdt",
"allwinner,sun6i-a31-wdt";
reg = <0x01c20ca0 0x20>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
};
};

195
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts Normal file
View File

@ -0,0 +1,195 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2021 Chukun Pan <amadeus@jmu.edu.cn>
*
* Based on sun50i-h5-nanopi-neo-plus2.dts, which is:
* Copyright (C) 2017 Antony Antony <antony@phenome.org>
* Copyright (C) 2016 ARM Ltd.
*/
/dts-v1/;
#include "sun50i-h5.dtsi"
#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "FriendlyARM NanoPi R1S H5";
compatible = "friendlyarm,nanopi-r1s-h5", "allwinner,sun50i-h5";
aliases {
ethernet0 = &emac;
ethernet1 = &rtl8189etv;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
led-2 {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
};
};
r-gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
};
};
reg_gmac_3v3: gmac-3v3 {
compatible = "regulator-fixed";
regulator-name = "gmac-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <100000>;
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
reg_vcc3v3: vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
status = "okay";
};
vdd_cpux: gpio-regulator {
compatible = "regulator-gpio";
regulator-name = "vdd-cpux";
regulator-type = "voltage";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1300000>;
regulator-ramp-delay = <50>; /* 4ms */
gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
gpios-states = <0x1>;
states = <1100000 0x0>, <1300000 0x1>;
};
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
post-power-on-delay-ms = <200>;
};
};
&cpu0 {
cpu-supply = <&vdd_cpux>;
};
&ehci1 {
status = "okay";
};
&ehci2 {
status = "okay";
};
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_rgmii_pins>;
phy-supply = <&reg_gmac_3v3>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii-id";
status = "okay";
};
&external_mdio {
ext_rgmii_phy: ethernet-phy@7 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <7>;
};
};
&i2c0 {
status = "okay";
eeprom@51 {
compatible = "microchip,24c02";
reg = <0x51>;
pagesize = <16>;
};
};
&mmc0 {
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8189etv: sdio_wifi@1 {
reg = <1>;
};
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";
};
&usbphy {
/* USB Type-A port's VBUS is always on */
usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
usb0_vbus-supply = <&reg_usb0_vbus>;
status = "okay";
};

9
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
View File

@ -271,6 +271,15 @@
};
};
timer@3009000 {
compatible = "allwinner,sun50i-h6-timer",
"allwinner,sun8i-a23-timer";
reg = <0x03009000 0xa0>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc24M>;
};
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h6-wdt",
"allwinner,sun6i-a31-wdt";