arm64: dts: qcom: qdu1000: correct LLCC reg entries
According to bindings and Linux driver there is no "multi_channel_register" address space for LLCC. The first "reg" entry is supposed to be llcc0_base since commit 43aa006e074c ("dt-bindings: arm: msm: Fix register regions used for LLCC banks"): qdu1000-idp.dtb: system-cache-controller@19200000: reg: [[0, 421527552, 0, 14155776], [0, 438304768, 0, 524288], [0, 572293416, 0, 4]] is too long qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:0: 'llcc0_base' was expected qdu1000-idp.dtb: system-cache-controller@19200000: reg-names: ['llcc_base', 'llcc_broadcast_base', 'multi_channel_register'] is too long Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Mukesh Ojha <quic_mojha@quicinc.com> Link: https://lore.kernel.org/r/20231107080417.16700-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -1446,11 +1446,9 @@
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system-cache-controller@19200000 {
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compatible = "qcom,qdu1000-llcc";
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reg = <0 0x19200000 0 0xd80000>,
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<0 0x1a200000 0 0x80000>,
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<0 0x221c8128 0 0x4>;
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reg-names = "llcc_base",
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"llcc_broadcast_base",
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"multi_channel_register";
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<0 0x1a200000 0 0x80000>;
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reg-names = "llcc0_base",
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"llcc_broadcast_base";
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interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
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multi-ch-bit-off = <24 2>;
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};
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