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x86/hyperv: Fix hv_get/set_register for nested bringup

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hv_get_nested_reg only translates SINT0, resulting in the wrong sint
being registered by nested vmbus.

Fix the issue with new utility function hv_is_sint_reg.

While at it, improve clarity of hv_set_non_nested_register and hv_is_synic_reg.

Signed-off-by: Nuno Das Neves <nunodasneves@linux.microsoft.com>
Reviewed-by: Jinank Jain <jinankjain@linux.microsoft.com>
Link: https://lore.kernel.org/r/1675980172-6851-1-git-send-email-nunodasneves@linux.microsoft.com
Signed-off-by: Wei Liu <wei.liu@kernel.org>
This commit is contained in:
Nuno Das Neves 2023-02-09 14:02:52 -08:00 committed by Wei Liu
parent 96ec293962
commit b14033a3e6
2 changed files with 12 additions and 8 deletions
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12
arch/x86/include/asm/mshyperv.h
View File

@ -224,10 +224,14 @@ extern bool hv_isolation_type_snp(void);
static inline bool hv_is_synic_reg(unsigned int reg)
{
if ((reg >= HV_REGISTER_SCONTROL) &&
(reg <= HV_REGISTER_SINT15))
return true;
return false;
return (reg >= HV_REGISTER_SCONTROL) &&
(reg <= HV_REGISTER_SINT15);
}
static inline bool hv_is_sint_reg(unsigned int reg)
{
return (reg >= HV_REGISTER_SINT0) &&
(reg <= HV_REGISTER_SINT15);
}
u64 hv_get_register(unsigned int reg);

8
arch/x86/kernel/cpu/mshyperv.c
View File

@ -44,6 +44,9 @@ struct ms_hyperv_info ms_hyperv;
#if IS_ENABLED(CONFIG_HYPERV)
static inline unsigned int hv_get_nested_reg(unsigned int reg)
{
if (hv_is_sint_reg(reg))
return reg - HV_REGISTER_SINT0 + HV_REGISTER_NESTED_SINT0;
switch (reg) {
case HV_REGISTER_SIMP:
return HV_REGISTER_NESTED_SIMP;
@ -53,8 +56,6 @@ static inline unsigned int hv_get_nested_reg(unsigned int reg)
return HV_REGISTER_NESTED_SVERSION;
case HV_REGISTER_SCONTROL:
return HV_REGISTER_NESTED_SCONTROL;
case HV_REGISTER_SINT0:
return HV_REGISTER_NESTED_SINT0;
case HV_REGISTER_EOM:
return HV_REGISTER_NESTED_EOM;
default:
@ -80,8 +81,7 @@ void hv_set_non_nested_register(unsigned int reg, u64 value)
hv_ghcb_msr_write(reg, value);
/* Write proxy bit via wrmsl instruction */
if (reg >= HV_REGISTER_SINT0 &&
reg <= HV_REGISTER_SINT15)
if (hv_is_sint_reg(reg))
wrmsrl(reg, value | 1 << 20);
} else {
wrmsrl(reg, value);